Define UART4 and UART5 base addresses

Signed-off-by: Stefano Babic <sbabic@denx.de>
NET: fec_mxc.c: Add support for MII for MX5 SOCs

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
NET: fec_mxc.c: Add a way to disable auto negotiation

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
MX5: Add definitions for SATA controller

Add base address and MXC_SATA_CLK to return
the clock used for the SATA controller.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Dirk Behme <dirk.behme@de.bosch.com>
SATA: check for return value from sata functions

sata functions are called even if previous functions failed
because return value is not checked.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Dirk Behme <dirk.behme@de.bosch.com>
CC: Fabio Estevam <fabio.estevam@freescale.com>
MX53: add function to set SATA clock to internal

The MX53 SATA interface can use an internal clock (USB PHY1)
instead of an external clock. This is an undocumented feature, but used
on most Freescale's evaluation boards, such as MX53-loco.

As stated by Freescale's support:

Fuses (but not pins) may be used to configure SATA clocks.
Particularly the i.MX53 Fuse_Map contains the next information
about configuring SATA clocks :
	SATA_ALT_REF_CLK[1:0] (offset 0x180C)

'00' - 100MHz (External)
'01' - 50MHz (External)
'10' - 120MHz, internal (USB PHY)
'11' - Reserved

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
SATA: add driver for MX5 / MX6 SOCs

This driver is part of Freescale's LTIB for
MX5 / MX6.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Terry Lv <r65388@freescale.com>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Dirk Behme <dirk.behme@de.bosch.com>
MX53: Add support to ESG ima3 board

The ESG ima3-mx53 board is based on the Freescale
i.MX53 SOC. It boots from NOR (128 MB) and
supports Ethernet (FEC), SATA.

Signed-off-by: Stefano Babic <sbabic@denx.de>
MX53: mx53loco: Add SATA support

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <jason.hui@linaro.org>
Acked-by: Jason Liu <jason.hui@linaro.org>
pmic: Add support for the Dialog DA9053 PMIC

Add support for the Dialog DA9053 PMIC.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
imx-common: Factor out get_ahb_clk()

get_ahb_clk() is a common function between mx5 and mx6.

Place it into imx-common directory.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
arm: Add option to disable code relocation

This permits disabling the code relation in U-Boot which is useful when
debugging with an ICE.

To use it define CONFIG_SYS_SKIP_ARM_RELOCATION in your board.

Signed-off-by: Simon Glass <sjg@chromium.org>
mx6q: Skip the relocation for the ARM2 and SabreLite boards

The boot ROM code copies U-Boot already into the RAM at address
CONFIG_SYS_TEXT_BASE.  To improve the boot time, skip the relocation
(i.e. the copy RAM -> RAM).

ATTENTION: Please read

http://lists.denx.de/pipermail/u-boot/2012-February/117140.html

why you normally don't want this!

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
part_dos: align disk buffers on cache line to enable DMA and cache

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
mmc: fsl_esdhc: Poll until card is not busy anymore

This patch imports parts of two patches from the Freescale U-Boot with the following
commit messages:

ENGR00156405 ESDHC: Add workaround for auto-clock gate errata ENGcm03648
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/drivers/mmc/imx_esdhc.c?h=imx_v2009.08_12.01.01&id=e436525a70fe47623d346bc7d9f08f12ff8ad787
The errata, not applicable to USDHC, causes ESDHC to shut off clock to the card
when auto-clock gating is enabled for commands with busy signalling and no data
phase. The card might require the clock to exit the busy state, so the workaround
is to disable the auto-clock gate bits in SYSCTL register for such commands. The
workaround also entails polling on DAT0 bit in the PRSSTAT register to learn when
busy state is complete. Auto-clock gating is re-enabled at the end of busy state.

ENGR00156670-1 ESDHC/USDHC: Remove delay before each cmd and some bug fixes
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/drivers/mmc/imx_esdhc.c?h=imx_v2009.08_12.01.01&id=a77c6fec8596891be96b2cdbc742c9824844b92a
Removed delay of 10 ms before each command. There should not be a need to have this
delay after the ENGR00156405 patch that polls until card is not busy anymore before
proceeding to next cmd.

This patch imports the polling part of both patches. The auto-clock gating code
don't apply for i.MX6 as implemented in these two patches.

SYSCTL_RSTA was defined twice. Remove one definition.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Andy Fleming <afleming@freescale.com>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
i.mx: i.mx6x: NO_MUX_I/NO_PAD_I not set correctly

If one PAD does not have mux or pad config register, we need
set the NO_MUX_I/NO_PAD_I to 0, the old value is not correct

Signed-off-by: Jason Liu <jason.hui@linaro.org>
CC: Stefano Babic <sbabic@denx.de>
fs/fat: align disk buffers on cache line to enable DMA and cache

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
mx6qsabresd: Add basic support

Add basic support for mx6qsabresd board.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
mx6qsabrelite: No need to set the direction for GPIO3_23 again

There is a 'gpio_direction_output(87, 0);' call previously, so the GPIO direction is
already established.

Use gpio_set_value() for changing the GPIO output then.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
i.MX6: Add ANATOP regulator init

Init the core regulator voltage to 1.2V. This is required for the correct
functioning of the GPU and when the ARM LDO is set to 1.225V. This is a
workaround to fix some memory clock jitter.

Note: This should be but can't be done in the DCD. The bootloader
      prevents access to the ANATOP registers.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Jason Chen <b02280@freescale.com>
CC: Jason Liu <r64343@freescale.com>
CC: Ranjani Vaidyanathan <ra5478@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <festevam@gmail.com>