sh: ap_sh4a_4a: Fix wrong register initialization value

The value of ET0_ERXD6 and GPSR1_INIT was wrong.
This fixes them.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
tools/mkenvimage.c: fix basename(3) usage

Use the POSIX variant of basename due to BSD systems (e.g. OS X) do not provide
GNU version of basename(3). It is save to use the POSIX variant here cause we do
never use argv[0] later on which may be modified by the basename(3) POSIX
variant.
On systems providing GNU variant the GNU variant should be used since string.h
is included before libgen.h. Therefore let the _GNU_SOURCE as is.

This patch fixes following warning (on OS X):
---8<---
mkenvimage.c: In function ‘main’:
mkenvimage.c:105: warning: implicit declaration of function ‘basename’
mkenvimage.c:105: warning: assignment makes pointer from integer without a cast
--->8---

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
cc: Keith Mok <ek9852@gmail.com>
spi: Tegra2: Seaboard: fix UART corruption during SPI transactions

Simon Glass's proposal to fix this on Seaboard was NAK'd, so I
removed his NS16550 references and added a small delay before
SPI/UART muxing. Tested on my Seaboard with large SPI reads/writes
and saw no corruption (crc's matched) and no spurious comm chars.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Jimmy Zhang <jimmzhang@nvidia.com>
spi: Tegra2: Seaboard: enable SPI/UART corruption fix

Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: paz00: fix typo in SD slot CD detect GPIO

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: add alternate UART1 funcmux entry

(In at least some configurations) Whistler uses UART1 on pingroups
UAA, UAB.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: Whistler board support

Whistler is a highly configurable Tegra evaluation and development board.
This change adds support for the following specific configuration:

E1120 motherboard
E1108 CPU board
E1116 PMU board

The motherboard configuration switches are set as follows:
SW1=0 SW2=0 SW3=5
S1/S2/S3/S4 all on, except S3 7/8 are off.

Other combinations of daugher boards may work to varying degrees, but will
likely require some SW adjustment.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: remove some cruft from CONFIG_EXTRA_ENV_SETTINGS

console isn't used by anything, and the kernel should be set appropriately
by whatever script is booting the kernel, not imposed by the bootloader.

mem might be useful, but the current value is pretty bogus, since it
includes nvmem options that make no sense for an upstream kernel, and
equally should not be required for any downstream kernel. Either way, this
is also best left to the kernel boot script.

smpflag isn't used by anything, and again was probably intended to be a
kernel command-line option better set by the kernel boot script.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: flesh out bootcmd

This implements a useful bootcmd for Tegra. The boot order is:

* If USB enabled, USB storage
* Internal MMC (SD card or eMMC)
* If networking is enabled, BOOTP/TFTP

When booting from USB or MMC, the boot script is assumed to be in
partition 1 (although this may be overridden via the rootpart variable),
both ext2 and FAT filesystems are supported, the boot script may exist
in either / or /boot, and the boot script may be named boot.scr.uimg or
boot.scr.

When booting over the network, it is assumed that boot.scr.uimg exists
on the TFTP server. There is less flexibility here since those setting
up network booting are expected to need less hand-holding.

In all cases, it is expected that the initial file loaded is a U-Boot
image containing a script that will load the kernel, load any required
initrd, load any required DTB, and finally bootm the kernel.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: whistler: reduce and comment network cfg options

CONFIG_CMD_PING/NFS aren't required for Whistler to boot.

Add some comments.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: seaboard: add support for USB networking

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: add UART1 on GPU funcmux entry

TrimSlice uses UART1 on the GPU pingroup.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: sync SDIO1 pingroup enum name with TRM

Signed-off-by: Lucas Stach <dev@lynxeye.de>
CC: Tom Warren <twarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: add SDIO1 funcmux entry for UARTA

This is based on top of:
tegra: add alternate UART1 funcmux entry
tegra: add UART1 on GPU funcmux entry

v2: remove enum change

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Tom Warren <twarren@nvidia.com>
CC: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: add SDMMC1 on SDIO1 funcmux entry

This will be used on TrimSlice.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: Compulab TrimSlice board support

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: harmony: add device tree support

... to enable USB host support, which enables Ethernet support.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: paz00: add device tree support

... to enable USB host support, which enables Ethernet support.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: Correct PLL access in ap20.c and clock.c

Correct this warning seen by Albert:

ap20.c:44:18: warning: array subscript is above array bounds

There is a subtle bug here which currently causes no errors, but might
in future if people use PCI or the 32KHz clock. So take the opportunity
to correct the logic now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: override compiler flags for low level init code

Override -march setting for tegra to -march=armv4t for files that are
necessary for low level init on tegra.

The recent change to use -march=armv7-a for armv7 caused a regression
on tegra because tegra starts boot on a arm7tdmi processor before
transferring control to the cortex-a9.  While still executing on the
arm7tdmi there are calls to getenv_ulong() and memset() that cause an
illegal instruction exception if compiled for armv7.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>