arch/arm/mach-tegra/sleep.S: use '.arch_extension sec' for gcc >= 4.5.2 when switching to secure world
arch/arm/mach-tegra/headsmp.S: fix 'Error: .size expression for __tegra_cpu_reset_handler_data does not evaluate to a constant'
pcie.c: Fix section mismatch
board-endeavoru.c: fix section mismatch
hda_intel.c: fix section mismatches
tlv320aic3008.c: fix section mismatch
mach-tegra: clock.c: Check if pointer is valid, fixes random reboots, but not the root issue
mach-tegra: cpu-tegra3.c: Don't put sth down that isn't there, fixes reboot issue at it's root.

I will keep the error checks from the previous commit in place though.
If future updates from hTC/Nvidia break anything, we will be safe this way ;)
common.c: fix NP oops
tegra3_clocks: remove 102Mhz min clock frequency lock while screen is on

This allows 51Mhz clocks while the screen is online.
board/pcie: fix debug section mismatch
fix compiling error
update bt -> 3.1 for rfkill to work on AOSP
cpufreq: interactive: update to Nexus 7 baseline
ARM: tegra: dvfs: Update Tegra3 CPU DVFS tables

Bug 817679
Bug 841336

Change-Id: I9a9d9e7a03b64774b1d2ebd8533be85582827515
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/71755
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
modified for HTC one X kernel from nv reference by faux123
ARM: tegra: clock: Skip clocks in Tegra3 CPU set rate

Reduced Tegra3 CPU clock frequency by skipping every other clock
during clock rate change when either old or new rate is above 800MHz.
This limits max possible frequency jump when switching between main
and back-up clock sources.

Added sysfs entry for minimum time to run at reduced frequency (in
microseconds): /sys/module/tegra3_clocks/parameters/skipper_delay.
Default delay is 10us. It should be adjusted by board initialization
code based on board power distribution grid capabilities.

Bug 868692

Change-Id: I0c32a3eb91512ba610c4f842bd22ef08e9c889d0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/72682
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-on: http://git-master/r/75140
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
modified for HTC One X kernel from nv reference by faux123
ARM: tegra: dvfs: Add alternative dvfs frequency limits

Added an option to specify alternative dvfs frequency limits for each
tegra clock domain. These alternative limits can be applied in some
particularly extreme (e.g., slow) corner of process-temperature space
with no effect on regular limits for the rest of the space.

Bug 913884

Change-Id: I05e319b60f6dc6f4e7f15c7e677e5a3bce77f201
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/70188
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/75614
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
ARM: tegra: dvfs: Add cold zone Tegra3 CPU dvfs limits

Added alternative frequency limits for Tegra3 CPU. These limits are
applied only in the lowest CPU EDP temperature zone, and the offset
from regular Tegra3 dvfs frequencies is set at -50MHz at all scaling
voltage steps. Offset values as well as temperature threshold are to
be updated per characterization.

Bug 913884

Change-Id: Ia420f54b4c9fdc966e44d0269d45d9164d751b5f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/70189
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/75615
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
modified for HTC one X kernel from nv reference by faux123
Revert "ARM: tegra: dvfs: Set Tegra3 VDD_CORE min to 1.1V"

This reverts commit db462754240e2ee6cf85e1253b1475a330ea0dfe -
temporary work-around for bug 870300 is no longer needed.

Change-Id: I3b76c01eef89cd80134210926e6623f0494626dd
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/89874
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
ARM: tegra: dvfs: Add Tegra3 x7 CPU dvfs entries

Bug 841336
Reviewed-on: http://git-master/r/76912

Change-Id: I2806c8e4f08af49edf57f00a43438b1503d6aedb
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78706
Reviewed-by: Automatic_Commit_Validation_User