TUNA: Regulator: Set VAUX3 to 2.7v and VUSIM to 1.7v
DRIVERS: MISC: Add OMAP4430 Static Thermal Policy

Adding Static Thermal Policy for OMAP4430.
Added new driver module to control max opp duty cycle.

Change-Id: I9781f4db19b055eefb0a4bf28bf5f5c516307509
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: Eugen Mandrenko <ievgen.mandrenko@ti.com>
I2C: OMAP2+: Introduce I2C IP versioning constants

These represent the two kinds of (incompatible) OMAP I2C
peripheral unit in use so far.

The constants are in linux/i2c-omap.h so the omap i2c driver can have
them too.

Change-Id: I42d2c7822985a9bc4124986d7cd786565006466f
Cc: patches@linaro.org
Cc: Ben Dooks <ben-linux@fluff.org>
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andy Green <andy.green@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Revert "OMAP4: enable counter_32k hwmod structure"

This reverts commit a61e53dc5dc35931e1090bf997657179d73e7d79.
OMAP: hwmod: fix the i2c-reset timeout during bootup

The sequence of _ocp_softreset doesn't work for i2c. The i2c module has a
special sequence to reset the module. The sequence is
 - Disable the I2C.
 - Write to SOFTRESET bit.
 - Enable the I2C.
 - Poll on the RESETDONE bit.
The sequence is implemented as a function and the i2c_class is updated with
the correct 'reset' pointer.  omap_hwmod_softreset function is implemented
which triggers the softreset by writing into sysconfig register. On following
this sequence, i2c module resets properly and timeouts are not seen.

Change-Id: I742f18d6db724235a38923312be64723316c9ef1
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: Avinash.H.M <avinashhm@ti.com>
[paul@pwsan.com: combined this patch with a patch to remove
 HWMOD_INIT_NO_RESET from the 44xx hwmod flags; change register
 offset conditional code to use the IP block revision; minor code
 cleanup]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
OMAP3+: HWMOD: Add the default clockactivity for I2C

For I2C clockactivity field is added for OMAP3 and OMAP4 that defines how the
interface (OCP) and functional (system) clocks behave when the I2C module is
idle.

The configuration of the clock activity bit field (per TRM) is as follows:
0x0: Both clocks can be cut off
0x1: Only OCP clock must be kept active; system clock
     can be cut off
0x3: Both clocks must be kept active
0x2: Only system clock must be kept active; OCP clock
     can be cut off

The patch makes 0x2 the default for OMAP3 and OMAP4.

Change-Id: Iaa27250ab996becd398a58e8459121e62b384da4
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
OMAP4: PM: Fix L3INSTR/IVAHD save/restore context logic

The L3INSTR/IVAHD contexts are restored
when MPU is going through both OSWR and OFF states
on HS/EMU devices (not only OFF state).

Change-Id: I516a9e88932485f6d77c529602647f7199fa7212
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
OMAP4: PM: Program pwrst of each pwdm as per their supported state

Configure next power state of each power domain based on their
supported state. This will be done one time during initialization of
power_setup function. Device can change their power domain state runtime
based on dev latency requirement.
Also, this API will be called during suspend path as well to make sure each power
domain has been configured the right state before entering OFF transition.

Change-Id: I030f2b5df3186cb147e919d9d98dbcdfc75269a8
Signed-off-by: Gilles-Arnaud Bleu-Laine <gilles@ti.com>
Signed-off-by: Girish S G <girishsg@ti.com>
OMAP4: PM: Regulator: suspend prepare and finish call.

Before entering suspend configure regulator resource to desired
state.
While resuming from system wide suspend, the  un-connected regulator
resource's are not turned off. By calling regulator_suspend_finish, it
ensures that resources will be gated if the usecount = 0.

Change-Id: I0cff12f24b1c0879fdb27e079baf1c6793f5a1d3
Signed-off-by: Ambresh K <ambresh@ti.com>
OMAP4: PM: Re-factor configuring pwrst settings

Refactoring configure_pwrst to allow setting of pwrdm states from init
and suspend path as well.
This takes care of:
- Allow achievable state to be programmed from init and suspend path
- Error if pwrdm state is not set.
- Remove duplication of code.

Change-Id: I1a42566cc83d67b870e9fe1076522ea8ce7ccb4a
Signed-off-by: Girish S G <girishsg@ti.com>
OMAP4: PM: L3INIT allow only CSwR

L3INIT powerstate supports ON, INA, CSwR and OSwR. If OSwR
is enabled EHCI/remote wakeup feature is broken. Till EHCI
IO wakeup is in place allow only CSwR on L3INIT. Power impact
in idle path will be less than 1mA.

REVISIT: For setting OSwR on L3INIT with proper fix in EHCI for IO
wakeup.

Change-Id: I64ada3a307d6cd81483ce6bba684f166d76868b6
Signed-off-by: Girish S G <girishsg@ti.com>
Patch for Touchwake by Ezekeel

After simulating a power button press delay the mutex unlock to prevent spurious additional presses after that.
OMAP4: PM: fix for "re-factor configuring pwrst setting"

The error has been admitted in merge branch 3ae032677.
The additional source code in function pwrdms_setup(...)
was added in patch "OMAP4: PM: Re-factor configuring pwrst
settings" commitId faa96477.

Change-Id: Ie0d5efbaa41e7b5eab361292d621b8fe98bd69ec
Signed-off-by: Eugen Mandrenko <ievgen.mandrenko@ti.com>
ASoC: McPDM: Remove extra CTRL register clear

Reset value of MCPDM_CTRL is 0, so there is no need to do an
extra clear write during McPDM DAIs probe(). One important
advantage of removing this extra register access is that it
removes the dependency on the McPDM clock which is supplied
externally.

Change-Id: I8bcad0494cc389523172b0f9ae5834e0f0f96326
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
net: wireless: bcmdhd: Allow 80211_HT capability

Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
kernel: reduce sleep duration in wait_task_inactive

Sleeping for an entire tick adds unnecessary latency to
hotplugging a cpu (cpu_up).

Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
(cherry picked from commit 099aa69b9cfb6f4c5b56dd1d1d06ce9ef92cf2d5)

Change-Id: Ic3dd51cb4d5b9acdc1ee3270e87d8ff0cc2e8287
Signed-off-by: Ram Kumar Chakravarthy Chebathini <rcheba@codeaurora.org>
OMAP: clock: fix race in disable all clocks

clk_disable_unused is invoked when CONFIG_OMAP_RESET_CLOCKS=y.
Since clk_disable_unused is called as lateinitcall, there can
be more than a few workqueues executing off secondary CPU(s).
The current code does the following:
a) checks if clk is unused
b) holds lock
c) disables clk
d) unlocks

Between (a) and (b) being executed on CPU0, It is possible to
have a driver executing on CPU1 which could do a get_sync->clk_get
(and increase the use_count) of the clock which was just about
to be disabled by clk_disable_unused.

We ensure instead that the entire list traversal is protected by
the lock allowing for parent child clock traversal which could be
potentially be done by runtime operations to be safe as well.

Change-Id: Iea5201233d89b8417576df4ed9026e1c05001596
Reported-by: Todd Poynor <toddpoynor@google.com>
Signed-off-by: Nishanth Menon <nm@ti.com>