Use roldword intrinsic instead of function rotl.

These days we don't need the hand coded rol anymore.

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21644 3ad0048d-3df7-0310-abae-a5850022a9f2
Introduce split_into_shifter_const to ARM-Code Generator

This functions tries to split up a 32-bit value into two shifter
constants. This approach finds a broader range for two shifter constant
combinations.

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21645 3ad0048d-3df7-0310-abae-a5850022a9f2
Improve loading of ARM constant values

*  use split_into_shifter_const to reduce the MOV/ORR combination to a
   single check and allow a broader rang of combinations.
*  Introduce MVN/BIC combination to load values which have more 1 than 0
   bits set (like small negative values)

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21646 3ad0048d-3df7-0310-abae-a5850022a9f2
Split OP_ADD, OP_SUB, OP_AND and OP_ORR into multiple instructions if that can avoid constant construction or even loading from a pool.

OP_ADD, OP_SUB, OP_ORR will be split into two intructions if possible when a load/const
construction is required.

OP_AND is a bit different, because we can't just split it up, but we try
to find a two instruction BIC-equivalent to it.

Till now code like

a:= a and $FFFF;

produced code like

mov r0, $FF00
orr r0, r0, $FF
and r1, r1, r0

With this addition we produce code like:

bic r0, r0, $FF00
bic r0, r0, $FF

Saving us at least a cycle and in some cases also a load from the
constant-pool.

This uses the new split_into_shifter_const function.

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21647 3ad0048d-3df7-0310-abae-a5850022a9f2
ARM assembly versions of strupper and strlower

This is about 1/3 faster than the generic code.

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21648 3ad0048d-3df7-0310-abae-a5850022a9f2
Use bx lr in ARM-RTL for armv5

ARMv5 supports the BX instruction.
BX usually is better supported by Branch Prediction Units than mov pc,lr.

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21649 3ad0048d-3df7-0310-abae-a5850022a9f2
* Fixed internal linker entering infinite loop if script contains empty lines or comments.


git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21650 3ad0048d-3df7-0310-abae-a5850022a9f2
"SizeInt" inside the compiler references the "size of an int" on the Host platform. What we want for writing size information in PPUs for Generics is "ASizeInt" which is the "size of an int" of the target platform. This fixes Mantis #20947.

* pscanner.pas: change SizeInt to ASizeInt for tokenreadsizeint and tokenwritesizeint and change necessary other locations for record- and replaytokenbuffers
+ Added a test in the hope that some test-platforms do cross platform (e.g. win32 => win64) compilation.

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21651 3ad0048d-3df7-0310-abae-a5850022a9f2
 * fix from mantis #22156 to wholly implement iunknown or not.
   TAbstractEventSink no longer descends from Tinterfacedobject.
   Patch by Ludo


git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21652 3ad0048d-3df7-0310-abae-a5850022a9f2
* Added compact image support by Mattias Gaertner

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21653 3ad0048d-3df7-0310-abae-a5850022a9f2
* Added compact image support by Mattias Gaertner

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21654 3ad0048d-3df7-0310-abae-a5850022a9f2
* Added fpimggauss.pp unit from Mattias Gaertner

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21655 3ad0048d-3df7-0310-abae-a5850022a9f2
Fix for Mantis #21064.

* pgenutil.pas: factor out the reading of generic specialization parameters (parse_generic_specialization_types) and the generation of a generic type name (generate_generic_name)
* pdecsub.pas, parse_proc_head:
    * also allow an interface alias declaration if an identifier is followed by a "<" (which starts a specialization)
    + add a procedure "consume_generic_interface" which parses such a specialization (by using "parse_generic_specialization_types") - this is needed, because "consume_generic_type_parameter" can (and should not!) handle "ISomeIntf<Integer, T>" or (somewhen in the future) "ISomeIntf<TSomeOtherGeneric<T>>" - and finds the correct symbol for the interface (by utilizing the "generate_generic_name" function)
    * generate the correct mapping entry (for the generic it's only needed for checking (if any), but for a specialization it's essential that we reference the correct specialization)

+ add tests which were included with the issue and also two additional ones

Note: In non-Delphi modes an interface alias can be done like in Delphi mode; "specialization" is not necessary and furthermore not even allowed!

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21656 3ad0048d-3df7-0310-abae-a5850022a9f2
Always try to present file/line information for generics even if no source is available or the unit was compiled as release unit. This allows IDE like Lazarus to correctly navigate to an error or warning even if the unit containing the generic was compiled as a release unit.

* pscanner.pas, tscannerfile.replaytoken: remove the checks for "sources_avail" and always update the read file/line information 
* fppu.pas, tppumodule.readsourcefiles: always load at least the filenames which were used when compiling the unit from the ppu file, so that file/line information will be correctly shown, but don't touch the "sources_avail" flag of the tppumodule

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21657 3ad0048d-3df7-0310-abae-a5850022a9f2
Optimize 8/16 OP_NOT on ARM

This now generates:

mvn r0, r0, lsl #24/#16
mov r0, r0, lsr/asr #24/#16

The lsr/asr might be folded into a following instruction, making the
whole operation 1 cycle instead of 2-3 with the previous solution.

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21658 3ad0048d-3df7-0310-abae-a5850022a9f2
Add LsrAndLsr Peephole Optimizer for ARM

Remove the superfluous and in:
mov r0, r0, lsr #24
and r0, r0, #255

Doing this allows for better shift-folding later

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21659 3ad0048d-3df7-0310-abae-a5850022a9f2
Folded Add/Sub/Or Splitter, lots of debug output

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21660 3ad0048d-3df7-0310-abae-a5850022a9f2
* Overloaded MemPos_ExeSection and DataPos_ExeSection accepting a TExeSection instead of name.

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21661 3ad0048d-3df7-0310-abae-a5850022a9f2
* ELF relocation cleanup/improvement:
  + Store size of relocation and explicit addend in TObjRelocation (reusing 'orgsize' field for the latter). This removes need for reading addends back from section data, addends are stored in full 64 bits and therefore not truncated.
  + Relocation style is now controlled by relocs_use_addend variable instead of $ifdef's.
  - Removed (never working) checks forbidding relocations of readonly sections. At the linking stage readonly sections *can* have relocations, executable stage is different matter to be handled elsewhere.
  - removed ugly hack with mapping 32-bit absolute relocations to RELOC_RVA.
  + support 64-bit relative relocations.
  * actualized list of x86_64 relocations.


git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21662 3ad0048d-3df7-0310-abae-a5850022a9f2
 * Define both mipseb and mips for non endian-little MIPS compiler

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@21663 3ad0048d-3df7-0310-abae-a5850022a9f2