ARM: OMAP2+: PRM: Add OMAP5430 register and bitfield files

Add the new defines for OMAP5430 prm module registers.

XXX: Need to add only the delta vs OMAP5430 if possible.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
ARM: OMAP2+: CM: Add OMAP5430 register and bitfield files

Add the new defines for OMAP5430 cm registers.

XXX: Need to add only the delta vs OMAP5430 if possible.
ARM: OMAP2+: PRCM: Add OMAP5430 local MPU PRCM registers

Add the PRCM MPU registers for OMAP54XX platforms.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
ARM: OMAP2+: SCRM: Add OMAP5430 header file.

Adding the omap5 specific header for scrm module.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
ARM: OMAP2+: clockdomain: Add OMAP5430 data and headers

Add the headers files and the data file to describe all clock domains
inside the OMAP5430 ES1.0 soc.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
ARM: OMAP2+: powerdomain: Add OMAP5430 data and headers

Add the headers files and the data file to describe all power domains
inside the OMAP5430 ES1.0 soc.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
ARM: OMAP2+: clock: Add OMAP5430 full clock tree.

Add the clock data for omap54xx platforms.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
ARM: OMAP2+: hwmod data: Create initial OMAP5430 data.

Adding the hwmod data for OMAP54xx platforms.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
ARM: OMAP5: hwmod: Update AESS memory bank and data.

Update AESS memory banks for ABE probing.

Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
ARM: omap: hwmod: warn only when clkdm is missing from both clk and hwmod

On OMAP4+, the clkdm association is moved to hwmod while on older OMAPs'
its associated with a clk.
Hence look for a clkdm in both clk and hwmod and warn only when
its missing in both. Also fix the pr_warning() to print the correct
hwmod name.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
ARM: OMAP2+: PM: Create DSP, IVA and L3_MAIN devices for OMAP5

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
ARM: OMAP2+: hwmod data: Add srst_udelay to OMAP5 ISS

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
ARM: OMAP5: hwmod-data: Hacks for 3.4-rc6

Signed-off-by: R Sricharan <r.sricharan@ti.com>
ARM: OMAP2+: voltagedomain: Add OMAP5 voltage domain data

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
ARM: OMAP5: Initialise voltage, power, clock domains

Include the data in to build and Initialise the voltage, power,
clock domains and the clock table.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
ARM: OMAP5: clock/hwmod data: Hacks for now !!

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Build a uImage with dtb already appended

Do not commit to mainline; this is a useful hack only for now.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
OMAPDSS: HDMI: Disable PLL properly in case of error at power_on

Small patch to disable the PLL appropriately before runtime_put in case
an error occurs while enabling the PHY.

Signed-off-by: Ricardo Neri <ricardo.neri@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
OMAPDSS: DISPC: Use msleep instead of blocking mdelay

We have no reason to block in the error handler workqueue, so use msleep.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
OMAPDSS: DISPC: Improvements to DIGIT sync signal selection

DSS code wrongly assumes that VENC is always available as source for the external
sync signal for the display controller DIGIT channel. One cannot blindly write/read
the value of DSS_CONTROL[15] as in certain processors (e.g., OMAP5) this operation
may not be valid. If the the sync source is not read correctly, the callers of
dss_get_hdmi_venc_clk_source might make wrong assumptions about, for instance,
video timings.

Logic is added to correctly get the sync signal based on the available displays
in the DIGIT channel. The source is set only if both VENC and HDMI are supported.

Signed-off-by: Ricardo Neri <ricardo.neri@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>