SCHEDULER: Autogroup patch group by current user android UID instead of task ID
drivers/cpuquiet/governors: make balanced default
board/tegra3_speedo: fix minor warnings
fs/dyn_sync_cntrl: dynamic sync control

The dynamic sync control interface uses Android kernel's unique early
suspend / lat resume interface.

While screen is on, file sync is disabled
when screen is off, a file sync is called to flush all outstanding writes
and restore file sync operation as normal.

Signed-off-by: Paul Reioux <reioux@gmail.com>
Revert "drivers/cpuquiet/governors: make balanced default"

This reverts commit 18512d356b01bd6bd95f0bf7313fb8b110739bd3.
ARM: tegra: cpuquiet: Notify the cpuquiet governor when the driver is busy

Added generic busy/free notifiers that the driver can invoke to let the
governor know that it cannot process further core online/offline
requests (invoked in our case whenever we switch to the LP cluster).

Change-Id: I5e3f7f28f38806a7f87050e8d0c8d2f2cf7521aa
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
ARM: tegra: cpuquiet: Fix cpuquiet notifiers

The notifiers now properly fire on every cluster switch

Change-Id: I381301cf62f25b49532326cc7759696c7f6797b7
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
cpuquiet: Runnable threads governor

[perf] The runnable threads governor only looks at the average number of
runnables in the system to make a decision when bringing cores
offline/online. First pass; tweaks thresholds and delays to reduce
decision latency to about ~50-70ms per core (from ~100-150ms per core)

Change-Id: Idd3b268a74a8f56ad3fc0e5c7f388174d1b6611f
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
cpuquiet: Add notifiers for the runnables governor

The governor stops sampling whenever the device is busy and starts its
sampling loop when the device is free.

Change-Id: I6b4dae94a60f8091d34400028a8d1f58faa51380
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
drivers/cpuquiet/governors/runnable_threads: fix typo derp
ARM: tegra: Remove duplicate clock inits

Change-Id: I80c384d1aa4b1e45a4542acbde6b904f4a014aff
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
drivers/cpuquiet/governors: make balanced as default governor
asoc:tegra: Enable I2S tx in voice call

Associated with I2S there is a playback ref count, when
we open the I2S for plyabck it is incremented and during
voice call we check if its not zero then enable the tX.
This logic fails if the start-trigger is not called for the prior
playback stream. Hence we unconditionally enable the tx,
which is harmless

Bug: 981806

Change-Id: I66aafda596e2b2b03745e93f3e851dedc3b8ef5d
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/101996
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
asoc: tegra: MAX98088 machine: Add support for setting bias level

Allow setting bias level to turn off clock extern1 when codec
is idle for enterprise board. (Maxim 98088 codec)

Bug 984678

Change-Id: Ib01be71362ab0c5525f570693b41db73777875e6
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Reviewed-on: http://git-master/r/102240
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
asoc: tegra: Add TDM mode support

Added TDM mode support in I2S driver.
Added support functions in AHUB to pass audio/client bits.
Added support functions in AHUB to pass audio/client channels.
Fixed the stopping of I2S/TDM by clearing the fifo.

Bug 948478

Signed-off-by: Nitin Pai <npai@nvidia.com>
Change-Id: I560f4ab5b71e4833931934275272a094241241fe
Reviewed-on: http://git-master/r/103840
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
asoc: tegra: P1852 machine: Add TDM mode settings

Pass TDM mode variables for CPU dai.
Codec Id is not passed properly, hence use dual instances
of the dai_link operations.

Bug 948478

Change-Id: I13188d5001b8f9c2f2f67ee7a9d3bec89311037d
Signed-off-by: Bob Johnston <bjohnston@nvidia.com>
Reviewed-on: http://git-master/r/103793
Reviewed-by: Nitin Pai <npai@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
asoc: tegra: utils: fix for multiple instances of extern1 clock.

The extern1 codec clock was not getting switched off whenever
codec goes below BIAS_OFF level. Moreover, there were two
instances of extern1 clock whenever codec was on. Reason behind
this was that, those codecs for which probe function was called
and were not present on board, turned on their extern1 clock, but
clean up routine (for switch device register failure) was not able
to turn off the clock. With this change, a conditional check is
put to turn off the clock.

(Bug 984678)
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>

Change-Id: I585ecf73c0cabca856592dcd84e67588dfe13beb
Reviewed-on: http://git-master/r/104073
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Ankit Gupta (Engrg-SW) <ankitgupta@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
ASoC: resolve compilation time warnings

Bug 949219

Change-Id: If7b4dd928cc5a808fd1a674bcc5f31c9a396a043
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/103772
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
ASoC: Tegra: Make dma_req count easily configurable

Instead of always using 2 dma_req count pass max dma_req_count
through a macro. Ensure dma_req_count does not cross
period_count.

Bug 968814

Change-Id: Iddfbd77017992ccb8c90441213e191133dadb347
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/97915
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
asoc: tegra: Add PCM driver for TDM mode

Modified existing pcm driver to take dma mode/ hw structure.
Exported the functions needed for other pcm mode driver.
Added new TDM mode hw param structure.
Added pass SINGLE/DOUBLE buffered dma mode params.

Bug 948478

Change-Id: I58309d52748f813b3303a8d6a052fbb6cc7ca87a
Signed-off-by: Nitin Pai <npai@nvidia.com>
Reviewed-on: http://git-master/r/99146
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>