m2: Make iommu domains platform devices

Change-Id: I78d0dfc3aa45ff092817b2e9989ac0ee79b40f19
gpu: ion: Check return code of msm_allocate_iova_address

In the IOMMU heap, the return value of msm_allocate_iova_address
needs to be checked instead of the value of the iova address.
Check the return value instead.

Change-Id: I4554515d17c926a7dd738824aff21eb65d2ba56a
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>

Conflicts:

	drivers/gpu/ion/ion_iommu_heap.c
msm: Add api to register virtual domain space

Going forward, clients may want to have more control over the
virtual address space for iommu domains. Add API to support
clients registering virtual address space information. Current
clients are internally converted to use the new APIs.

Change-Id: Iaec9f1cd150eefc02ce22c34790494b61f21eb12
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>

Conflicts:

	arch/arm/mach-msm/include/mach/iommu_domains.h
	drivers/gpu/ion/ion_iommu_heap.c
msm: Correctly lookup iommu domains.

Correctly compare against the value in the domain
structure when looking up domains.

Change-Id: Ibeb4ffff4ee14b651797668606a8e81f102b3a19
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
(cherry picked from commit 723970deb6b98b4577689eb413378051dbf3fe72)

Signed-off-by: Dhivya Subramanian <dthiru@codeaurora.org>
gpu: ion: Check return code of msm_allocate_iova_address

In the IOMMU heap, the return value of msm_allocate_iova_address
needs to be checked instead of the value of the iova address.
Check the return value instead.

Change-Id: I4554515d17c926a7dd738824aff21eb65d2ba56a
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
video: msm: Migrate away from subsystem map APIs

This reverts commit 526068c5f872b805bfb6c4a66365d2483f2f1237.
This used the split domain names for display and rotator
subsystems compared to earlier version.

Change-Id: I385de26a0cfb5a976ead5f2687216fbab0104045
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp4_overlay_dsi_video.c
	drivers/video/msm/mdp4_overlay_lcdc.c
Revert "msm_fb: display: Add MDP IOMMU detach support for DTV"

This reverts commit fa853b91ddfe4ac5eb9c77f9c409223d9b3cc0e4.

Change-Id: Id1d127080040962c1ad33c9d4bca5005415283da
Signed-off-by: Nagamalleswararao Ganji <nganji@codeaurora.org>
Signed-off-by: Shruthi Krishna <skrish@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp4_overlay_dsi_video.c
Revert "msm_fb: display: Attach and detach MDP IOMMU on suspend/resume"

This reverts commit aaf74ca34581feb8be797a6d8793824e73fecf67.

Conflicts:

	drivers/video/msm/mdp4_overlay.c

Change-Id: If9ec76cd040b0e834301d3d9ddbbab04b38b7a7e
Signed-off-by: Nagamalleswararao Ganji <nganji@codeaurora.org>
Signed-off-by: Shruthi Krishna <skrish@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp4_overlay.c
	drivers/video/msm/mdp4_overlay_dsi_video.c
msm: iommu: Split rotator/mdp iommu domains

Finer granularity is needed when mapping into the IOMMU's for
rotator and mdp for secure playback. During secure playback
HLOS will only have access to map into one context bank. The
other context bank is secured and programmed by TrustZone.

Divide DISPLAY_DOMAIN into DISPLAY_WRITE_DOMAIN and
DISPLAY_READ_DOMAIN. Divide ROTATOR_DOMAIN into ROTATOR_SRC_DOMAIN
and ROTATOR_DST_DOMAIN.

Change-Id: I2d67525d6026b8a1fb2f2cb00e4bb118c8eb6f27
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>

Conflicts:

	arch/arm/mach-msm/board-8064-display.c
	arch/arm/mach-msm/board-8064.c
	arch/arm/mach-msm/board-8960-display.c
	arch/arm/mach-msm/devices-8930.c
	arch/arm/mach-msm/devices-msm8x60.c
	drivers/media/video/msm/wfd/wfd-ioctl.c
	drivers/video/msm/mdp4_overlay.c
msm_fb: display: Map framebuffer region in Display Write Domain

Framebuffer is currently mapped for Display read and rotator source
domains. For MDP writeback mode, Display write domain requires
framebuffer region and it is mapped at initialization time.

CRs-Fixed: 382550
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
Change-Id: Iba6fd0201a48fe1864bf42e9576f063cd58646fd
msm_fb: display: Add DMA and Overlay blt mode address to MDP driver

For handling split IOMMU domain cases, BLT mode requires DMA to map
for reads and Overlay for writes. DMA and Overlay blt addresses are
added to configure the respective registers to avoid page faults and
normal operation of supported panel interfaces.

Change-Id: Id007cf96588f817bcfe8559177abb073a9b00755
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp4.h
	drivers/video/msm/mdp4_overlay_dsi_cmd.c
	drivers/video/msm/mdp4_overlay_dsi_video.c
	drivers/video/msm/mdp4_overlay_dtv.c
	drivers/video/msm/mdp4_overlay_lcdc.c
	drivers/video/msm/mdp4_util.c
msm_fb: display: add spinlock to protect dma status.

During dma transfer to interface host the status of the dma
needs to be protected in the smp environment.

Change-Id: I02b4f046de7f693bb098343b7345c4aa6ca395bd
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp.c
	drivers/video/msm/mdp_dma.c
msm_fb: display: remove while loop in mdp ISR

As mdp interrupt is enabled on-demand, there is no need to have
a while loop to handle interrupts at random time. There is possibility
that mdp clock is turned off at first loop and ISR handler try to
read mdp status register again at second loop which cause system to reset.

Change-Id: I3716638974d8e24eda4a5146421d026b0ca85b4c
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp.c
video: msm: Don't make the framebuffer cached

The video framebuffer should not be cached when mapping into the
rotator or video domains. Change it.

Change-Id: I407c68ac21a030aff801ebfae01d360bb6bf338c
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
arm: Make the WFE macro unconditional

Remove the condition argument from the WFE macro in the
spinlock code so it can support a WFE fixup needed on
certain Krait CPUs.

Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
(cherry picked from commit 470d134db676e23982676061971a3a201f32b4a6)

Change-Id: I66a4ab60f2f26081630f79c95402f3494d00f664
Signed-off-by: Ramakrishna Prasad N <crpn@codeaurora.org>
arm: Convert spinlocks to new inline assembly style

Refactor the inline assembly code in spinlock.h in
preparation for supporting the Krait safe WFE sequence.

Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
(cherry picked from commit 68e1d7476e66911f9722a5dd82554e883cdb35ba)

Change-Id: If0b93f9f7dedbd81fd5473dfb1dd937cf5191f15
Signed-off-by: Ramakrishna Prasad N <crpn@codeaurora.org>
arm: Support the safe WFE sequence for Krait CPUs

Certain version of the Krait processor require a specific
code sequence to be executed prior to executing a WFE
instruction to permit that instruction to place the
processor into a low-power state.

Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
(cherry picked from commit 196f86e88fac14963de15bcd4413d306d777c1fe)

Conflicts:

	arch/arm/mach-msm/Kconfig

Change-Id: I48557c8c1efdde1aa0686dba2c6fd24e33f4e149
Signed-off-by: Ramakrishna Prasad N <crpn@codeaurora.org>
arm: Don't disable interrupts during WFE fixup

Disabling interrupts during the Krait WFE fixup can result
in deadlock if a thread tries to acquire a spinlock that is
released from an interrupt context. Instead of disabling
interrupts, modify the interrupt handler to reset the fixup
condition to put the processor into a safe state in the
event that the interrupt came in during the fixup window.

CRs-Fixed: 383670
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
(cherry picked from commit 1fd137804b489f7a0b4103d846cda13a07e26cdf)

Change-Id: Ie6d1adc42cc0a68bbbaeaa35f18cdda074d66cd5
Signed-off-by: Srivalli Oguri <oguri@codeaurora.org>