wireless: bcmdhd: move WLP2P to CFG80211

-Note: Current bcm4330_sta firmware doesn't appear to support p2p.
       It was also disabled (WLP2P) in the bcm4330 Samsung driver.
video: tegra: dc: use highest bandwidth setting

Apply the highest bandwidth setting before windows are programmed rather
than waiting for vblank.

Bug 914917

Change-Id: Iaaede9966191fdfc896bbbb19fbbadf9c4598bff
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/72301
Reviewed-by: Michael I Gold <gold@nvidia.com>
Tested-by: Michael I Gold <gold@nvidia.com>
video: tegra: dsi: Fix mipi continuous clk disable

Fix for stopping mipi high speed continuous clk.

Bug 903878

Change-Id: Id318fabd9c6aef116a60608c6f444846172f4803
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/72968
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
video: tegra: dc: Fix support for YUV422R

The tegra display controller supports the YUV422R planar surface format, but
this was not handled by the dc driver.

This change also fixes the YUV422RA planar format variation.

Bug 914375

Change-Id: I73ffd2f7434c71d8353c7e16ada5ac6b13fee86b
Reviewed-on: http://git-master/r/69446
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
(cherry picked from commit a085ef1eeb332116f102d82af25f7a6451eb6329)
Reviewed-on: http://git-master/r/73950
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
video: tegra: dc: consolidate underflow code

Move underflow handling out of the irq handler and into a workqueue.

Change-Id: I289d0a4c4e632a229e46d8e7f82e637409813807
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/74427
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Reviewed-on: http://git-master/r/75143
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Revert "video: tegra: dc: fix DSI pclk calculation"

This reverts commit 20f43dfc590d22ad1e80b7b948f108b17038b084.

Conflicts:

	drivers/video/tegra/dc/dc.c

This fix is no longer needed to boot.

Change-Id: Ie8d877207b6a1d70c63834f234d7a7cc68a372bf
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/74884
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/75151
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
video: tegra: dc: 1-shot bandwidth calculation

In one-shot mode(DSI) report emc rate as disabled to reduce bandwidth in
this idle state. Use this same tegra_dc_clear_bandwidth() function to handle
display disable for all types of displays.

Bug 914917

Change-Id: I84ca1341d71999b3558f9dadb103b258a1a6ab6f
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/74652
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Tested-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/75536
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
video: tegra: dc: enable emc clock on probe

When dc->emc_clk_rate goes from 0 to non-zero the dispX.emc clock is
enabled. This works with the sequence for probe and hotplug to have emc
clock in the correct enable/disable state.

Bug 927785
Bug 917769

Reviewed-on: http://git-master/r/76208

Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Signed-off-by: Jon Mayo <jmayo@nvidia.com>

Change-Id: I53cc8c5091967ce021dd3ec1e2bc75405dc8c45c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/76813
Reviewed-by: Automatic_Commit_Validation_User
video: tegra: dc: Add dc backup clock source support

Add backup clock source option in dc platform configuration. Use
backup source if fixed frequency pllp is specified as main source,
but its rate can not be divided into pixel clock within required
tolerance.

928260

Change-Id: I19bd9173276c6ea087f86361956809787875e979
Reviewed-on: http://git-master/r/76033
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/76818
Reviewed-by: Automatic_Commit_Validation_User
video: tegra: dsi: Refine the DSI clock calculation.

Reviewed-on: http://git-master/r/76406

Change-Id: I6e5b37a88d6be4ba2cc81417fe3eadfd129bc899
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77306
Reviewed-by: Automatic_Commit_Validation_User
video: tegra: host: Fix timeout syncpt incrs

In timeout, if there were more than one submits in queue, timeout
accumulated the sync point increments incorrectly. Fix accounting
of sync point increments.

Bug 915715

Reviewed-on: http://git-master/r/76831

Change-Id: I03223b1f65a4bdbae19e9c1b927451a80122bec4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77729
Reviewed-by: Automatic_Commit_Validation_User
video: tegra: host: enable_3d_scaling perms 0644

Allowing user to write sysfs nodes breaks CTS. 3D scaling should be
enabled in all current power modes and does not need to be toggled
by user / system code. Hence disabling user write permission.

Bug 906796

Reviewed-on: http://git-master/r/77058

Change-Id: I164926b5e65a05d63928c9e7c5970ea930cde37b
Signed-off-by: Ilan Aelion <iaelion@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77754
Reviewed-by: Automatic_Commit_Validation_User
drivers: video: tegra: Amend list of gr3d regs

Save and restore new gr3d registers. This is a workaround for
hardware not always initializing the registers to proper state
after un-powergating.

Bug 914785
Reviewed-on: http://git-master/r/75698

Change-Id: Id9d65d93d16daf68e29b1433b7dd3284cb439ffc
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78025
Reviewed-by: Automatic_Commit_Validation_User
video:tegra:hdmi: skip useless check

Don't check if dc is NULL after we've already dereferenced it.

Reviewed-on: http://git-master/r/63647

Change-Id: I0af6c829b6143b21a1f7de47a1ccfeac4bda99e0
Signed-off-by: Colin Patrick McCabe <cmccabe@nvidia.com>
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78434
Reviewed-by: Automatic_Commit_Validation_User
video: tegra: dc: Call display client disable before dc irq disable

dc irqs are required in display client disable to flag
stopping of dc stream.

Bug 930453
Reviewed-on: http://git-master/r/77808

Change-Id: I0e057ca14078d9e608cb32380123fade813c4041
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78898
Reviewed-by: Automatic_Commit_Validation_User
video: tegra: dc: set mode on probe

Set all parameters of the video mode on probe so that
FBIOGET_VSCREENINFO can query the current mode.

Bug 931383

Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/77433
(cherry picked from commit cb97eadc17a204fc8051fe5b9321a27905f890bb)

Change-Id: Ibd7fc05b1203044cc616c1ee628873385643c909
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/79997
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
video: tegra: hdmi: Enable HDA NULL sample inject support

When HDMI NULL sample injection is enabled codec inserts null samples
into the audio FIFO for each Azalia frame in which it did not receive
any samples. This support is needed to prevent audio loss for HDMI
devices from some vendor(e.g. sony).

Bug 924926

Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/79227
(cherry picked from commit 898fd83d94506de3bd604f75d25084d9bcb6dd9e)

Change-Id: I81f55cab52c92377b49ab94635c8e8aa394b6739
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/82724
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
ARM: tegra: video: Support basic color scheme

This patch contains:
1. Changes in fb.c to support the old color scheme for fbcon
2. Addition of color registration function in fb ops in fb.c

tegra_fb_setcolreg was removed by mistake in commit
f80e81610f4e2e3a9051b465a9176ac70f6913f1 (http://git-master/r/60201)
This patch contains a work around for the co-existence of both basic
and new color schemes.

Bug: 921567
Change-Id: I2b10d4956ce655511fc277d113e623d5d717ed5c
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-on: http://git-master/r/79397
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
ARM: tegra: video: Flip window for unblanking

This patch contains:
1. Addition of function tegra_fb_flip_win
2. Call to function tegra_fb_flip_win for an unblank event
tegra_dc needs a flip event after blank, to unblank sceen

Bug: 932784
Change-Id: Iec7e3f5ee898228e4efc90ca0efc2ca2b02021ae
Reviewed-on: http://git-master/r/79740
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
video: tegra: dc: Ignore suspend if DSI is disabled

DSI enables during suspend time host1x, and then checks if DSI is really
enabled. Now DSI first checks if it's enabled. If yes, it'll turn on host1x
and disable it.

Bug 887332

Change-Id: I206f908a62d0a56f0737c31634fa46613ca07d7e
Reviewed-on: http://git-master/r/82755
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>