build: Disable building of d3d1x

It's broken and unmaintained, and I'm tired of seeing bug reports about
it.
i965: Fix primitive restart on Haswell.

Haswell moved the "Cut Index Enable" bit from the INDEX_BUFFER packet to
a new 3DSTATE_VF packet, so we need to emit that.  Also, it requires us
to specify the cut index rather than assuming it's 0xffffffff.

This adds a new Haswell-specific tracked state atom to gen7_atoms.
Normally, we would create a new generation-specific atom list, but since
there's only one difference over Ivybridge so far, I chose to simply
make it return without doing any work on non-Haswell systems.

Fixes five piglit tests:
- general/primitive-restart-DISABLE_VBO
- general/primitive-restart-VBO_COMBINED_VERTEX_AND_INDEX
- general/primitive-restart-VBO_INDEX_ONLY
- general/primitive-restart-VBO_SEPARATE_VERTEX_AND_INDEX
- general/primitive-restart-VBO_VERTEX_ONLY

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
glx: move 'prime' var into #ifdef'd code block

To silence unused var warning.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
glapi/glx: rename 'table' variable to 'disp_table'

This fixes an issue where the local 'table' variable was hiding the
function parameter name in glGetColorTable(..., void *table).

This should be OK as long as there's never a GL entrypoint that uses
'disp_table' as a parameter name.

Note: This is a candidate for the 9.0 branch.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
radeon/llvm: Match fexp2 for SI.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
radeonsi: Handle TGSI_SEMANTIC_FOG.

Fixes exponential fog. The pixel shaders for linear fog seem to get
miscompiled still somehow.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
glsl: Count builtin uniforms against uniform component limits.

We don't fully process the builtin uniforms, but at least
num_uniform_components reflects reality now.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
i965: Add functions for comparing two brw_wm/vs_prog_data structs.

Currently, this just avoids comparing all unused parts of param[] and
pull_param[], but it's a step toward getting rid of those giant statically
sized arrays.

v2: Actually use the new function instead of just looking at its
    address.  This required changing the args to const pointers.
    (review by Kenneth)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965: Make the param pointer arrays for the WM dynamically sized.

Saves 26.5MB of wasted memory allocation in the l4d2 demo.

v2: Rebase on compare func change, fix comments.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (v1)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965: Make the param pointer arrays for the VS dynamically sized.

Saves 96MB of wasted memory in the l4d2 demo.

v2: Rebase on compare func change, change brace style.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
i965: Fix virtual_grf_interferes() between calculate_live_intervals() and DCE.

This fixes the blue zombies bug in l4d2.

NOTE: This is a candidate for the 9.0 branch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
radeonsi: Handle more SNORM formats.

Fixes piglit spec/EXT_texture_snorm/fbo-generatemipmap-formats (except for
what seems like a random fluke).

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
radeonsi: Float format fixups.

Fixes piglit spec/ARB_texture_float/fbo-generatemipmap-formats.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
nvc0/ir: add initial code to support GK110 ISA encoding
Set OSMESA_VERSION=8.

VERSION_NUMBER is not required anymore. So it will be removed.

Reviewed-by: Adam Jackson <ajax@redhat.com>
mesa: bump version to 9.1 (devel)

Now that branch 9.0 is created, bump the minor version in
master.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
mesa/msaa: Allow X and Y flips in multisampled blits.

From the GL 4.3 spec, section 18.3.1 "Blitting Pixel Rectangles":

    If SAMPLE_BUFFERS for either the read framebuffer or draw
    framebuffer is greater than zero, no copy is performed and an
    INVALID_OPERATION error is generated if the dimensions of the
    source and destination rectangles provided to BlitFramebuffer are
    not identical, or if the formats of the read and draw framebuffers
    are not identical.

It is not clear from the spec whether "dimensions" should mean both
sign and magnitude, or just magnitude.

Previously, Mesa interpreted "dimensions" as meaning both sign and
magnitude, so any multisampled blit that attempted to flip the image
in the X and/or Y direction would fail.

However, Y flips are likely to be commonplace in OpenGL applications
that have been ported from DirectX applications, as a result of the
fact that DirectX and OpenGL differ in their orientation of the Y
axis.  Furthermore, at least one commercial driver (nVidia) permits Y
filps, and L4D2 relies on them being permitted.  So it seems prudent
for Mesa to permit them.

This patch changes Mesa to allow both X and Y flips, since there is no
language in the spec to indicate that X and Y flips should be treated
differently.

NOTE: This is a candidate for stable release branches.
i965/gen6+: Adjust stencil buffer size after computing miptree layout.

Since Gen6+ stencil buffers use W-tiling (a tiling arrangement which
drm and the kernel are not aware of) we need to round up the width and
height of a stencil buffer to multiples of the W-tile size (64x64)
before allocating a stencil buffer.  Previously, we rounded up the
size of the base miplevel, and then computed the miptree layout based
on the rounded up size.  This was incorrect, because it meant that the
total size of the miptree would not be properly W-tile aligned, and
therefore we would not always allocate enough pages.

(Note: even though the GL API doesn't allow creation of mipmapped
stencil textures, it does allow mipmapping of a combined depth/stencil
texture, and on Gen6+, a combined depth/stencil texture is internally
implemented as a pair of separate depth and stencil buffers.)

For example, on Sandy Bridge, when allocating a mipmapped stencil
texture of size 128x128, we would first round up to the nearest
multiple of 64x64 (causing no change to the size), and then compute
the miptree layout (whose size worked out to 128x196).  Then we would
request an allocation of 128*196 bytes (6.125 pages), causing 7 pages
to be allocated to the texture.  However, the texture needs 8 pages,
since each W-tile occupies a page, and it takes 2 W-tiles to cover a
width of 128 and 4 W-tiles to cover a height of 196.

This patch changes the order of operations so that the miptree layout
is computed first and then the total size of the miptree is rounded up
to be W-tile aligned.

NOTE: This is a candidate for stable release branches.
i965/blorp: Clarify why width/height must be adjusted for Gen6 IMS surfaces.

Also add a clarifying comment for why the width/height doesn't need
adjustment for Gen7.

NOTE: This is a candidate for stable release branches.
i965/blorp: Change gl_renderbuffer* params to intel_renderbuffer*.

This makes it more convenient for blorp functions to get access to
Intel-specific data inside the renderbuffer objects.

NOTE: This is a candidate for stable release branches.