First part of VHDL runtime and build support, bug fixes for FPGA regressions
components/bias.hdl/bias.xml: fix end xml tag
components/specs/sma_spec.xml: fix to be consistent with new bias protocol and BSV
components/specs/splitter2x2_spec.xml: ditto
components/specs/stream32_protocol.xml: ditto
core/container/hdl_container/bin/src/ocpihdl_main.cxx: fussier parsing of numbers, more debug log
core/container/hdl_container/bin/src/testRpl_main.cxx: bring this back to life with update
-- deal with SMAs properly (as adpaters not workers)
-- no thread management for containers
-- fix order of parameters for external connections
core/container/hdl_container/impl/src/HdlContainer.cxx: finishconnect return value fixed
core/container/interfaces/api/src/OcpiContainerPort.cxx: force xfer role to be mandated after negotiation
-- external ports should offer roles too
-- ocpiAssert->ocpiCheck to make it work in non-debug too
core/dataplane/rdma_driver_interface/interfaces/include/DtSharedMemoryInternal.h: fix name case for method
core/dataplane/rdma_drivers/datagram/include/DtDataGramXfer.h: fix sense of flag in frame header
-- to be consistent with spec and FPGA implementation
-- remove redundant flag transfers
-- move transaction from member data to inheritance to simplify code
core/dataplane/rdma_drivers/datagram/src/DtDataGramXfer.cxx: ditto
core/dataplane/rdma_drivers/pci/include/DtPCIPioXfer.h: comment
core/dataplane/rdma_drivers/pci/src/DtPCIPioXfer.cxx: fix endpoint string to be consistent (;)
-- and critically, set the "address" member of the endpoint.
core/dataplane/rdma_drivers/pio/src/DtPioXfer.cxx: fix name case for method
core/dataplane/rdma_smb/host/src/OcpiHostSmemServices.cxx: ditto
core/dataplane/transport/impl/src/OcpiPort.cxx: don't clobber negotiated roles
-- and fill descriptor from endpoint info in more cases
core/dataplane/transport/impl/src/OcpiTransport.cxx: ditto
core/library/include/OcpiLibraryAssembly.h: bug fix to properly handle connectivity rejection
core/library/include/OcpiLibraryManager.h: ditto
core/library/src/OcpiLibraryManager.cxx: ditto
core/library/src/OcpiLibraryAssembly.cxx: ditto + fix to support when there are no ports at all
core/local/util/property/include/OcpiUtilProperty.h: add "volatile" and "initial" property attributes
core/local/util/property/src/OcpiUtilProperty.cxx: ditto
-- and allow impl properties to ADD readable and writable aspects to specs
core/local/util/property/src/OcpiUtilProtocol.cxx: allow protocol level overrides for:
-- both maxmessagevalues and zerolengthmessages
hdl/primitives/Makefile: add ocpi primitive library for inside-worker convenience IP
jkamd_env_linux_x86_64.sh: update to xilinx 14.1
jkvm_env_linux_x86_64.sh: update to xilinx 14.2
test/hdl/scripts/dmaTestBasic: use ocpihdl instead of swctl AND
-- remove passive mode since the generic transport code doesn't support it, for now.
test/hdl/scripts/loadBitStreamOnPlatform: reinstate the real dynamic loading of bitstreams
tools/cdk/examples/bias_xml/Makefile: add generation of and comparison to good data output
-- and a file size option to make big files
tools/cdk/examples/bias_xml/biasFile.cxx: add buffer size and buffering options
tools/cdk/examples/bias_xml/mkTestFile.cxx: add file size argument and good output file generation
tools/cdk/include/hdl/hdl-pre.mk: debug logging
tools/cdk/include/hdl/hdl-worker.mk: allow skeleton building without any synthesis tools
-- and add the "ocpi" primitive library by default.
-- and for vhdl force building _defs and _impl as source files, not headers (like verilog)
tools/cdk/include/hdl/xst.mk: add vhdl support and allow more xst options (thanks to Troy)
tools/cdk/include/lib.mk: improve "make new" support for component libraries, error messages etc.
-- allow specifying the hdl language
tools/cdk/ocpigen/ocpigen/include/wip.h: export log2 functions and Direction enum to all ocpigen files
tools/cdk/ocpigen/ocpigen/src/wip_HDL.cxx: major new VHDL code gen for wci support IP, still work-in-progress
tools/cdk/ocpigen/ocpigen/src/wip_OCP.cxx: make log2 functions external
tools/cdk/ocpigen/ocpigen/src/wip_RCC.cxx: fix a few alignment bugs in generated dataplane structures
tools/cdk/ocpigen/ocpigen/src/wip_parse.cxx: improve error checking on protocol overrides
-- and default HDL ports to WSI if nothing is specified.
NEW FILES: first pass at vhdl runtime support
hdl/primitives/ocpi/Makefile
hdl/primitives/ocpi/ocpi.vhd
hdl/primitives/ocpi/ocpi_impl.vhd
hdl/primitives/ocpi/ocpi_types.cpp_vhd
hdl/primitives/ocpi/ocpi_types_body.vhd
hdl/primitives/ocpi/ocpi_types_impl.cpp_vhd
Merge branch 'master' of ssh://github.com/opencpi/opencpi
Enable "active flow control"/DMA PULL that was simply prevented due to debug clutter.
core/dataplane/transport/impl/src/OcpiAFCTransferController.cxx: remove debug assert, improve debug logging
core/dataplane/transport/impl/src/OcpiTemplateGenerators.cxx: ditto
test/hdl/scripts/testDMA: fix when LD_LIBRARY_PATH was not set at all.