drisw: fix up context and apis for software context

This ports over from the dri2 code to the drisw bits. It means 3.1
core contexts now work for softpipe.

Signed-off-by: Dave Airlie <airlied@redhat.com>
glsl_to_tgsi: fix texture offset translation

I noticed the texelFetch offset test failed on 2D rect samplers
with GLSL 1.40. This is because I wrote the immediate->offset
translation wrong.

Fixed the translation to actually use the ureg info to set the
offsets up.

Signed-off-by: Dave Airlie <airlied@redhat.com>
st_glsl_to_tgsi: call ubo load pass earlier

This calls it in around the same place as the 965 driver.

Signed-off-by: Dave Airlie <airlied@redhat.com>
st_glsl_to_tgsi: fix ubo bools.

This should fix the ubo boolean tests, along with the previous
ubo loading fix.

Signed-off-by: Dave Airlie <airlied@redhat.com>
r200: fix broken tcl lighting

command mistakenly used vector instead of scalar emit (the more or less
identical code in radeon is already correct).
Seems like it would be broken ever since kms probably.
Should fix bugs 22576, 26809.
nv50: remove unused OpClassStr array

Signed-off-by: Brian Paul <brianp@vmware.com>
nvc0: comment unused nvc0_validate_zcull function

Signed-off-by: Brian Paul <brianp@vmware.com>
vega: remove unused variables

Signed-off-by: Brian Paul <brianp@vmware.com>
mesa syncobj: don't store a pointer to the set_entry

The set_entry pointer can become invalid if the set table
is re-hashed.

This likely will fix
https://bugs.freedesktop.org/show_bug.cgi?id=58012
(Regression since 56e95d3c)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
llvmpipe: increase texture target width to reflect increase

Now that we've gone over 7.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
llvmpipe: fix txq for 1d/2d arrays. (v3)

Noticed would fail, we were doing two things wrong

a) 1d arrays require the layers in height
b) minifying the layers field.

v2: don't change height code, fixup completely inside txq
as suggested by Roland.

v3: just add minify before texture array size

v1: Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
gallivm: Lower TGSI_OPCODE_MUL to fmul by default

This fixes a number of crashes on r600g due to the fact that
lp_build_mul assumes vector types when optimizing mul to bit shifts.

This bug was uncovered by 0ad1fefd6951aa47ab58a41dc9ee73083cbcf85c
clover: Install CL headers.

Note: This is a candidate for the stable branches.
softpipe: Use os_time_get_nano() everywhere.
st/egl/drm: only unref the udev device if needed

Fixes compiler warning:

drm/native_drm.c: In function ‘native_create_display’:
drm/native_drm.c:180:21: warning: ‘device’ may be used uninitialized in this function [-Wmaybe-uninitialized]
drm/native_drm.c:157:24: note: ‘device’ was declared here

Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
i965: Remove bogus flag_reg_nr field from bits3.

There's a flag subreg nr field in bits2 next to src0.vertstride, but
there shouldn't be anything in bits3 next to src1.vertstride.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965: Correct the name and usage of the flag subregister number field.

We've been calling it a register number, it's actually the subregister,
and things will get confusing once we start using it if it isn't fixed.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965: Add the new flag_reg_nr instruction field from IVB.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965: Print the flag reg updated by conditional modifiers.

This makes our output more consistent with other disasm tools, and
will be necessary when we start using f0.1.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965: Let brw_flag_reg() choose the flag reg and subreg.

We're about to start using the f0.1 subregister.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>