omap4/5: Use CPUDIR for .lds script

Signed-off-by: Thomas Weber <thomas@tomweber.eu>
am33xx: Do not call init_timer twice

We do not need to call init_timer both in SPL and U-Boot itself, just
SPL needs to initialize the timer.

Signed-off-by: Tom Rini <trini@ti.com>
arm,davinci: update for enbw_cmc board

- change gpio pin settings:

  - gpio pin 6[13] (PLC reset) default value low
  - gpio pin 6[0] (TPM reset) default value low
  - 4 new GPIO pins
      pin  i/o   name
    - 3[9] input Board Type
    - 2[7] input HW-ID0
    - 2[6] input HW-ID1
    - 2[3] input HW-ID2

- read board type and hw id from gpio pins on the enbw_cmc board,
  and use board type for setting up different gpio pin settings.

- do not pass "davinci_mmc.use_dma=0" to linux, as MMC now
  works with DMA.

- update logbuf support:
  store post word in RTC scratch register

- add support for configuring KSZ8864RMN switch through
  a config file on u-boot startup. For more infos see:
  doc/README.switch_config

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
ARM: OMAP4+: dmm: Take care of overlapping dmm and trap sections.

The DMM sections can be overlapping with each other, with
sections 3 to 0 having the highest to lowest priority in that
order. There could also be a section that is used trap the
unmapped Tiler entries and this trap section could be
overlapping with the actual sdram area.

So take care of the above scenarios while calculating the
size of the actual ram.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
ARM: OMAP5: dmm: Create a tiler trap section.

The unmapped entries in tiler space are set with
values 0xFF. So creating a DMM section of
size 16MB at 0xFF000000 with ADDRSPACE set to 0x2.

This way all the unmapped entry accesses to tiler
will be trapped by the EMIF and a error response
is sent to the L3 interconnect. L3 errors are
inturn reported to MPU.

Note that here the tiler trap section is overlapping
with the actual ddr physical space and we lose 16MB
out of the total 2GB.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
ARM: OMAP5: Align memory used for testing to the power of 2

get_ram_size checks the given memory range for valid ram,
but expects the size of memory to be aligned to the power
of 2. In case of OMAP5 evm board the memory available is
2GB - 16MB(used for TRAP section) = 2032MB.

So always ensure that the size of memory used for testing is
aligned to the power of 2.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
ARM: OMAP5: Correct the DRAM_ADDR_SPACE_END macro.

OMAP5 evm board has 2GB of memory. So correct the
macro to take in to account of the full dram size.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
DaVinci: fix ddr2 vtp i/o calibration

Previously, only the low 5 bits (NCH) were being transfered
from DDRVTPR to DDRVTPIOCR, the bits 5-9 where zeroed.

VTP_RECAL should be bit 15, not 18.

The only mainline board affected by this change is davinci_sonata.
The other Davinci boards define CONFIG_SKIP_LOWLEVEL_INIT.

However, if the program that loads u-boot on these boards
copied the code from u-boot, they will need fixed as well.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>

Please get tested by acks before applying, where tested by
means an overnight memory test.

Thanks
Troy
Revert "I2C: OMAP: detect more devices when probing an i2c bus"

This reverts commit 0e57968a215d1b9d271f3fa5bebeddeaea0c8075.

The short version of the original commit is that some i2c devices cannot
be probed via read as they NAK the first cycle, so try and probe via a
write that we abort before it writes to the device.  This however is not
allowed by the TRM for any of these parts.  The section on I2C_CON
(table 17-35 I2C_CON for am/dm37x for example) says you must not change
the register while STT has been set.  On these parts, the unpredictable
behavior that the chip exhibits is not problematic.  On OMAP4 however it
results in the chip being in a bad state:
Panda # i2c probe
Valid chip addresses: 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12
13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A
2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42
43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A
5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72
73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F
Panda # i2c md 50 0
timed out in wait_for_pin: I2C_STAT=0
I2C read: I/O error
Error reading the chip.

We must revert the original behavior to bring probe back into line with
the TRM.

Cc: Nick Thompson <nick.thompson@ge.com>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
am335x: Correct i2c sysc offset

Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
am33xx: Fill in more cm_wkuppll / cm_perpll

Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
am33xx: Fix i2c sampling rate typo

Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
omap24xx_i2c: Add AM33XX support

The same places that check for CONFIG_OMAP44XX need to check for
CONFIG_AM33XX as we share the same i2c block.

Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
OMAP3 Beagle: Set BOOTDELAY to 3

We change the bootdelay to give users a little bit longer to break in if
needed.

Signed-off-by: Tom Rini <trini@ti.com>
omap3evm: Set BOOTDELAY to 3

We reduce the bootdelay from 10s to 3s to give users a short but usable
window to interrupt the boot process if needed.

Signed-off-by: Tom Rini <trini@ti.com>
omap3_beagle: Add CONFIG_CMD_ASKENV

Signed-off-by: Tom Rini <trini@ti.com>
omap3evm: Add CONFIG_CMD_ASKENV

Signed-off-by: Tom Rini <trini@ti.com>
OMAP5: Adding correct Control id code for OMAP5430

Control id code for omap5430 ES1.0 is hard coded with a wrong value.
This patch corrects the value

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
OMAP5: ADD chip detection for OMAP5432 SOC

This patch adds chip detection for OMAP5432

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
OMAP5: Configure the io settings for omap5432 uevm board

This patch adds the IO settings required for OMAP5432 uevm's DDR3 pads

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>