Add board enable for MSI K8N Neo Platinum.

It's the same as for the Neo2.
Thanks to roxfan and twice11 who did the RE!

Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Tested-by: Jud Porter
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>

git-svn-id: svn://coreboot.org/flashrom/trunk@1597 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Add support for GigaDevice GD25LQ32.

This is the low power version (vendor,device = 0xc8,0x6016) of
GD25Q32 (0xc8,0x4016) which matches that of W25Q32 (0xef,0x4016) and
W25Q32DW (0xef,0x6016).  All their datasheets look pretty much the
same with respect to commands, erase blocks, etc.

Stolen from chromiumos:
http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=commitdiff;h=9a0051f0ba0b67af6f08e052c31cba3e9dbbbdbf

Signed-off-by: Bryan Freed <bfreed@chromium.org>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>

git-svn-id: svn://coreboot.org/flashrom/trunk@1598 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Allow to select FTDI device by serial number.

Requires libftdi > 0.5 (2004, commit ID a8f46ddc1595b1b07abfcce613acdafe5b8ddf9d).
Idea stolen from chromiumos commit 5eb5624aeb7e2ee483e2fa0823c4e634c8ea3e68:
http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=commit;h=5eb5624aeb7e2ee483e2fa0823c4e634c8ea3e68

Signed-off-by: Shik Chen <shik@chromium.org>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>

git-svn-id: svn://coreboot.org/flashrom/trunk@1599 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Add spi_block_erase_62.

This is used by the AT25F series (only?), but is generic enough to reside in spi25.c.
The only currently supported chip is the AT25F512B. Other members of that series
need some additional infrastructure code, hence this patch adds the erase function to
the AT25F512B only.

Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>

git-svn-id: svn://coreboot.org/flashrom/trunk@1600 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Add a bunch of new/tested stuff and various small changes 14.

Tested Mainboards:
OK:
 - ASUS M3A78-EH
   http://www.flashrom.org/pipermail/flashrom/2010-October/005297.html
 - ASUS P2B-LS
   http://www.flashrom.org/pipermail/flashrom/2010-November/005506.html
 - Biostar TA790GX A3+
   http://paste.flashrom.org/view.php?id=1350
 - ECS 848P-A7
   http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html
 - GIGABYTE GA-G41MT-S2PT
   Reported on IRC
 - GIGABYTE GA-H77-D3H
   Reported and tested by Alexander Gordeev on IRC.
 - Gigabyte GA-X79-UD5
   http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html
 - Shuttle FN78S
   http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html
 - VIA EITX-3000
   Reported on IRC by Tuju

NOT OK:
 - Dell PowerEdge C6220 (0HYFFG)
   http://www.flashrom.org/pipermail/flashrom/2012-September/009900.html
 - Foxconn Q45M
   http://www.flashrom.org/pipermail/flashrom/2012-September/009923.html
 - MSI MS-7309 (K9N6SGM-V)
   http://www.flashrom.org/pipermail/flashrom/2012-August/009712.html
 - Supermicro X9QRi-F+
   http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html
 - ZOTAC H61-ITX WiFi (H61ITX-A-E)
   http://www.flashrom.org/pipermail/flashrom/2012-August/009649.html

ASUS CUSL2-C has been tested to be working with the board enable once
implemented for the TUSL2-C board. They seem to have the same PCI IDs
as shown in the links below. Since only the CUSL2-C board enable has been
tested yet, we distinguish the two by DMI strings.
http://paste.flashrom.org/view.php?id=1393
http://www.flashrom.org/pipermail/flashrom/attachments/20091206/ddca2c6c/attachment-0002.eml

Tested flash chips:
 - Set EMST F25L008A to PREW (+PREW)
   http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html
 - Set GigaDevice GD25Q64 to PREW (+PREW)
   http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=commit;h=9e8ef49b1f626c2197e131fba6c5b65c8af4eeea
 - Set Macronix MX25L12805 to P (+P)
   http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html
 - Set SST SST49LF003A/B to PREW (+EW)
   http://paste.flashrom.org/view.php?id=467
 - Set Winbond W49V002FA to PREW (+EW)
   http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html

Tested chipsets:
 - Intel X79 (0x1d41)
   http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html

Board enables:
 - add ASUS P4P800-X
   Created by Idwer Vollering and tested by Mingsen Bao:
   http://paste.flashrom.org/view.php?id=467
 - add DMI string to P4P800-VM

Miscellaneous:
 - Add remaining Intel 7 series chipset (LPC) PCI IDs
 - Add generic SPI detection for chips from Winbond
 - Minor manpage changes
 - Minor other cleanups
 - Escape full stops after abbreviations in the manpage.
 - Add ICH9 and successors to spi_get_valid_read_addr

Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>

git-svn-id: svn://coreboot.org/flashrom/trunk@1601 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Generify a25.c's SRWD printing function and move it to spi25.c.

Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>

git-svn-id: svn://coreboot.org/flashrom/trunk@1602 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Fix a memleak in the dummyflasher.

emu_persistent_image was not freed correctly.

This bug was found thanks to valgrind.

Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

git-svn-id: svn://coreboot.org/flashrom/trunk@1603 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Fix memleaks in dmi.c.

In dmi_init() we populate static char *dmistrings[] with values that get
later compared in dmi_match(). Those strings are actually strduped in
get_dmi_string() and hence need to be freed later. This patch accomplishes
this by registering another shutdown method. Also, the tangling pointers are
nulled when the memories are freed.

This bug was found thanks to valgrind.

Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

git-svn-id: svn://coreboot.org/flashrom/trunk@1604 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Fix flashrom running on boards with coreboot.

In r1577 we removed the discrimination of coreboot IDs and user-specified
mainboards. The problem is that the board enable code required to find
a board enable if either of these model strings were set. Therefore boards
running coreboot that do not need a board enable failed to execute flashrom
since then. This patch fixes this by handling coreboot IDs and user-supplied
IDs differently again.

Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Idwer Vollering <vidwer@gmail.com>

git-svn-id: svn://coreboot.org/flashrom/trunk@1605 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Whitelist known working Thinkpads of the T60 and X60 series.

This should get rid of the need to specify the laptop force
parameter on T60 and X60 series Thinkpads (including T60s and X60s)
that are using one of the Intel 94x northbridges and are known to have
no interfering EC. Please note that although the EC is no problem, flashrom
is not able to access the entire flash chip with the vendor BIOS, see the
coreboot wiki for details: http://www.coreboot.org/Lenovo_x60x

Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Paul Menzel <paulepanter@users.sourceforge.net>

git-svn-id: svn://coreboot.org/flashrom/trunk@1606 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Introduce a compile time option to select a default programmer.

Heavily influenced by a discussion with (and based on code from) Peter Stuge.
Please read the comment in the Makefile before using this option.

Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Peter Stuge <peter@stuge.se>

git-svn-id: svn://coreboot.org/flashrom/trunk@1607 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Add support for all 4 possible channels to the ft2232_spi programmer.

Add a check to validate the selected channel/interface, which not even
libftdi seems to do yet.
This patch changes default behavior: the new default channel/interface is A.
Also, this patch uses the word 'channel' in addition or in place of 'interface'
where possible without too much hassle because it is the term FTDI uses.

Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>

git-svn-id: svn://coreboot.org/flashrom/trunk@1608 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Add support for FT232H.

For older versions of libftdi we define TYPE_232H ourselves and this
seems to be enough to get at least basic support (and we don't need
more than that AFAICT).

Signed-off-by: Ilya A. Volynets-Evenbakh <ilya@total-knowledge.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>

git-svn-id: svn://coreboot.org/flashrom/trunk@1609 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Cleanup ft2322.c and add more detail to error messages.

 - Use libftdi's error string to add more detail.
 - Add full stops to messages.
 - Minor white space fixes.

Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>

git-svn-id: svn://coreboot.org/flashrom/trunk@1610 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Add support for SST's 25WF series of SPI flash chips.

This includes SST25WF512, SST25WF010, SST25WF020 and SST25WF040.
They require a VCC of 1.65 - 1.95V, which is why i could not test them.
The SOIC version of the SST25WF512 is used on an AMD X300-based
graphics card i own.

Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>

git-svn-id: svn://coreboot.org/flashrom/trunk@1611 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Differentiate Numonyx N25Q064 1.8V and 3.0V versions.

This patch differentiates between the N25Q064 1.8V version and 3.0V
version which have different JEDEC IDs.

It extends the chip name to include more characters of the part
number. The first two of those characters indicate the process
technology (65nm) and feature set (hold pin etc.), neither of which
matter for flashrom at the moment. The third and fourth characters
specify voltage and block/sector size and uniformity, which are
important and hence included.

To abstract the irrelevant portions of the part number leading up to
the characters we care about, dots are used. This helps prevent
unwanted changes in chip name that can break fragile scripts and
confuse people. More about this schema here:
http://www.flashrom.org/pipermail/flashrom/2012-July/009595.html

Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>

git-svn-id: svn://coreboot.org/flashrom/trunk@1612 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Add a bunch of new/tested stuff and various small changes 15.

Tested Mainboards:
OK:
 - Foxconn P55MX
   http://www.flashrom.org/pipermail/flashrom/2012-October/010002.html

Tested flash chips:
 - Eon EN25F64 to PR (+PR)
   http://paste.flashrom.org/view.php?id=1426
 - Macronix MX25L1005 to PREW (+PREW)
   http://www.flashrom.org/pipermail/flashrom/2012-October/010004.html
 - Set SST39VF512 to PREW (+W)
   http://www.flashrom.org/pipermail/flashrom/2012-September/009958.html

Tested chipsets:
 - Z77 (only reading was really tested)

Miscellaneous:
 - Fix ft2232_spi's parameter parsing.
 - Fix nicrealtek's init (always segfaulted since r1586 oops).
 - Add another T60 variant to the laptop whitelist.
 - Improve message shown when image file size does not match flash chip
 - Refine messages regarding the flash descriptor override strap according
   to the findings by Vladislav Bykov on his P55MX.
 - Fix the ID of EN25F64.
 - Demote and clarify debug message in serprog_delay().
 - Minor other cleanups.

Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>

git-svn-id: svn://coreboot.org/flashrom/trunk@1613 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Remove exit calls from print_supported_chips.

Propagate the error code using return values instead, but let cli_classic.c
still decide the ultimate return value of the process.
Also, remove setting the ret value again after print_supported_wiki() - 
success is the default.

Signed-off-by: Niklas Söderlund <niso@kth.se>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>

git-svn-id: svn://coreboot.org/flashrom/trunk@1614 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Add support for Numonyx N25Q016 and N25Q032.

The 32Mb version has 1.8V and 3.0V versions, the smaller one 1.8V only
(or Numonyx/Micron forgot to publish it). Another difference is that the
16Mb chip has 32 kB subsectors (erase opcode 0x52). As long as there
are no funky configurations like for the 128Mb chips, we got the smaller
parts covered with this change.

Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>

git-svn-id: svn://coreboot.org/flashrom/trunk@1615 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Add support for Atmel AT26DF041.

Wicked chip: No WRSR, no write enable command (but swallows our
default one without a problem), supports an auto-erasing page write
(but even without that page writes are recommended to write the
whole page i.e. operate on a completely erased page), mad
requirements on block refreshments if only partly written.

Found on my Intel D946GZIS and tested with my serprog in situ.
Using the page write by setting JEDEC_BYTE_PROGRAM to 0x11 and using
the spi_chip_write_256 command greatly improves performance and works
flawlessly.

Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>

git-svn-id: svn://coreboot.org/flashrom/trunk@1616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1