config: update tripndroid jellybean config R001
i2c: tegra: use of_match_ptr() for match_table initialization

In place of defining match_table for non-DT based as NULL,
use of_match_ptr() for initialzing the of_match_table.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>

Cherry-picked from mainline
	02d8bf8dc6b09cb810599c64d47da3bdf4f85882
Fixed conflicts.

Change-Id: I71994c49813396ad6b3dfa3fd616d9585203adba
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116464
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
i2c: tegra: rename dev_pm_ops variables/macro

To align the downstream to mainline, renaming the
variable/macro of dev_pm_ops as per mainline.

The original change on mainline is:
commit 6a7b3c3c465cef29d92dfc3fbbff0d958aa8be04
Author: Rafael J. Wysocki <rjw@sisk.pl>
    i2c-tegra: Use struct dev_pm_ops for power management

Change-Id: Ica427ee339390a76ac8004bef96b4c12ef4ecae4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116465
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
i2c: tegra: Add devexit_p() for remove

It was originally missed in the __devinit/__devexit annotations.

Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

Cherry-picked from mainline
	218d06d79468ca2e6abf3679eea12d7d93d251ef

Change-Id: I66db3d8b54ad6635819e5bda677bc789f9f90588
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116467
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
i2c: tegra: make all resource allocation through devm_*

Use the devm_* for the memory region allocation, interrupt request,
clock handler request.
By doing this, it does not require to explicitly free it and hence
saving some code.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cherry-picked from mainline
	9cbb6b2b92d0fdade0fe00cc00e3658b44c86676

Change-Id: I0bc86dbd2bd4e460c75f6d425131f9e27bdace71
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116468
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
i2c: tegra: make sure register writes completes

The Tegra PPSB (an peripheral bus) queues writes transactions.
In order to guarantee that writes have completed before a
certain time, a read transaction to a register on the same
bus must be executed.
This is necessary in situations such as when clearing an
interrupt status or enable, so that when returning from an
interrupt handler, the HW has already de-asserted its
interrupt status output, which will avoid spurious interrupts.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cherry-picked from mainline
	ec7aaca2f64f509f45d463d784b41d0b3d2be083

Change-Id: I4f064c38993031303bfeef794015efd5517561cc
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116469
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
Revert "i2c: tegra: Fix i2c unknown interrupt issue"

This reverts commit 021d8866c80fab07cb4cd2753ed67d0c1b49c174.

The reason for revert the change:
The readback is done at the time of i2c_writel() and hence
it is not require to have this in scattered manner.
This is towards the aligning driver with mainline.

Change-Id: I74184683301d7a3c26550d97fb1ce3596273a0bb
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116470
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
i2c: tegra: i2c slave initialization for non-dvc i2c

The slave configuration is required for non-dvc i2c.
This can be done by checking the i2c type "is_dvc"
in place of having another variable.

Change-Id: Ia80ba0f7a68e2dfaa13b5da94896b87f2877e047
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116471
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
i2c: tegra: remove unused member variable

Remove unused member variable "iomem" of the
i2c device structure.

This variable becomes unused when converted all allocation
to devm_* in following change:
    i2c: tegra: make all resource allocation through devm_*

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cherry-picked from mainline
	57c0dc3e69439a2ddf239226c318d676da773492

Change-Id: I8a3db21524a20ee4cbd1b87dff82bac80a2763de
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116472
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
i2c: tegra: enable/disable clock unconditionally during xfer

Do the clock control for enable/disable during each transfer
regardless of whether clock is always on or not.

If clock is always on then in probe the reference count of the
clock incremented and doing again enable will just increment
reference and disable will decrement the reference count
and so there is no harm on calling enable/disable always
during transfer.

Change-Id: Ibf67413fb84f826f04e890fe3dd2a20cd0469922
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116473
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
rtc: set alarm logging enable

Set alarm logs enabled to help understand suspend stress failures

Change-Id: I60644ff0e3fea813ae1140be1b71fc2694d95709
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/115361
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>
Tested-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
arm: tegra: pci: unmap/map memory while pwroff/on

Rearranged the code to release all memory and res-
ources whenever poweroff is called and re-allocate
them whenever power on is called.

Bug 963969

Change-Id: I31d9cd1e8603e638714bba765aadfdd4eed78d93
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/116048
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
ARM: tegra: dvfs: update Tegra3 single-core dvfs table

Bug 841336

Signed-off-by: Peter Zu <pzu@nvidia.com>
Reviewed-on: http://git-master/r/110587
(cherry picked from commit c0e7904245168cafc426219948ab132a4d832376)

Change-Id: I370f4af1d4ce888ebc71351519c1018b82d91913
Reviewed-on: http://git-master/r/116132
Tested-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
ARM: tegra: dvfs: add back 916mV & 1007mV entries

Bug 841336

Signed-off-by: Peter Zu <pzu@nvidia.com>
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/113751
(cherry picked from commit 833f9d47a350358000e9201f77a3c9fd655d2900)

Change-Id: I679093d9d2577625bff3e02e25ffe90d396ea5a6
Reviewed-on: http://git-master/r/116134
Tested-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
ARM: tegra: clock: relax memory efficiency if 3d clock is off

Bug 1003509

Change-Id: I8fb2c0cff7106671f8470b836ea26c09350d6206
Signed-off-by: Peter Zu <pzu@nvidia.com>
(cherry picked from commit df2dda0438c2aed3a961d197dce7319fefdf5b30)
Reviewed-on: http://git-master/r/115468
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
ARM: tegra: power: Enforce CPU rate range in secondary boot

On Tegra3 make sure cpu rate is within G-mode range before LP to G
mode switch triggered by secondary cpu boot directly from LP mode.

Bug 988544

Change-Id: I0d86fbf0727a6bbf6069159e7c532947a9d0af73
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/115930
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Greg Lo <glo@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
ARM: tegra: clock: Reduce Tegra3 pll post-lock delay

Reduced pll post-lock delay from 50us to 2us.

Rearranged wait for lock loop to delay first check of lock bit
by 2us after pll is enabled.

Added read fence for PLLM lock via PMC (in this case enable bit is
in APB bus register, but lock detect bit is in PPSB bus register).

Bug 1017271

Change-Id: Ibc963533854383e884d87be61e1b98e9d54d3ea0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/115933
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
mfd: tps80031: fix compilation warning

Fixing compilation warning:

kernel/drivers/mfd/tps80031.c: In function 'tps80031_init_ext_control.isra.4':
kernel/drivers/mfd/tps80031.c:594:6: warning: 'ret' is used uninitialized in this
			function [-Wuninitialized]

Change-Id: I7d9cfab7b03ffe085ef4db7c9b08b0f2cb4e6fec
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/117329
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
GVS: Gerrit_Virtual_Submit
ARM: Tegra3: clocks: Configurable cbus divider

Added config option to set cbus divider.

Bug 978870

Change-Id: I49c57064ce695dd703ad97a50b8c0d373f5a05d0
Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/114197
(cherry picked from commit 3f2b0e2b973a106d62e1f4bfb75bb40bd1a96b9b)
Reviewed-on: http://git-master/r/109962
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>