thermal: Don't limit CPU frequency after msm_thermal is disabled

There may be an outstanding task to check for threshold crossing
when msm_thermal is disabled and CPU is restored to maximum
frequency. This task can get scheduled after the maximum frequency
is restored, and result in another mitigation that pins CPU
frequencies to 918mHz. This happens in the case that the final
temperature was still above the max temperature threshold.
This patch ensures any outstanding tasks are cancelled and flushed
before finally restoring the CPU frequencies.

CRs-fixed: 351614
Change-Id: Ifce00b379989b78856803ac09c7403207f5c998b
Signed-off-by: Eugene Seah <eseah@codeaurora.org>
(cherry picked from commit cbc0753ecc3a4f80105e99e5698da0b3363866ea)
bdi: use deferable timer for sync_supers task

sync_supers task currently wakes up periodically for superblock
writeback. This hurts power on battery driven devices. This patch
turns this housekeeping timer into a deferable timer so that it
does not fire when system is really idle.

CRs-Fixed: 353700
Signed-off-by: Yong Wang <yong.y.wang@intel.com>
Signed-off-by: Xia Wu <xia.wu@intel.com>
Signed-off-by: Krishna Vanka <kvanka@codeaurora.org>
(cherry picked from commit f398f30d1f34632d3c96758b5b19e65b056af072)

Change-Id: I6ec6310d66c0d014adf0f41e75cd4c48c233f83d
Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
ARM: 7325/1: fix v7 boot with lockdep enabled

commit 8e43a905dd574f54c5715d978318290ceafbe275 upstream.

Bootup with lockdep enabled has been broken on v7 since b46c0f74657d
("ARM: 7321/1: cache-v7: Disable preemption when reading CCSIDR").

This is because v7_setup (which is called very early during boot) calls
v7_flush_dcache_all, and the save_and_disable_irqs added by that patch
ends up attempting to call into lockdep C code (trace_hardirqs_off())
when we are in no position to execute it (no stack, MMU off).

Fix this by using a notrace variant of save_and_disable_irqs.  The code
already uses the notrace variant of restore_irqs.

Reviewed-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
fmem: Use alignment property from platform data
arm: Support the safe WFE sequence for Krait CPUs
ARM: gic: Add support to access GIC in secure mode
Perf: Dont reset PMU's if perf is not active

Perf would save and restore counters after resetting the PMU when
the CPU's came out of power collapse even if a perf session wasn't
active. Check if perf was running before going into power collapse
and only then reset PMU's while coming out.

This way PMU's can be accessed externally via the RPM or T32 without
perf intruding in counter output.

Change-Id: I33ac11b2a5cae21456341fde015aabe5b4bb8f52
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>
panic: Fix a possible deadlock in panic()
Test Gokhan's new cpufreq_pegasusq
Linux 3.0.40
[CPUFREQ] Remove wall variable from cpufreq_gov_dbs_init()
sched,rt: fix isolated CPUs leaving root_task_group indefinitely throttled
sched: task_times() explosion avoidance for tasks with > 2^32 acrued ticks