clockevents: Make clockevents_config() a global symbol

Make clockevents_config() into a global symbol to allow it to be used
by compiled-in clockevent drivers. This is needed by drivers that want
to update the timer frequency after registration time.

Signed-off-by: Magnus Damm <damm@opensource.se>
Tested-by: Simon Horman <horms@verge.net.au>
Cc: arnd@arndb.de
Cc: johnstul@us.ibm.com
Cc: rjw@sisk.pl
Cc: lethal@linux-sh.org
Cc: gregkh@linuxfoundation.org
Cc: olof@lixom.net
Cc: Magnus Damm <magnus.damm@gmail.com>
Link: http://lkml.kernel.org/r/20120509143934.27521.46553.sendpatchset@w520
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
microblaze: Do not select GENERIC_GPIO by default

The microblaze architecture does not provide a native GPIO API implementation
nor requires GPIOLIB, but still selects GENERIC_GPIO by default. As a result the
following build error occurs, if GPIOLIB is not selected:

	include/asm-generic/gpio.h: In function 'gpio_get_value_cansleep':
	include/asm-generic/gpio.h:218: error: implicit declaration of function '__gpio_get_value'
	include/asm-generic/gpio.h: In function 'gpio_set_value_cansleep':
	include/asm-generic/gpio.h:224: error: implicit declaration of function '__gpio_set_value'

This patch addresses the issue by not selecting GENERIC_GPIO by default. This
causes the GPIO API to be stubbed out if no implementation is provided.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Cc: stable@vger.kernel.org
Tested-by: Michal Simek <monstr@monstr.eu>
microblaze: Port OOM changes to do_page_fault

Commit d065bd810b6deb67d4897a14bfe21f8eb526ba99
(mm: retry page fault when blocking on disk transfer) and
commit 37b23e0525d393d48a7d59f870b3bc061a30ccdb
(x86,mm: make pagefault killable)

The above commits introduced changes into the x86 pagefault handler
for making the page fault handler retryable as well as killable.

These changes reduce the mmap_sem hold time, which is crucial
during OOM killer invocation.

Port these changes to microblaze.

Signed-off-by: Kautuk Consul <consul.kautuk@gmail.com>
microblaze: ftrace: Pass the first calling instruction for dynamic ftrace

Selftest for dynamic ftrace requres to pass address of the first
calling instruction because hash function is calculated from it.

ftrace_update_ftrace_func setups pointer to function which is called
in _mcount function. trace_selftest is not aware about instruction
size (for microblaze 8 - imm and addik) and that's why we have
to pass in r5 address of imm not addik which is in r15.12

For more info look at ftrace_ops_list_func/ftrace.c.

Signed-off-by: Michal Simek <monstr@monstr.eu>
microblaze: Add TLS support to sys_clone

Formerly unused Args 4/5 now load parent tid / child tid so the brid to
do_fork can pick up TLS from r10. Arg 3 still unused

There is also necessary to fix old glibc which do not setup r9/r10 (arg 4/5).
Simple clearing them is fine.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
microblaze: Setup correct pointer to TLS area

Setup a pointer to the TLS area in copy_thread.
r10 is 6th argumetn which contains TLS area.
And r21 is the thread reg.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
sparc64: Fix several bugs in quad floating point emulation.

UltraSPARC-T2 and later do not use the fp_exception_other trap and do
not set the floating point trap type field in the %fsr at all when you
try to execute an unimplemented FPU operation.

Instead, it uses the illegal_instruction trap and it leaves the
floating point trap type field clear.

So we should not validate the %fsr trap type field when do_mathemu()
is invoked from the illegal instruction handler.

Also, the floating point trap type field is 3 bits, not 4 bits.

Signed-off-by: David S. Miller <davem@davemloft.net>
ARM: fix out[bwl]()

out[bwl]() had a side effect that gcc read-back from the register after
writing its value.  This causes a problem for at least 3c589_cs, which
spits out lots of "adapter failure, FIFO diagnostic register 2011."

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: neponset: make sure neponset_ncr_frob() is exported

This function is used by modules (such as the SA1111 PCMCIA driver)
so it needs to be exported.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
drm/i915: Limit page allocations to lowmem (dma32) for i965

Broadwater and Crestline share a limitation that prevent it from
relocating general surface state above 4GiB. The only recourse we have
since any buffer object may be used as a relocation target is then to
limit all object allocations on 965g[m] to DMA32.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drm/i915: Remove the error message for unbinding pinned buffers

This is now used intentionally to prevent proliferation of is-pinned
checks upon the inactive list following:

commit 1b50247a8ddde4af5aaa0e6bc125615372ce6c16
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Tue Apr 24 15:47:30 2012 +0100

    drm/i915: Remove the list of pinned inactive objects

Reported-and-tested-by: guang.a.yang@intel.com
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50075
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drm/i915: tune down the noise of the RP irq limit fail

We still don't understand why this fails exactly, but if fails way
too often for a simple debug information. Furthermore the current
ducttape should prevent the gpu from getting stuck at low frequencies.

Hence tune down the dmesg noise.

Note that the known failure case is that the register read returns 0
when the gpu gets confused.

v2: Add comments about the known failure case.

Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
clocksource: em_sti: Emma Mobile STI driver

The STI hardware is based on a single 48-bit 32kHz
counter that together with two individual compare
registers can generate interrupts. There are no
timer operating modes selectable which means that
the timer can not clear on match.

This driver is providing clocksource support for the
48-bit counter. Clockevents are also supported using
the same timer in oneshot mode.

Signed-off-by: Magnus Damm <damm@opensource.se>
Cc: horms@verge.net.au
Cc: arnd@arndb.de
Cc: johnstul@us.ibm.com
Cc: rjw@sisk.pl
Cc: lethal@linux-sh.org
Cc: gregkh@linuxfoundation.org
Cc: olof@lixom.net
Link: http://lkml.kernel.org/r/20120525070344.23443.69756.sendpatchset@w520
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
clocksource: em_sti: Add DT support

Update the em-sti driver to support DT.

Signed-off-by: Magnus Damm <damm@opensource.se>
Cc: arnd@arndb.de
Cc: horms@verge.net.au
Cc: johnstul@us.ibm.com
Cc: rjw@sisk.pl
Cc: lethal@linux-sh.org
Cc: gregkh@linuxfoundation.org
Cc: olof@lixom.net
Link: http://lkml.kernel.org/r/20120509143950.27521.7949.sendpatchset@w520
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
[PARISC] fix boot failure on 32-bit systems caused by branch stubs placed before .text

In certain configurations, the resulting kernel becomes too large to boot
because the linker places the long branch stubs for the merged .text section
at the very start of the image.  As a result, the initial transfer of control
jumps to an unexpected location.  Fix this by placing the head text in a
separate section so the stubs for .text are not at the start of the image.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Cc: stable@vger.kernel.org
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
[PARISC] fix TLB fault path on PA2.0 narrow systems

commit 5e185581d7c46ddd33cd9c01106d1fc86efb9376
Author: James Bottomley <JBottomley@Parallels.com>

    [PARISC] fix PA1.1 oops on boot

Didn't quite fix the crash on boot.  It moved it from PA1.1 processors to
PA2.0 narrow kernels.  The final fix is to make sure the [id]tlb_miss_20 paths
also work.  Even on narrow systems, these paths require using the wide
instructions becuase the tlb insertion format is wide.  Fix this by
conditioning the dep[wd],z on whether we're being called from _11 or _20[w]
paths.

Tested-by: Helge Deller <deller@gmx.de>
Cc: stable@vger.kernel.org
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
[PARISC] Fix parisc compile failure after smp: Add task_struct argument to __cpu_up()

commit 8239c25f47d2b318156993b15f33900a86ea5e17 added an argument to our
__cpu_up() function, but didn't notice we have an extra definition for
this in asm/smp.h resulting in a compile failure.

Fix by removing the extraneous parisc definition of __cpu_up().  While
we're at it, remove the duplicated definition of smp_send_reschedule().

Signed-off-by: James Bottomley <JBottomley@Parallels.com>
tick: Move skew_tick option into the HIGH_RES_TIMER section

commit 5307c95 (tick: Add tick skew boot option) broke the
!CONFIG_HIGH_RES_TIMERS build.

Move the boot option parsing into the CONFIG_HIGH_RES_TIMERS section.

Reported-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Mike Galbraith <mgalbraith@suse.de>
scripts/coccinelle: address test is always true

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Michal Marek <mmarek@suse.cz>
scripts/coccinelle: sizeof of pointer

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Michal Marek <mmarek@suse.cz>