ARM: disable preemption in machine_shutdown

Since the smp call to stop the other cpus are handled in those
cpus in interrupt context, there's a potential for those smp
handlers to interrupt threads holding spin locks (such as the
one a mutex holds).  This prevents those threads from ever
releasing their spin lock, so if the cpu doing the shutdown
is allowed to switch to another thread that tries to grab the
same lock/mutex, we could get into a deadlock (the spin lock
call is called with preemption disabled in the mutex lock code).

To avoid that possibility, disable preemption before doing the
smp_send_stop().

Change-Id: I7976c5382d7173fcb3cd14da8cc5083d442b2544
Signed-off-by: Mike J. Chen <mjchen@google.com>
Compile with -pipe
switch do_fsync() to fget_light()
scripts: setlocalversion: do not append plus sign
Makefile: vfp: compile as neon
sync: Add synchronization framework
sw_sync: add cpu based sync driver

Change-Id: I1042851f5e30f9fdc2f35bdad84123bcf108560f
Signed-off-by: Erik Gilling <konkers@android.com>
sync: add timestamps to sync_pts

Change-Id: I2ad855072b86873880769a09a3176e85aa1199d7
Signed-off-by: Erik Gilling <konkers@android.com>
sync: add debugfs support

Change-Id: I8a7ea63e454fbeee1ecf17e6c3caff7c43b24734
Signed-off-by: Erik Gilling <konkers@android.com>
sw_sync: add debug support

Change-Id: Ibcc5fa8cb36e283cdf0e3308064876722e2675fc
Signed-off-by: Erik Gilling <konkers@android.com>
sync: add ioctl to get fence data

Change-Id: I71410aef7e03a52562f7cb15b993ac8441b1fa12
Signed-off-by: Erik Gilling <konkers@android.com>
sw_sync: add fill_driver_data support

Change-Id: Ib3812d282db56362d82f5ccc9a12b7d2100ab93a
Signed-off-by: Erik Gilling <konkers@android.com>
sync: add poll support

Change-Id: I294e481bba92658e6dd26f157ddbf0e9ff4ce8a5
Signed-off-by: Erik Gilling <konkers@android.com>
sched: Enable HRTICK

Signed-off-by: AdiPat <adithemagnificent@gmail.com>
lib: Improve the performance of memcpy and memmove.
boot: Enable XZ compression
ARM: 7011/1: Add ARM cpu topology definition

The affinity between ARM processors is defined in the MPIDR register.
We can identify which processors are in the same cluster,
and which ones have performance interdependency. We can define the
cpu topology of ARM platform, that is then used by sched_mc and sched_smt.

The default state of sched_mc and sched_smt config is disable.
When enabled, the behavior of the scheduler can be modified with
sched_mc_power_savings and sched_smt_power_savings sysfs interfaces.

Changes since v4 :
*  Remove unnecessary parentheses and blank lines

Changes since v3 :
* Update the format of printk message
* Remove blank line

Changes since v2 :
* Update the commit message and some comments

Changes since v1 :
* Update the commit message
* Add read_cpuid_mpidr in arch/arm/include/asm/cputype.h
* Modify header of arch/arm/kernel/topology.c
* Modify tests and manipulation of MPIDR's bitfields
* Modify the place and dependancy of the config
* Modify Noop functions

Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: 7182/1: ARM cpu topology: fix warning

kernel/sched.c:7354:2: warning: initialization from incompatible pointer type

Align cpu_coregroup_mask prototype interface with sched_domain_mask_f typedef
use int cpu instead of unsigned int cpu

Cc: <stable@vger.kernel.org>
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: cpu topology: Add update_cpu_topology function

arch_update_cpu_topology function is called by the scheduler
before building its sched_domain hierarchy. Prepare the update
of the cpu topology masks in this function in addition to set
it in the the store_cpu_topology which is executed only once per cpu.

Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
ARM: cpu topology: modify cpu topology

Modify the CPU topology policy according to the sched_mc level and the cortex family

Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>