Make comments in Debug.cpp and Debug.h consistent.  Rename SetCurrentDebugType;
Function names should be camel case, and start with a lower case letter.  No
functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160813 91177308-0d34-0410-b5e6-96231b3b80d8
Add support for v16i32/v16i64 into the code generator. This is required for backends that use i32/i64 vectors for the getSetCCResultType function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160814 91177308-0d34-0410-b5e6-96231b3b80d8
Eliminate a batch of uses of sub_ss and sub_sd in the X86 target.

These idempotent sub-register indices don't do anything --- They simply
map XMM registers to themselves.  They no longer affect register classes
either since the SubRegClasses field has been removed from Target.td.

This patch replaces XMM->XMM EXTRACT_SUBREG and INSERT_SUBREG patterns
with COPY_TO_REGCLASS patterns which simply become COPY instructions.

The number of IMPLICIT_DEF instructions before register allocation is
reduced, and that is the cause of the test case changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160816 91177308-0d34-0410-b5e6-96231b3b80d8
Eliminate some SUBREG_TO_REG patterns with sub_ss and sub_sd.

The SUBREG_TO_REG instruction has magic semantics asserting that the
source value was defined by an instruction that cleared the high half of
the register. Those semantics are never actually exploited for xmm
registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160818 91177308-0d34-0410-b5e6-96231b3b80d8
Eliminate more sub_ss / sub_sd patterns.

This gets rid of some more INSERT_SUBREG - IMPLICIT_DEF patterns,
simplifying the emitted code a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160820 91177308-0d34-0410-b5e6-96231b3b80d8
Teach SimplifyDemandedBits how to look through fpext and fptrunc to simplify their operand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160823 91177308-0d34-0410-b5e6-96231b3b80d8
Eliminate sub_ss, sub_sd from broadcast patterns.

The (COPY_TO_REGCLASS GR32:$src, VR128) pattern looks odd, but
copyPhysReg does the right thing with it. (The old pattern would
eventually produce the same cross-class copy).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160830 91177308-0d34-0410-b5e6-96231b3b80d8
Remove the last mentions of sub_ss and sub_sd from patterns.

I'll remove these two sub-register indexes shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160831 91177308-0d34-0410-b5e6-96231b3b80d8
Remove the X86 sub_ss and sub_sd sub-register indexes completely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160833 91177308-0d34-0410-b5e6-96231b3b80d8
Simplify demanded bits of select sources where the condition is a constant vector

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160835 91177308-0d34-0410-b5e6-96231b3b80d8
Pass the correct call frame size to callseq_start node. This is needed to
replace uses of function getMaxCallFrameSize defined in MipsFunctionInfo with
the one MachineFrameInfo has.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160841 91177308-0d34-0410-b5e6-96231b3b80d8
Remove support for 'CompositeIndices' and sub-register cycles.

Now that the weird X86 sub_ss and sub_sd sub-register indexes are gone,
there is no longer a need for the CompositeIndices construct in .td
files. Sub-register index composition can be specified on the
SubRegIndex itself using the ComposedOf field.

Also enforce unique names for sub-registers in TableGen. The same
sub-register cannot be available with multiple sub-register indexes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160842 91177308-0d34-0410-b5e6-96231b3b80d8
Eliminate the large XXXSubRegTable constant arrays.

These tables were indexed by [register][subreg index] which made them,
very large and sparse.

Replace them with lists of sub-register indexes that match the existing
lists of sub-registers. MCRI::getSubReg() becomes a very short linear
search, like getSubRegIndex() already was.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160843 91177308-0d34-0410-b5e6-96231b3b80d8
Clean up includes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160852 91177308-0d34-0410-b5e6-96231b3b80d8
SmallVector::erase: Assert that iterators are actually inside the vector.

The rationale here is that it's hard to write loops containing vector erases and
it only shows up if the vector contains non-trivial objects leading to crashes
when forming them out of garbage memory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160854 91177308-0d34-0410-b5e6-96231b3b80d8
Give MCRegisterInfo an implementation file.

Move some functions from MCRegisterInfo.h that don't need to be inline.

This shrinks llc by 8K.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160865 91177308-0d34-0410-b5e6-96231b3b80d8
Test commit, clean up comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160873 91177308-0d34-0410-b5e6-96231b3b80d8
fix infinite loop in instcombine in the presence of a (malformed) self-referencing select inst.
This can happen as long as the instruction is not reachable. Instcombine does generate these unreachable malformed selects when doing RAUW

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160874 91177308-0d34-0410-b5e6-96231b3b80d8
fix PR13390: do not loop forever with self-referencing self instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160876 91177308-0d34-0410-b5e6-96231b3b80d8
Test commit, clean up comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160880 91177308-0d34-0410-b5e6-96231b3b80d8