Fixup return values form user_mem_abort

Stupid

Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
KVM ARM: Use KVM_ARM_VCPU_INIT to set target model and features.

This uses a fixed feature bitmap for simplicity: 224 features should
be enough for anyone!

QEMU now needs to explicitly state what CPU a guest vcpu has, and what
optional features (currently, none are defined, but this could be used
to suppress VFP, debug, etc).

Once we know the target (which currently must be 0xCOF), we do the
vcpu reset; trying to run without that will -ENOEXEC.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
ARM: KVM: Drive register reset from coproc table(s).

This keeps the information in one place, but of course it means we
have entries in the register table which are never trapped.

Minor notes:
1) We reserve a value of 0 as an invalid cp15 offset, to catch bugs in our
   table, at cost of 4 bytes per vcpu.

2) Added comments on the table indicating how we handle each register, for
   simplicity of understanding.

Signed-off-by: Rusty Russell <rusty.russell@linaro.org>
ARM: KVM: Turn L2CTLR and ACTLR into proper registers.

This means we generate the value at reset time.  ACTLR already had a spot
in the cp15 array (unused), but L2CTLR needs a new one.

In particular, this means that qemu must create all the registers before
calling KVM_SET_SREGS to set the target.

Signed-off-by: Rusty Russell <rusty.russell@linaro.org>
ARM: KVM: check ordering of coproc table

It's currently almost in sorted order, but next patch requires it,
so check.

Signed-off-by: Rusty Russell <rusty.russell@linaro.org>
ARM: KVM: KVM_VCPU_GET_MSR_INDEX_LIST/KVM_GET_MSRS/KVM_SET_MSRS for cp15 regs.

Now we have a table for all the cp15 registers, we can drive a generic
API.  x86 already has one for sparse-numbered registers, so we simply
reproduce that.  The only difference is that our KVM_GET_MSR_INDEX_LIST
is a per-vcpu ioctl; we can't know the MSRs until we know the cpu type.
Thus we add KVM_VCPU_GET_MSR_INDEX_LIST.

The numbering for the indices for coprocesors is simple, if userspace
cares (it might not for simple save and restore): the upper 16 bits
are the coprocessor number.  If it's > 15, it's something else, for
future expansion.

Bit 15 indicates a 64-bit register.  For 64 bit registers the bottom 4
bits are CRm, the next 4 are opc1 (just like the MCRR/MRCC instruction
encoding).  For 32 bit registers, the bottom 4 bits are CRm, the next
3 are opc2, the next 4 CRn, and the next 3 opc1 (the same order as the
MRC/MCR instruction encoding, but not the same bit positions).

64-bit coprocessor register:
       ...|19 18 17 16|15|14 13 12 11 10  9  8| 7  6  5  4 |3  2  1  0|
  ...0  0 |  cp num   | 1| 0  0  0  0  0  0  0|   opc1     |   CRm    |

32-bit coprocessor register:
       ...|19 18 17 16|15|14|13 12 11|10  9  8  7 |6  5  4 |3  2  1  0|
  ...0  0 |  cp num   | 0| 0|  opc1  |    CRn     | opc2   |   CRm    |

Non-coprocessor register:

   | 32 31 30 29 28 27 26 25 24 23 22 21 20|19 18 17 16 15 ...
   |     < some non-zero value >           | ...

Signed-off-by: Rusty Russell <rusty.russell@linaro.org>
ARM: KVM: add the guest-visible host cp15 registers to the API.

For futureproofing, we need to tell QEMU about the CP15 registers the
host lets the guest access.

It will need this information to restore a current guest on a future
CPU or perhaps a future KVM which allow some of these to be changed.

We use a separate table for these, as they're only for the userspace API.

Signed-off-by: Rusty Russell <rusty.russell@linaro.org>
ARM: KVM: Remove cp15 registers from struct kvm_regs.

This will break QEMU: it now needs to use the
KVM_GET_MSR_INDEX_LIST/KVM_GET_MSRS/KVM_SET_MSRS ioctls, and also by
changing the structure size, we change the KVM_SET_REGS/KVM_GET_REGS
ioctl numbers.

Signed-off-by: Rusty Russell <rusty.russell@linaro.org>
KVM: ARM: Add comment about sorted cp15 regs order

When adding new register, your everyday developer may not realize until
the vcpu is init'ed and wonder, why didn't they tell me, geez, now I
have to re-build and re-test.

Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
fixup! ARM: KVM: KVM_VCPU_GET_MSR_INDEX_LIST/KVM_GET_MSRS/KVM_SET_MSRS for cp15 regs.

Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>