cpufreq: interactive: based hispeed bump on target freq, not actual

For systems that set a common speed for all CPUs, checking current
speed here could bypass the intermediate hispeed bump decision for
this CPU when another CPU was already at hispeed.  This could
result in an overly high setting (for all CPUs) in situations
where all CPUs were about to drop to load levels that map to
hispeed or below.

Change-Id: I186f23dcfc5e2b6336cab8b0327f0c8a9a4482bc
Signed-off-by: Todd Poynor <toddpoynor@google.com>
OMAP4: McPDM: Add McPDM pins initialization

Audio Noise Issue may occur due to McPDM_DOUT floating while McPDM_CLK
is generated at the beginning of the Audio transfer to Audio IC (this
situation is created by OMAP4 McPDM module which need some time before
providing the data). A WA is to enable the internal pull-down on OMAP
McPDM_DOUT pin to avoid having the pin floating.

Pins initialization was added to make sure that McPDM pins initialized
correctly.

Change-Id: I04fe52b63bf72da0431099cbedcb7f9669ac4f27
Signed-off-by: Oleksandr Dmytryshyn <oleksandr.dmytryshyn@ti.com>
Some 4430SDP/Panda updates from Linux 3.0.24 that are irrelevant
but included for completeness sake.

I noticed that android-omap-3.0 merged Linux 3.0.28 including
these patches.
cpufreq: Separate speed target revalidate time and initial set time

Allow speed drop after min_sample_time elapses from last time
the current speed was last re-validated as appropriate for
current load / input boost.

Allow speed bump after min_sample_time (or above_hispeed_delay)
elapses from the time the current speed was originally set.

Change-Id: Ic25687a7a53d25e6544c30c47d7ab6f27a47bee8
Signed-off-by: Todd Poynor <toddpoynor@google.com>
cpufreq: interactiveX: based hispeed bump on target freq, not actual
Linux 3.0.29 update

Conflicts:

	arch/arm/configs/tuna_defconfig
misc: modem_if: modemcontrol: add cp_dump pin level when cp crash

1. Add cp_dump_pin input gpio level when phone_active_pin goes low
	- if cp_dump_pin is high, it means cp sw crash
	- if cp_dump_pin is low, it's wrong detecting for phone_active_pin
	- requested by CP

Bug: 6281406
Change-Id: Ib8d586f711a1a338086aca715f56f932d992fbf2
Signed-off-by: wonhee <wonhee48.seo@samsung.com>
OMAP4: SGX: Set DPLL PER m7x2 as source for SGX FCLK

SGX functional clock can be sourced from either CORE or PER
DPLLs and usually set to PER in the boot-loader for OMAP4.
If not set to PER, then by default gets sourced from CORE M7x2.

On OMAP4, OPP100/OPP50 freqs for SGX are 307.2/153.6 Mhz, which
can be directly derived from PER m7x2 without changing the
divider. Otherwise will be sourced from CORE m7x2 and when dvfs
layer request for 307.2/153.6Mhz will be getting  320/160Mhz.

Change-Id: Ifd3b9374f029adcdcf1bf04e570d188fea3737f3
Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Vinay Chaurasia <vinaych@ti.com>

Patch Set 1
OMAP4: DSS: Implement workaround for Errata ID:i733.

Description of Errata i733:
Due to wrong timings, all register accesses transitioning through the L4
interconnect toward DSS are not reliable.

Workaround:
DSS register access should be addressed through the L3 interconnect.

This change fixes errata by using L3 for access to DSS in dss_hwmod
instead of L4.

Silicon Versions Impacted:
OMAP4430 ES1.0, ES2.0, ES2.1, ES2.2, ES2.3
OMAP4460 ES1.0, ES1.1
OMAP4470 ES1.0

Change-Id: Ie087b861ee653a3beeacba74c3afe7b1a0490ed4
Co-author: Raghuveer Murthy <raghuveer.murthy@ti.com>
Signed-off-by: Mykhailo Denysiuk <x0172934@ti.com>

Patch Set 5
Revert "Revert "ARM: OMAP4: cpuidle: Configure MPU C4 state to OSWR""

This reverts commit a15b0683891c636785e1af83b2650697e6f7d8ea.
OMAP4: correct CPU Idle settings for exit latency and thresholds

------------------------------------------------------------------------------------
Cstates					exit_latency	thresholds
OMAP4430	CPUs	MPU	Core		us		us	SystemClock
------------------------------------------------------------------------------------
C1		WFI	ON	ON		4		4		ON
------------------------------------------------------------------------------------
C2		OFF	INA	INA		300		300		ON
------------------------------------------------------------------------------------
C3		OFF	CSWR	OSWR		5000		10000		OFF
------------------------------------------------------------------------------------
C4		OFF	OSWR	OSWR		5200		35000		OFF
------------------------------------------------------------------------------------

------------------------------------------------------------------------------------
Cstates					exit_latency	thresholds
OMAP4460	CPUs	MPU	Core		us		us	SystemClock
------------------------------------------------------------------------------------
C1		WFI	ON	ON		4		4		ON
------------------------------------------------------------------------------------
C2		OFF	INA	INA		300		1800		ON
------------------------------------------------------------------------------------
C3		OFF	CSWR	OSWR		4000		4000		OFF
------------------------------------------------------------------------------------
C4		OFF	OSWR	OSWR		4200		4200		OFF
------------------------------------------------------------------------------------

------------------------------------------------------------------------------------
Cstates					exit_latency	thresholds
OMAP4470	CPUs	MPU	Core		us		us	SystemClock
------------------------------------------------------------------------------------
C1		WFI	ON	ON		4		4		ON
------------------------------------------------------------------------------------
C2		OFF	INA	INA		500		1200		ON
------------------------------------------------------------------------------------
C3		OFF	CSWR	OSWR		5300		5300		OFF
------------------------------------------------------------------------------------
C4		OFF	OSWR	OSWR		5500		15000		OFF
------------------------------------------------------------------------------------

Change-Id: I6f9046db4273b10cecd7bf896c1a8488774e0d5b
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>

Patch Set 3
wifi: sysfs option to speed up wifi transfer during early_suspend.

kept the wifi_pm name to maintain compatibility with franco's
code.
omap: rpmsg: unmap vring memory address

A call to iounmap() of the vring memory address was missing during the deletion
stage of the rpmsg-virtqueues, thus causing a memory leak.

Change-Id: I208c908e064e3c9cc56e6c21736725836eb2d74d

Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Signed-off-by: Iliyan Malchev <malchev@google.com>
remoteproc: add mutex protection for traces

In rproc_put() the buffers used to read remoteproc's traces were being unmapped
without any protection.  If at the same time a cat on the traces is done, it
may access an unmapped buffer leading to a crash.

This patch protects the access and unmapping of dump/trace buffers with a
mutex.  It also fixes some checkpatch issues in the trace functions.

Change-Id: I0a6f52e9df691bc1d4ff894febb9a20819b4b7c3

Signed-off-by: Miguel Vadillo <vadillo@ti.com>
Signed-off-by: Iliyan Malchev <malchev@google.com>
OMAP4: PM: fix overconsumption on OFF mode

The wrong value of CM_L3INIT_CLKSTCTRL.CLKTRCTRL = 2 (SW_WKUP)
has been stored in SAR during omap4_sar_save() execution and
causes power over consumption on OFF mode due to C2C operation.
It happens because the L3INIT CD need to be enabled during
omap4_sar_save() execution for proper USBHOST module context storing.

Problematic use case:
1) OMAP goes to sleep,
2) modem wakeup the C2C, the EMIF but the MPU is still sleeping
(as expected)
3) Modem release all his constraints, C2C is turned to OFF.
4) but OMAP never reach again OFF while we don't wakeup the CPU
(by a keypress for example), sys_clk is already ON and voltages
are not equal to 0. (OPP 50 for CORE_3 and retention voltages
for both VCORE1 and VCORE2).

As WA overwrite CM_L3INIT_CLKSTCTRL.CLKTRCTRL = 0x1 (SW_SLEEP).

Change-Id: I2e453c07f61bab28a7213dd66044fd41a021961b
Signed-off-by: Arthur Cassegrain <a-cassegrain@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>

Patch Set 1
Revert "OMAPDSS: DSSCOMP: efficiency improvement."

This reverts commit a94f38cf6c1891f34e89ada7bd6a7c6542960de1.
OMAPDSS: DSSCOMP: efficiency improvement.

This change adds 3 local caches of objects, which are used at each flip buffer
action. In original variant kzalloc()/kfree() functions are called each time
dsscomp_gralloc_queue() function is called. This meens that slab|slob|slub
common cache is used at each frame draw action. Call to kzalloc()/kfree()
result in synchronization with other code, which uses common cache, and can
result in dips in FPS, when other code allocates/frees memory.
This change improves reliability, autonomy and efficiency of DSSCOMP module.

Change-Id: Ibf729b922fcd613ff2a2da8e452e0075f5397e55
Signed-off-by: Mykhailo Denysiuk <x0172934@ti.com>

Patch Set 16
zram: script clean-up
Added Sound Control version 1.

Conflicts:

	drivers/misc/Kconfig
	drivers/misc/Makefile
TWL6040_RAMP_ZERO is only used for changing the headset volume.