KVM: PPC64: booke: Set interrupt computation mode for 64-bit host

64-bit host needs to remain in 64-bit mode when an exception take place.
Set interrupt computaion mode in EPCR register.

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
KVM: PPC64: booke: Add EPCR support in mtspr/mfspr emulation

Add EPCR support in booke mtspr/mfspr emulation. EPCR register is defined
only for 64-bit and HV categories, so it shoud be available only on 64-bit
virtual processors. Undefine the support for 32-bit builds.
Define a reusable setter function for vcpu's EPCR.

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
KVM: PPC64: booke: Add EPCR support in sregs

Add KVM_SREGS_E_64 feature and EPCR spr support in get/set sregs
for 64-bit hosts.

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
KVM: PPC64: booke: Add guest computation mode for irq delivery

When delivering guest IRQs, update MSR computaion mode according to guest
interrupt computation mode found in EPCR.

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
KVM: PPC: booke: Extend MAS2 EPN mask for 64-bit

Extend MAS2 EPN mask for 64-bit hosts, to retain most significant bits.
Change get tlb eaddr to use this mask.

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
KVM: PPC: e500: Add emulation helper for getting instruction ea

Add emulation helper for getting instruction ea and refactor tlb instruction
emulation to use it.

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
KVM: PPC: e500: Mask ea's high 32-bits in 32/64 instr emulation

Mask high 32 bits of effective address in emulation layer, for guests running
in 32-bit mode.
MAS2's high-order 32 bits represents the upper 32 bits of the effective address
of the page. Mask it too for tlbwe instruction emulation.

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
KVM: PPC: e500mc: Fix tlbilx emulation for 64-bit guests

tlbilxva emulation was using an u32 variable for guest effective address.
Replace it with gva_t type to handle 64-bit guests.

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
KVM: PPC64: booke: Hard disable interrupts when entering guest

64-bit host runs with lazy interrupt disabling, so local_irq_disable() does
not disable interrupts right away and does not protect against preemption
required by __kvmppc_vcpu_run(). Define a macro for 64-bit to use
hard_irq_disable().

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
PowerPC: booke64: Refactor exception prolog for save/restore regs

Refactor exception prolog to allow save/restore register parameters. Add
addition none definition for exception prolog usage.
This is needed for exceptions like Guest Doorbell that use GSRRx regsiters
which do not map on exception type.

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
PowerPC: booke64: Fix machine check handler to use the right prolog

Machine check exception handler was using a wrong prolog. Hypervisors, like
KVM, which are called early from the exception handler rely on the interrupt
source.

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
PowerPC: booke64: Add DO_KVM kernel hooks

Hook DO_KVM macro to 64-bit booke in a optimal way similar to 32-bit booke
see head_fsl_booke.S file. Extend interrupt handlers' parameter list with
interrupt vector numbers to accomodate the macro. Rework Guest Doorbell
handler to use the proper GSRRx save/restore registers.
Only the bolted version of tlb miss handers is addressed now.

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
PowerPC: booke64: Use SPRG0/3 scratch for bolted TLB miss & crit int

Embedded.Hypervisor category defines GSPRG0..3 physical registers for guests.
Avoid SPRG4-7 usage as scratch in host exception handlers, otherwise guest
SPRG4-7 registers will be clobbered.
For bolted TLB miss exception handlers, which is the version currently
supported by KVM, use SPRN_SPRG_GEN_SCRATCH (aka SPRG0) instead of
SPRN_SPRG_TLB_SCRATCH (aka SPRG6) and replace TLB with GEN PACA slots to
keep consitency.
For critical exception handler use SPRG3 instead of SPRG7.

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
KVM: PPC32: bookehv: Remove GET_VCPU macro from exception handler

GET_VCPU define will not be implemented for 64-bit for performance reasons
so get rid of it also on 32-bit.

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
KVM: PPC64: bookehv: Add support for interrupt handling

Add bookehv interrupt handling support for 64-bit hosts. Change common stack
layout to refer PPC_LR_STKOFF kernel constant. Dispatch the 64-bit execution
flow to the existing kvm_handler_common asm macro. Update input register
values documentation.
Only the bolted version of TLB miss exception handlers is supported now.

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
KVM: PPC: e500: Silence bogus GCC warning in tlb code

64-bit GCC 4.5.1 warns about an uninitialized variable which was guarded
by a flag. Initialize the variable to make it happy.

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
KVM: PPC: booke: Fix get_tb() compile error on 64-bit

Include header file for get_tb() declaration.

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>