softpipe: implement seamless cubemap support. (v1.1)

This adds seamless sampling for cubemap boundaries if requested.

The corner case averaging is messy but seems like it should be spec
compliant.

The face direction stuff is also a bit messy, I've no idea if that could
or should be simpler, or even if all my directions are fully correct!

v1.1: update comments, drop unneeded seamless calls for nearest, fix
if statement layout.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
st/mesa: remove a weird msaa hack

It doesn't work and it's not clear how it's supposed to work.

Reviewed-by: Brian Paul <brianp@vmware.com>
gallium: manage render condition in cso_context and fix postprocessing w/ it

Reviewed-by: Brian Paul <brianp@vmware.com>
gallium/cso: don't use the pipe_error return type where it's not needed

Reviewed-by: Brian Paul <brianp@vmware.com>
gallium/util: move util_try_blit_via_copy_region to u_surface.c

Reviewed-by: Brian Paul <brianp@vmware.com>
svga: stop using pipe_surface::usage

There are only 2 possible usages: render target and depth stencil.
Both can be derived from the surface format, so the flag is redundant.

And it's going away...

Reviewed-by: Brian Paul <brianp@vmware.com>
gallium: remove pipe_surface::usage

Not really used by anybody now.

Reviewed-by: Brian Paul <brianp@vmware.com>
mesa: disallow creation of GL 3.1 compatibility contexts

Death to driver-specific hacks!

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
mesa: don't advertise ARB_texture_buffer_object in legacy contexts

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
st/dri: add a way to force MSAA on with an environment variable

There are 2 ways. I prefer the former:
  GALLIUM_MSAA=n
  __GL_FSAA_MODE=n

Tested with ETQW, which doesn't support MSAA on Linux. This is
the only way to get MSAA there.

Reviewed-by: Brian Paul <brianp@vmware.com>
winsys/radeon: don't use BIND flags, add a flag for the cache bufmgr instead
r600g: use u_upload_mgr for allocating staging transfer buffers

u_upload_mgr suballocates memory from a large buffer and maps the allocated
range (unsychronized), which is perfect for short-lived staging buffers.

This reduces the number of relocations sent to the kernel.

Tested-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
gallium/util: add a simple allocator for suballocating from a large buffer

Tested-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
r600g: suballocate memory for the STRMOUT_BUFFER_FILLED_SIZE register

Instead of having a 4-byte buffer for each streamout target, we suballocate
each dword from a 4K buffer.

This further reduces the overall number of relocations.

Tested-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
r600g: suballocate memory for fetch shaders from a large buffer

Fetch shaders are usually destroyed at the context destruction by the state
tracker, so we can put them all in a large buffer without wasting memory.

This reduces the number of relocations sent to the kernel a little bit.

Tested-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
llvmpipe: remove unneeded draw_flush() call

This is redundant since we're calling draw_bind_fragment_shader()
which already does a flush.

v2: the redundant flush in llvmpipe_set_constant_buffer() has
already been removed by commit 3427466e6dbbb8db7c1ecda6b3859ca1cc5827a3

Reviewed-by: José Fonseca <jfonseca@vmware.com>
softpipe: remove unused corner0 variable
configure.ac: Disable compiler optimizations when --enable-debug is set

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Dan Nicholson <dbn.lists@gmail.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
i965: Make try_rewrite_rhs_to_dst compare VGRF size to regs written.

try_rewrite_rhs_to_dst is a quick optimization to avoid generating new
temporaries (and MOVs from those temporaries to the dest) for every
expression tree we visit.  By generating better code in simple cases, we
reduce the burden on later optimization passes like register coalescing.

Previously, we compared inst->regs_written() to lhs->vector_elements
to make sure the instruction generating our value wrote the same number
of components as our destination register.

However, this fails in some cases.  One example is texturing (which
produces a vec4) into gl_FragData[i].  Technically, gl_FragData[i] is
also a vec4.  However, the destination VGRF actually has size 4n (where
n is the size of the array).

split_virtual_grfs() can't split VGRFs that are used by SEND messages
which require contiguous destination registers (like texturing), and
register allocation needs all VGRFs to have sizes between 1 and 4.

Amnesia: The Dark Descent hits this case: a texturing instruction
(4 components) gets rewritten to the gl_FragData output register
(which was 4*3 = 12 components), causing the register allocator to
hit the "we rely on split_virtual_grfs" assertion.

This makes it possible to play Amnesia.

Reviewed-by: Eric Anholt <eric@anholt.net>
i965: Fix disassembly of jump targets on Gen7.

Gen7 stores the JIP/UIP bits in different places.

Reviewed-by: Eric Anholt <eric@anholt.net>