Build: Disable SMP build temporarily for BIOS 6.34 upgrade

The build for SMP libraries and executables has been temporarily
disabled to allow the code to be fixed for the interface changes
between the older SMP/BIOS 1.00.00.28_eng and the newer unified
SYS/BIOS 6.34 release stream.

This patch will be reverted after the changes are complete.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Build: Upgrade the SMP build to use BIOS 6.34.01.14

SMP/BIOS functionality is merged with the regular SYS/BIOS into
a single product in BIOS 6.34. SMP-mode can be specifically
built for by setting the BIOS.smpEnabled configuration property
by the application.

The build system is updated to use the current latest SMP-mode
BIOS version, BIOS 6.34.01.14. This is the recommended version to
be used for SMP/BIOS to maintain functional feature compatibility
with the previous SMP/BIOS 1.00.00.28_eng version. The new version
needs the applications to replace some of the APIs used in
SMP-mode.

Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Configs: Configure BIOS for SMP-mode in SMP specific cfg files

SMP functionality has been merged into a single product in BIOS 6.34.
The BIOS.smpEnabled must be explicitly set to true within the SMP
specific configuration files to configure the BIOS for SMP-mode.

Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Trace: Update to use the renamed SMP API in BIOS 6.34

The following API were renamed during the unification of SMP/BIOS and
SYS/BIOS in the SYS/BIOS 6.34 release stream:
  - Core_getCoreId() has been replaced with Core_getId().
  - Hwi_disableCoreInts() has been replaced with Core_hwiDisable()
  - Hwi_restoreCoreInts() has been replaced with Core_hwiRestore()
  - Hwi_enableCoreInts() has been replaced with Core_hwiEnable()

The SysMin module has been updated to use the new API in place of
the old API.

Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
DEH: Update to use the renamed SMP API in BIOS 6.34

The following API were renamed during the unification of SMP/BIOS and
SYS/BIOS in the SYS/BIOS 6.34 release stream:
  - Core_getCoreId() has been replaced with Core_getId().
  - Hwi_disableCoreInts() has been replaced with Core_hwiDisable()
  - Hwi_restoreCoreInts() has been replaced with Core_hwiRestore()
  - Hwi_enableCoreInts() has been replaced with Core_hwiEnable()

The Watchdog module has been updated to use the new API in place of
the old API.

Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
PM: Include proper Power module for SMP

The BIOS Power module has been made into a distinct module for
SMP-mode, and has a different path from the regular SYS/BIOS
Power module path in the new unified BIOS 6.34 release stream.

The IpcPower module is updated to use the proper Power module
for SMP-mode.

Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Configs: Move Power module from IpcCommon to specific cfg files

The BIOS Power module for SMP-mode has a different path from the
regular SYS/BIOS Power module path in the new unified BIOS 6.34
release stream.

The inclusion of the module is therefore moved from the generic
IpcCommon.cfg.xs files to each of the specific core config files,
with the proper module included.

Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Revert "Build: Disable SMP build temporarily for BIOS 6.34 upgrade"

This reverts commit 80278375601fce545247273dc19415f738b69028.

The SMP-build is reenabled after all the adaptation changes to
use the BIOS 6.34.01.14 release.

Signed-off-by: Suman Anna <s-anna@ti.com>
Utils: Update suspend address lookup for SMP-mode with BIOS 6.34

The suspend address for ARM M3/M4 targets is currently looked up using
the symbol name, ti_sysbios_family_arm_ducati_omap4430_readyIdleCore0
on Core0. This symbol name is no longer valid in SMP-mode with BIOS
6.34 release stream, as the SMP-mode Power module is different and has
a different package path from the non-SMP Power module.

The symbol address, ti_sysbios_family_arm_ducati_smp_readyIdleCore0,
is used to detect the suspend address for a M3/M4 base-image file.
This symbol is used only when one base-image is supplied to the
genrprc utility, as is the case for SMP.

Signed-off-by: Suman Anna <s-anna@ti.com>
Platform: Increase EXT_DATA size for OMAP4 IPU and Core1

The EXT_DATA region is increased from 6MB to 8MB for both OMAP4
IPU (used in SMP builds) and Core1 platforms. This increase is
being done to fulfill the memory requirements in the multimedia
baseimage after adding some encoder/decoder functionalities in.

Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Signed-off-by; Suman Anna <s-anna@ti.com>
Resources: Increase the IPU data size by 2MB for OMAP4

The IPU data region size, accomodating both the data and heap
sections has been increased by 2MB to allow the Core1/IPU data
to be increased by the same amount. This increase is being done
to fulfill the memory requirements in multimedia baseimage after
adding some encoder/decoder functionalities in.

Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Signed-off-by; Suman Anna <s-anna@ti.com>
Revert "PM: Enable mbox interrupt in wugen for DSP before suspending"

This reverts commit babf5fe293ef5ff912c198c905cb0b07f6e0df85.

The above commit is added as a means to have the DSP resumed properly
after the remote processor has been suspended from the host side. The
root-cause for the original issue is unknown, but the above solution
is no longer needed with the latest host-side code.

The remote processor would be put into reset and the mailbox interrupt
register context is saved during a suspend. The DSP Wakeup Generator
would not need any user-configured interrupts to be enabled before the
DSP is suspended for it to wake up properly. This revert changes the
code back to this expected behavior.

Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
PM: Enable timer register restoration for non-SMP targets

The Timer register restoration API was supported and made
available first only in the SMP/BIOS product. This API is
available for both SMP and non-SMP modes in the unified BIOS
6.34 release (starting from 6.34.01.14).

The restore functionality for non-SMP targets was previously
commented out, and relied on the timers being restored by the
host-side code. The Timers are now properly restored even for
non-SMP targets and truely enables any resume from Device OFF
for processors running regular SYS/BIOS, and removes the
dependency with the host-side restore functionality.

Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Resources: Add ISS address space for DSP

De-interlacer use case needs the ISS to be visible to DSP.
The ISS address space is programmed into the DSP MMU using
the DSP resource table.

Signed-off-by: Adarsh Nagaraja <adarsh.hn@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Build: Update to the latest XDC and IPC toolsets

The build system is updated to use latest XDC and IPC
tools: XDC 3.24.03.33 and IPC 1.25.00.04 respectively.

This newer toolset are the latest on the respective
release streams, and include minor fixes.

The README has also been updated with the corresponding
download links.

Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Build: Upgrade to BIOS 6.34.02.18 version

The build system is updated to use the latest BIOS release,
BIOS 6.34.02.18.

This newer BIOS version includes the following important fixes
for SMP-mode:
  - The fix to the Task scheduler that prevents an unrecoverable
    dead lock situation if/when an Idle task blocks.
  - A fix to the Load module issue present in previous builds.
  - A fix for a critical bug related to a race condition that
    occurs when one core is deleting a task and the other core
    is performing a memory allocation or free operation.

Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Rework core0 memory map for DCE core0 image

Signed-off-by: Nicolas Dechesne <n-dechesne@ti.com>
Hack! Align OMAP5 IPU addresses on OMAP4

Signed-off-by: Vincent Stehlé <v-stehle@ti.com>