Soften the pattern-can-never-match error in TableGen into a warning. This pattern can be very useful in cases where you want to define a multiclass that covers both commutative and non-commutative operators (say, add and sub).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164256 91177308-0d34-0410-b5e6-96231b3b80d8
Add in new data types that are used by AMDIL/ANL among others.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164261 91177308-0d34-0410-b5e6-96231b3b80d8
Add predicates for queries on whether an attribute exists.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164264 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: Tidy up IntrinsicsARM.td a bit.

Make the TargetPrefix setting one big setting instead of being spread out
everywhere. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164265 91177308-0d34-0410-b5e6-96231b3b80d8
Convert some attribute existence queries over to use the predicate methods.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164268 91177308-0d34-0410-b5e6-96231b3b80d8
Fix static function names in CodingStandards examples.

Try not to violate conventions immediately before explaining them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164278 91177308-0d34-0410-b5e6-96231b3b80d8
Sphinxify DebuggingJITedCode

LGTM by Michael Spencer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164280 91177308-0d34-0410-b5e6-96231b3b80d8
Re-work X86 code generation of atomic ops with spin-loop

- Rewrite/merge pseudo-atomic instruction emitters to address the
  following issue:
  * Reduce one unnecessary load in spin-loop

    previously the spin-loop looks like

        thisMBB:
        newMBB:
          ld  t1 = [bitinstr.addr]
          op  t2 = t1, [bitinstr.val]
          not t3 = t2  (if Invert)
          mov EAX = t1
          lcs dest = [bitinstr.addr], t3  [EAX is implicit]
          bz  newMBB
          fallthrough -->nextMBB

    the 'ld' at the beginning of newMBB should be lift out of the loop
    as lcs (or CMPXCHG on x86) will load the current memory value into
    EAX. This loop is refined as:

        thisMBB:
          EAX = LOAD [MI.addr]
        mainMBB:
          t1 = OP [MI.val], EAX
          LCMPXCHG [MI.addr], t1, [EAX is implicitly used & defined]
          JNE mainMBB
        sinkMBB:

  * Remove immopc as, so far, all pseudo-atomic instructions has
    all-register form only, there is no immedidate operand.

  * Remove unnecessary attributes/modifiers in pseudo-atomic instruction
    td

  * Fix issues in PR13458

- Add comprehensive tests on atomic ops on various data types.
  NOTE: Some of them are turned off due to missing functionality.

- Revise tests due to the new spin-loop generated.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164281 91177308-0d34-0410-b5e6-96231b3b80d8
Fix Sphinx warnings.

Toctree was not being interlinked properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164282 91177308-0d34-0410-b5e6-96231b3b80d8
Specify CPu to prevent failure on ATOM due to different code scheduling



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164283 91177308-0d34-0410-b5e6-96231b3b80d8
Change enum type in a static table to uint8_t instead. Saves about 700 hundred bytes of static data. Change unsigned char in same table to uint8_t for explicitness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164285 91177308-0d34-0410-b5e6-96231b3b80d8
Make sure lli compiles all code before invalidating instruction caches.

Patch from Amara Emerson.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164296 91177308-0d34-0410-b5e6-96231b3b80d8
Fix 80-col violations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164297 91177308-0d34-0410-b5e6-96231b3b80d8