omap2plus-cpufreq.c: fix for TF doesn't work when CPU1 on/off - from Linaro
sched: Fix select_fallback_rq() vs cpu_active/cpu_online
OMAP4: PM: IVA AUTO RET relaxed workaround in idle path

AUTO RET for IVA VDD Cannot be permanently enabled during OFF mode due to
potential race between IVA VDD entering RET and start of Device OFF mode.

It is mandatory to have AUTO RET for IVA VDD exlusive with Devide OFF mode.
In order to avoid lockup in OFF mode sequence, system must ensure IVA
voltage domain transitions straight from stable ON to OFF.

In addition, management of IVA VDD SmartReflex sensor at exit of idle path
may introduce a misalignment between IVA Voltage Controller state and IVA
PRCM voltage FSM based on following identified scenario:

IVA Voltage Controller is woken-up due to SmartReflex management while
IVA PRCM voltage FSM stays in RET in absence of any IVA module wake-up event
(which is not systematic in idle path as opposed to MPU and CORE VDDs being
necessarily woken up with MPU and CORE PDs).

WA involves:
Ensure stable ON-OFF transition for IVA voltage domain during OFF mode sequence.
Ensure VCON and PRCM FSM are kept aligned due to IVA SR handling in idle path.
1) AUTO RET for IVA VDD is enabled entering in idle path, disabled exiting idle
   path and IVA VDD is always woken-up with a SW dummy wakeup.
2) OFF mode is enabled only in Suspend path.
3) AUTO RET for IVA VDD remains disabled in Suspend path (before OFF mode).

REVISIT: Update the patch once proper Errata is out for 44xx.

Benefits:
1) This patch ensures it is possible to gate SYS_CLK during OS-Idle LCD OFF
when all domains are idled, saving up to 2mA at VBAT from external clock buffer.

2) IVA voltage domain is now allowed to scale to Retention during idle which
reduces power consumption on all types of use case allowing extensive use of
idle path (e.g.: Home screen, Page reading). Effects are especially visible
if system uses Smart-Reflex Class 1.5 compared to Class 3 considering the
increased difference of voltage from converged Voltage SR vs Retention voltage.

TODO: quantify the actual savings from IVA-RET with further measurements.

Change-Id: I01f0431f7556f0baf0b5b6b42092cd11c2442f00
Signed-off-by: Cedric Vamour <c-vamour@ti.com>

Conflicts:

	arch/arm/mach-omap2/pm44xx.c
gralloc.c: increase tiler value to 32mb - from Linaro
OMAP4: correct CPU Idle settings for exit latency and thresholds

------------------------------------------------------------------------------------
Cstates					exit_latency	thresholds
OMAP4430	CPUs	MPU	Core		us		us	SystemClock
------------------------------------------------------------------------------------
C1		WFI	ON	ON		4		4		ON
------------------------------------------------------------------------------------
C2		OFF	INA	INA		300		300		ON
------------------------------------------------------------------------------------
C3		OFF	CSWR	OSWR		5000		10000		OFF
------------------------------------------------------------------------------------
C4		OFF	OSWR	OSWR		5200		35000		OFF
------------------------------------------------------------------------------------

------------------------------------------------------------------------------------
Cstates					exit_latency	thresholds
OMAP4460	CPUs	MPU	Core		us		us	SystemClock
------------------------------------------------------------------------------------
C1		WFI	ON	ON		4		4		ON
------------------------------------------------------------------------------------
C2		OFF	INA	INA		300		1800		ON
------------------------------------------------------------------------------------
C3		OFF	CSWR	OSWR		4000		4000		OFF
------------------------------------------------------------------------------------
C4		OFF	OSWR	OSWR		4200		4200		OFF
------------------------------------------------------------------------------------

------------------------------------------------------------------------------------
Cstates					exit_latency	thresholds
OMAP4470	CPUs	MPU	Core		us		us	SystemClock
------------------------------------------------------------------------------------
C1		WFI	ON	ON		4		4		ON
------------------------------------------------------------------------------------
C2		OFF	INA	INA		500		1200		ON
------------------------------------------------------------------------------------
C3		OFF	CSWR	OSWR		5300		5300		OFF
------------------------------------------------------------------------------------
C4		OFF	OSWR	OSWR		5500		15000		OFF
------------------------------------------------------------------------------------

Change-Id: I6f9046db4273b10cecd7bf896c1a8488774e0d5b
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>

Patch Set 3

Conflicts:

	arch/arm/mach-omap2/cpuidle44xx.c
cpuidle44xx.c: now that we're using Ezekeel's Weathley governor we wan't to pay close attention to C4 state, so let's tweak the exit_latency
Input: evdev - Don't hold wakelock when no data is available to user-space

If there is no SYN_REPORT event in the buffer the buffer data is invisible
to user-space. The wakelock should not be held in this case.

Change-Id: Idae890ff0da8eb46a2cfce61a95b3a97252551ad
Signed-off-by: Arve Hjønnevåg <arve@android.com>
Input: evdev - Add ioctl to block suspend while event queue is not empty.

Add an ioctl, EVIOCSSUSPENDBLOCK, to enable a wakelock that will block
suspend while the event queue is not empty. This allows userspace code to
process input events while the device appears to be asleep.

The current code holds the wakelock for up 5 seconds for every input
device and client. This can prevent suspend if sensor with a high data
rate is active, even when that sensor is not capable of waking the
device once it is suspended.

Change-Id: I624d66ef30a0b3abb543685c343382b8419b42b9
Signed-off-by: Arve Hjønnevåg <arve@android.com>
Input: evdev - fix variable initialisation

Commit 509f87c5f564 (evdev - do not block waiting for an event if
fd
is nonblock) created a code path were it was possible to use retval
uninitialized.

This could lead to the xorg evdev input driver getting corrupt data
and refusing to work with log messages like
	AUO-Pixcir touchscreen: Read error: Success
	sg060_keys: Read error: Success
	AUO-Pixcir touchscreen: Read error: Success
	sg060_keys: Read error: Success
(for drivers auo-pixcir-ts and gpio-keys).

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add CPUIDLE coupled state interface from Google Android team. Original backport work from faux123
cpufreq: interactiver governor: Add a time view concept

CPUFreq governors are always a tradeoff between power vs performance.
For low power UCs we want to have a less reponsive cpufreq governor that
does not respond or react to each load pick.
However when scrolling on the screen or during webbrowsing we need a more
responsive governor that interact or esponse to each load variation.

To detect which kind of application we have, we'll rely on the history of
the load. if the the average over the load history is high that means we
need to be more responsive so we change the governor paramters in that
direction.
if the average over the load history is low thatmeans we are in low power
UCs so we change the governor parameter to be less responsive

Change-Id: Ifd55ac4cfbc1bd9eded4ae603b158054c6169e8c
Signed-off-by: Nicole Chalhoub <n-chalhoub@ti.com>
Signed-off-by: Taras Kondratiuk <taras@ti.com>
(cherry picked from commit c9d2e290d40f629306ba4cd020be1d71ed5e1d23)

Conflicts:

	drivers/cpufreq/cpufreq_interactive.c
Changes to Pegasusq based on GSII siyahkernel
ARM: prevent VM_GROWSDOWN mmaps extending below FIRST_USER_ADDRESS

commit 9b61a4d1b2064dbd0c9e61754305ac852170509f upstream.

Reported-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
mm: nobootmem: fix sign extend problem in __free_pages_memory()

commit 6bc2e853c6b46a6041980d58200ad9b0a73a60ff upstream.

Systems with 8 TBytes of memory or greater can hit a problem where only
the the first 8 TB of memory shows up.  This is due to "int i" being
smaller than "unsigned long start_aligned", causing the high bits to be
dropped.

The fix is to change `i' to unsigned long to match start_aligned
and end_aligned.

Thanks to Jack Steiner for assistance tracking this down.

Signed-off-by: Russ Anderson <rja@sgi.com>
Cc: Jack Steiner <steiner@sgi.com>
Cc: Johannes Weiner <hannes@cmpxchg.org>
Cc: Tejun Heo <tj@kernel.org>
Cc: David S. Miller <davem@davemloft.net>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
memcg: free spare array to avoid memory leak

commit 8c7577637ca31385e92769a77e2ab5b428e8b99c upstream.

When the last event is unregistered, there is no need to keep the spare
array anymore.  So free it to avoid memory leak.

Signed-off-by: Sha Zhengju <handai.szj@taobao.com>
Acked-by: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Reviewed-by: Kirill A. Shutemov <kirill@shutemov.name>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
I2C: OMAP: Fix the crash in i2c remove

Should fix the crash at arch/arm/mach-omap2/omap_l3_noc.c
OMAP4: DVFS: Fix scaling dependent frequencies.

When scaling dependent frequencies down it is observed that the order
in which frequencies are changed is incorrect.  For example, when core
domain changes OPP down from OPP119 to OPP50 the order is:
a) scale L3 freq down to OPP50
b) scale SGX freq down to OPP50
which is wrong.

Frequencies are scaled in order devices are registered in omap dvfs
framework in device list. Devices are inserted to the list in order,
such as dependences are satisfied if scaling frequencies up.

When scaling frequencies down traverse list backwards.

Change-Id: I752bcb264cac12514f358986a906f29ee81ba75e
Signed-off-by: Oleksandr Kozaruk <oleksandr.kozaruk@ti.com>
timer: optimize apply_slack()

__fls(mask) is equivalent to find_last_bit(&mask, BITS_PER_LONG), but cheaper.
find_last_bit was showing up high on the list when I was profiling for stalls
on icache misses on a system with very small cache size (MIPS).

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
AIO: Don't plug the I/O queue in do_io_submit()

Asynchronous I/O latency to a solid-state disk greatly increased
between the 2.6.32 and 3.0 kernels. By removing the plug from
do_io_submit(), we observed a 34% improvement in the I/O latency.

Unfortunately, at this level, we don't know if the request is to
a rotating disk or not.
OMAPDSS: DISPC: Fix rounding error in scaling decision

When checking if we are downscaling by more than a factor,
we were dividing the source dimensions instead of multiplying
back the target dimensions.  This allowed downscaling by
slightly more than the max supported downscaling, resulting
in out-of-range register settings and ultimately SYNC_LOST.

Change-Id: Ic039789c5011d64da870121eeb227a803af1fa83
Signed-off-by: Lajos Molnar <lajos@ti.com>