PackedVector: Make the BitVector implementation configurable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164826 91177308-0d34-0410-b5e6-96231b3b80d8
Removing dependency on third party library for Intel JIT event support.
Patch committed on behalf of Kirill Uhanov

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164831 91177308-0d34-0410-b5e6-96231b3b80d8
X86: when replacing SUB with TEST in ISelDAGToDAG, only replace uses of the
second output of SUB with first output of TEST.

PR13966


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164835 91177308-0d34-0410-b5e6-96231b3b80d8
MIPS DSP: ADDUH.QB instruction sub-class.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164840 91177308-0d34-0410-b5e6-96231b3b80d8
Testcase for r164835

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MIPS DSP: other miscellaneous instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164845 91177308-0d34-0410-b5e6-96231b3b80d8
docs: dedent list on index.rst

In reStructuredText, indented blocks denote block quotes [1]. This list
is not a block quote.

[1]. http://docutils.sourceforge.net/docs/ref/rst/restructuredtext.html#block-quotes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164847 91177308-0d34-0410-b5e6-96231b3b80d8
Remove unused methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164848 91177308-0d34-0410-b5e6-96231b3b80d8
MIPS DSP: add operands to make sure instruction strings are being matched.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164849 91177308-0d34-0410-b5e6-96231b3b80d8
GlobalDCE should be run at -O2 / -Os to eliminate unused dtor, etc. rdar://9142819

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164850 91177308-0d34-0410-b5e6-96231b3b80d8
Don't use bit-wise operations to query for inclusion/exclusion of attributes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164860 91177308-0d34-0410-b5e6-96231b3b80d8
Do not delete BBs if their addresses are taken. rdar://12396696

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164866 91177308-0d34-0410-b5e6-96231b3b80d8
Add test case for r164850.

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Remove more LLVM_DELETED_FUNCTIONs from destructors to fix -std=c++11 build on gcc 4.7.

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A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work.  We only handle these cases:

1. Consecutive stores where the values and consecutive loads. For example:
  int a = p->a;
  int b = p->b;
  q->a = a;
  q->b = b;

2. Consecutive stores where the values are constants. Foe example:
  q->a = 4;
  q->b = 5;



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164885 91177308-0d34-0410-b5e6-96231b3b80d8
Replace a couple if/elses around similar calls with conditional operators on the varying arguments. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164886 91177308-0d34-0410-b5e6-96231b3b80d8
Tidy up to match coding standards. Remove 'else' after 'return' and moving operators to end of preceding line. No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164887 91177308-0d34-0410-b5e6-96231b3b80d8
Speculatively revert commit 164885 (nadav) in the hope of ressurecting a pile of
buildbots.  Original commit message:

A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work.  We only handle these cases:

1. Consecutive stores where the values and consecutive loads. For example:
  int a = p->a;
  int b = p->b;
  q->a = a;
  q->b = b;

2. Consecutive stores where the values are constants. Foe example:
  q->a = 4;
  q->b = 5;



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164890 91177308-0d34-0410-b5e6-96231b3b80d8
Fix a somewhat surprising miscompile where code relying on an ABI
alignment could lose it due to the alloca type moving down to a much
smaller alignment guarantee.

Now SROA will actively compute a proper alignment, factoring the target
data, any explicit alignment, and the offset within the struct. This
will in some cases lower the alignment requirements, but when we lower
them below those of the type, we drop the alignment entirely to give
freedom to the code generator to align it however is convenient.

Thanks to Duncan for the lovely test case that pinned this down. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164891 91177308-0d34-0410-b5e6-96231b3b80d8
Shrink TargetAlignElem a bit, we do a lot of searches on them.

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