[ARM] arm32: Don't flush VTLB on all SCTLR update

This patch does not improve boot time but it does improve
application reactivity.

Signed-off-by: Anup Patel <anup@brainfault.org>
[EMULATORS] Don't use vmm_spin_lock()/unlock() in PIC irq handle callback.

The PIC irq handle callback functions could be called in any context (Orphan, Normal, OR IRQ).

Using vmm_spin_lock()/unlock() inside PIC irq handle callback to protect PIC data structure would
lead to potential race conditions on SMP systems hence use vmm_spin_lock_irqsave()/unlock_irqrestore() instead.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32: Fixed cp15_write to SCTLR for stability on BeagleBoard-xM

When there is no change in SCTLR due to cp15_write then flush non-global VTLB entries for stability on real hardware.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32: don't break on ng page flushing

When flushing ng page we should flush all of them.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32: fix domain value computation for ARMV6/ARMV7

The value stored in pg->dom should be between 0 and 15.
For ARMV7 it is between 0 and 32 which is not in line with
the rest of the code in cpu_vcpu_cp15.c

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32: decrease some more the VTLB flushing for STCTLR update

Linux is updating the SCTLR register very often. In particular it seems
to be doing it to control the caching policy of the processor.

When caching policy is updated alone, there is no need to flush the
VTLB.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32: don't flush all VTLB on DACR update

We don't need to flush all VTLB on DACR update.

We just flush the page beloging to domain whose value
change.

This patch improve slightly the linux boot time.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32: Remove SMP fix in SCTLR write emulation

With recent changes in VTLB, SCTLR write, and DACR write emulation we can boot SMP linux guest on QEMU and BeagleBoard-xM

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32: Always flush entire VTLB when SCTLR changes for SMP guest vcpu

This patch reverts previous patch.

SMP linux guest (i.e. VEXpress-A9 linux guest) crashe upon stress test over longer duration on BeagleBoard-xM.

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] More generic macros

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] Remove duplicate macro from GIC driver.

Signed-off-by: Anup Patel <anup@brainfault.org>
[LIBS] Non-atomic versions of bit operations.

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] Complete implementation of input device framework.

Signed-off-by: Anup Patel <anup@brainfault.org>
[LIBS] libsort: avoid colision with newly defined macros.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ALL] Make list APIs linux compatible.

This patch makes list APIs linux compatible. Later this will ease the driver porting effort.

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] stdio: Use same character device for both input & output.

Using separate devices for input & output in stdio would complicate things when implementing VT100 emulator for desktops.

For simplicity on desktops we will have VT100 emulators that will create a pseudo character device using a keyboard input handler and frame buffer device.

Signed-off-by: Anup Patel <anup@brainfault.org>
[TOOLS] DTC: Upgrade libfdt files to latest from linux source

Signed-off-by: Anup Patel <anup@brainfault.org>
[TOOLS] DTC: Upgrade dtc compiler from latest linux kernel

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] Reduce redundancy among DTS files by having DTSi file

The "/include/" feature with the latest DTC compiler.
We use this feature to reduce redundancy among DTS files.

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] Fix offsetof() macro for 64-bit machines.

Signed-off-by: Anup Patel <anup@brainfault.org>