ARM: OMAP54XX: clock data: add CLKSEL data to l3_iclk_div

Patch adds CLKSEL data to l3_iclk_div. This clock is widely used in
HWMOD framework and it should has CLKSEL data defined.

Change-Id: If58857927498882a5d9479477da8391985b95fbe
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: clock data: add CLKSEL data to l4_root_clk_div

Patch adds CLKSEL data to l4_root_clk_div. This clock is widely used in
HWMOD framework and it should has CLKSEL data defined.

Change-Id: I2a12b25b5182091280e99eaf902e1bb5390879dc
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: clock data: add CLKSEL data to abe_dpll_clk_mux

According to ES2.0 TRM, CM_CLKSEL_ABE_PLL_REF register is used
to select rate of abe_dpll_clk_mux clock. Patch adds needed
data to use it.

Change-Id: Idac5f1e272a1e4b0eca8e3f8f8ecbc11e90c6bde
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: clock data: add CLKSEL data to iva_dpll_hs_clk_div

According to ES2.0 TRM, iva_dpll_hs_clk_div uses CM_BYPCLK_DPLL_IVA
register to select rate in HW. Possible values for CLKSEL are defined
in div4_1to8_rates data structure. Add proper data to make rate
selection possible.

Change-Id: Ia807806d2f8d796a1388b4bea10f006831a57910
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: clock data: add CLKSEL data to mpu_dpll_hs_clk_div

According to ES2.0 TRM, mpu_dpll_hs_clk_div uses CM_BYPCLK_DPLL_MPU
register to select rate in HW. Add proper data to make rate selection
possible.

Change-Id: I37ea209bf676c2b6451bd7b9ee0b88073521bc5e
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: clock data: add CLKSEL data to gpu_core clocks

Patch adds CLKSEL data to the following clocks:
gpu_core_gclk_mux
gpu_core_gclk_mux_sel

"sruct clksel gpu_core_gclk_mux_sel" was previously defined,
now it is used for these clocks.

Change-Id: I91cee88d9db421c86c0bb61c9373f3365ea566ca
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: clock data: add CLKSEL data to wkupaon_iclk_mux

Patch adds CLKSEL data to wkupaon_iclk_mux.
"sruct clksel wkupaon_iclk_mux_sel " was previously defined,
now it is used for these clocks.

Change-Id: I743cbeda9e0bcabb1d120cda64d064f8e0255374
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: clock data: add CLKSEL data to emif_ll_gclk_mux

Patch adds CLKSEL data to emif_ll_gclk_mux,
"sruct clksel emif_ll_gclk_mux_sel" was previously defined,
now it is used for this clock.

Change-Id: Idaf4b96e3a2aea3f3ce64c03385d325dcecb0841
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: clock data: add CLKSEL data to timers

Patch adds CLKSEL data to the following timers:
timer10_gfclk_mux
timer11_gfclk_mux
timer1_gfclk_mux
timer2_gfclk_mux
timer3_gfclk_mux
timer4_gfclk_mux
timer5_gfclk_mux
timer6_gfclk_mux
timer7_gfclk_mux
timer8_gfclk_mux
timer9_gfclk_mux

"struct clksel timer5_gfclk_mux_sel" was previously defined,
now it is used for these clocks.

Change-Id: I094bb56c86814e481ba175cae0bf92001087c538
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: clock data: add CLKSEL data to l3instr_ts_gclk_div

Patch adds CLKSEL data to l3instr_ts_gclk_div, in ES2.0
this clock belongs to CD_L3_INSTR instead of CD_COREAON.

Change-Id: Ice7f7bde81c1ad0e6005c28cb5e029fddf733e31
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: clock data: Correct divider value for div63_1to63_rates

In div63_1to63_rates table, the correct mapping is
value = 1 means divider = 1 and NOT
value = 0 => divider = 1.
Otherwise this will lead to incorrect clock divider programming.

Change-Id: Ib5dee2476cf3a51755bc0ef32a26624d9dbb9ff8
Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com>
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: clock data: modify comment to OMAP5

Change-Id: Iec1d763b9bdc8a616a92125dbfe711648f582531
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: clock data: add dpll_core_m3x2_opt_ck and dpll_per_m3x2_opt_ck

According to ES2.0 TRM, CM_WKUPAON_SCRM_CLKCTRL contains
OPTFCLKEN_SCRM_CORE and OPTFCLKEN_SCRM_PER bits, which are used
to select optional clocks. Patch adds clocks to match these bits.

Change-Id: I82a94895096b06545aee865f2772b75a1e54891d
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: clock data: add leaf clocks to be controlled by modules

Patch adds the following set of leaf clocks:
ocp2scp3_ick
dss_32khz_clk
dss_48mhz_clk
dss_dss_clk
dss_sys_clk
gpio1_dbclk
gpio2_dbclk
gpio3_dbclk
gpio4_dbclk
gpio5_dbclk
gpio6_dbclk
gpio7_dbclk
gpio8_dbclk
iss_ctrlclk
lli_txphy_clk
lli_txphy_ls_clk
sata_ref_clk
slimbus1_slimbus_clk
usb_host_hs_hsic480m_p1_clk
usb_host_hs_hsic480m_p2_clk
usb_host_hs_hsic480m_p3_clk
usb_host_hs_hsic60m_p1_clk
usb_host_hs_hsic60m_p2_clk
usb_host_hs_hsic60m_p3_clk
usb_host_hs_utmi_p1_clk
usb_host_hs_utmi_p2_clk
usb_host_hs_utmi_p3_clk
usb_otg_ss_refclk960m
usb_phy_cm_clk32k
usb_tll_hs_usb_ch0_clk
usb_tll_hs_usb_ch1_clk
usb_tll_hs_usb_ch2_clk

Change-Id: I868fd9ec3e48ca5eb097f77f31bcf54716b76d80
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: clock data: add virtual clocks for OPP framework

OPP framework uses the following clocks, which were added:
virt_l3_ck
virt_dpll_iva_ck
virt_dpll_dsp_ck
virt_dpll_mpu_ck

Change-Id: I6e1da33243956db897a54c48938b86dd5fc499cf
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: clock data: add gpu_l3_giclk and mmc1_32k_gfclk

These new clocks are present in ES2.0 revision. Patch adds related
data for them.

Change-Id: I4e768418b817e52b1c7b7827cce9449506d31cb5
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: clock data: call omap5xxx_custom_clk_init() on init

ES2.0 also should init custom clocks in the same way as ES1.0.
Patch adds missing call of omap5xxx_custom_clk_init().

Change-Id: Ia081f9fdefe8d331849ae13422f98b78f249edae
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: clock data: use omap4_clks_register API

Use omap4_clks_register() API to register and init OMAP54xx set of
clocks.

Change-Id: I0b37ed8e9940e8b354e08e096eaefb9ca25ee0c3
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: hwmod data: add address space for BB2D

According to ES2.0 TRM, BB2D module is connected to L3_MAIN.
BB2D registers start from 0x59000000, size 2KB.

Change-Id: I5642a78edcbb26e7452a1aa880ff389912dedc41
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: OMAP54XX: hwmod data: fix address range for omap54xx_ipu_addrs

According to ES2.0 TRM, there are no changes in IPU comparing to ES1.0
MMU_IPU starts from 0x55082000, and the last register is MMU_GP_REG,
which address is 0x55082088.

Change-Id: I13cc217e57366add79181b88cd588a0050b63ca1
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>