serial: omap: Exclude checking for empty TX FIFO in ISR

Doesn't make sense to check for empty TX FIFO condition
in UART ISR.

THR interrupt can appear only if:
   a) UART_THR empty (FIFO disable);
   b) TX FIFO below trigger level (FIFO enable).

We are using the FIFO for transmit/receive operations
and checking for TX_FIFO_E leads a lot of additional
interrupts (multiple for TX_FIFO size).

Change-Id: I98db26804b5f6d38b28881e03805d28981b34bcd
Signed-off-by: Riazantsev Volodymyr <v.riazantsev@ti.com>
OMAP: UART: Keep the TX fifo full when possible

Current logic results in interrupt storm since the fifo
is constantly below the threshold level. Change the logic
to fill all the available spaces in the fifo as long as
we have data to minimize the possibilty of underflow and
elimiate excessive interrupts.

Change-Id: I2d6284b44b37e6352fc23b57312f6770b8e26b78
Signed-off-by: Mikhail Gonodanov <mig@ti.com>
Signed-off-by: Dmitry Fink <finik@ti.com>
ARM: OMAP4: ID: Remove redundant features

Replaces several flags bearing the same meaning. There is no need
to set flags due to different omap types here, it can be checked
in appropriate places as well.

Change-Id: I1145fd942e794dac02291fb2fc1d15e7b6d539b3
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: linux-omap@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
ARM: OMAP3+: DVFS: Fix misleading frequency in VDD dump

dvfs_dump_vdd() translates voltage request to frequency.
If works fine for requests from devices which belongs
to voltagedomain which is being printed.

But it doesn't make sense for voltage dependency requests,
because in this case frequency is found by voltage from another
voltagedomain.
For example MPU frequency is searched by VDD CORE value.

Instead of translating voltage request to frequency this patch
obtains current device frequency from clk_get_rate() function.

Change-Id: I7a9f5f89a47a971ad931067e0640b26fbb996655
Signed-off-by: Taras Kondratiuk <taras@ti.com>
arm: omap5: hsmmc: API to scale core opp for UHS/HS200

OMAP5 MMC1/2 modules have not been timing closed to handle
192MHz bus frequency transactions at OPP_LOW. So, introduce
API to help scale the core OPP during such transactions

Change-Id: I3a7cc453c87d605f8427e1ecbee4a3448284ba4f
Signed-off-by: Viswanath Puttagunta <vishp@ti.com>
mmc: omap: Use omap hsmmc API to scale OPP and clock

Use the omap platform specific OPP scaling API to scale to
appropriate OPP as necessary. For example, OMAP5 MMC1/2
are not timing closed to use 192MHz functional clock
at OPP_50. So, we use this API and let the platform
specific functions handle if scaling to higher OPP
is necessary and take any action accordingly.

Change-Id: I9f75b6f50f77f44760767ff3ba87815512db4485
Signed-off-by: Viswanath Puttagunta <vishp@ti.com>
mmc: omap_hsmmc: fix max value of clkd

clock divisor can take a max value of 1023
update code as per TRM so that card init can be handled with
higher IP clock frequencies from which clock to the card is
derived.

Change-Id: I2128aa5fc05fd2d13c94afc7321515b8f18a2a39
Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Viswanath Puttagunta <vishp@ti.com>
mmc: omap44XX: Fix errata FSMR: Finite State Machine reset

Errata Description:
After the SYSCTL.SRC or SYSCTL.SRD bit is set to reset
the Clock or Data finite state machine, there
is a delay before which the reset process actually starts. So, if
we just wait for SRC/SRC bit to get cleared immediately after
software sets the bit, then then we might exit out of loop even
before the reset process even starts.

Applies to:
OMAP4430 Series greater than ES1.0
OMAP4460 All series
OMAP4470 All series

Workaround:
First wait for the SYSCTL.SRC/SRD bit to get set, and then
wait for the bit to get reset.

Change-Id: Id026a99d4b5f7a36d68ddb33fcfd26e24fc1f0af
Signed-off-by: Viswanath Puttagunta <vishp@ti.com>
mmc: omap_hsmmc: add tuning support

MMC tuning procedure is required to support SD card
UHS1-SDR104 mode and EMMC HS200 mode.

The tuning function omap_execute_tuning() will only
be called by the MMC/SD core if the corresponding
speed modes are supported by the OMAP silicon which
is set in the mmc host "caps" field.

Change-Id: I3d42d322f3190c3cf6f594b69e7e08e6cb876b3d
Signed-off-by: Viswanath Puttagunta <vishp@ti.com>
arm: omap5: hsmmc: Add UHS1 capable speed modes

OMAP5 ES1.0 supports UHS1 speed modes SDR12, SDR25,
SDR50 and DDR50

OMAP5 ES2.0 has support for UHS1 SDR104 mode as well.

Change-Id: I2494fa3d687dc8c38f2f2674751ef31713b6fc95
Signed-off-by: Viswanath Puttagunta <vishp@ti.com>
ARM: OMAP5: OPP: Remove MMC clock management from DVFS

MMC driver will manage it's own clocks. Current DVFS and
clock framework unnecessarily scale the MMC functional
clock to 192MHz when core is above OPP50 even if the
MMC driver only wants 96MHz at all OPPs.

Change-Id: I78a38d317de1eb0176eb21f25335b196ee8c8b6c
Signed-off-by: Viswanath Puttagunta <vishp@ti.com>
ARM: OMAP5430: hwmod data: Cleanup to align format with the template

Fix various format issues:
- remove useless comments
- move sl2if structure to the proper location
- change space -> tabs
- move forward declaration to the proper location
- Use the proper OMAP54XX prefix for GIC base IRQ

These fixes do not change the functionalities.

Change-Id: I29fe8363b3f9c24a08eaa6b5e9d692a779b69aad
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[rebase and apply on p-linux-omap-3.4]
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
ARM: OMAP5430: hwmod data: Remove unneeded ADDR_TYPE_RT

ADDR_TYPE_RT is used to find the address range that will
contain the SYSCONFIG register.
In case of dual mapping, only the direct path from MPU
does need that flag.
In case the SYSCONFIG does not exist, this flag is not
needed either.

Remove it if the above conditions are met.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[only update change-ID for review.omapzoom]
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>

Change-Id: Ib7f4daca34776ab1d2898b496280b9e8e588e7d7
ARM: OMAP5430: hwmod data: Remove l4_abe bus information

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[only update change-ID for review.omapzoom]
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>

Change-Id: Ia2afcf4e10a1f851628cf2c9725976f0a8a23a0e
ARM: OMAP4+: hwmod data: Change AESS register section from mpu -> aess

In order to be compliant with the other memory sections,
rename the AESS register one "aess" for the direct path
and "aess_dma" for the L3 path.

The driver is changed accordingly to retrieve the proper
section.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Sebastien Guiriec <s-guiriec@ti.com>
[only update change-ID for review.omapzoom]
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>

Change-Id: Ic6cf0f83e1a7639749f83d43ee9948849d2a617c
ARM: OMAP5430: hwmod data: Fix wrong .idlemodes for counter_32k

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[only update change-ID for review.omapzoom]
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>

Change-Id: I821d746d0800ac33188b3939edbe082e970f3ae2
ARM: OMAP5430: hwmod data: Add missing section of the control_module

The control module is made of 4 parts located in two partitions
(wkup and core).
Add 2 hwmods containing the 2 sections.
i
Remove the sysconfig information that is irrelevant
for the control module. The registers are there in the TRM
but all reserved, so in fact not implemented at all.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[only update change-ID for review.omapzoom]
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>

Change-Id: I1504fe4aae46850f56c5f0470d6735c2b820a0ea
ARM: OMAP5430: hwmod data: Fix wrong irq termination for FDIF

The proper way of terminated an IRQ list is to add a -1 entry at
the end.

Fix that for FDIF, that still uses the previous NULL termination.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[only update change-ID for review.omapzoom]
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>

Change-Id: If922bb24e6dabf22ed3673d6893e8b1194d80038
ARM: OMAP5430: hwmod data: Rename HDMI class name hdmi instead of dss_hdmi

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[only update change-ID for review.omapzoom]
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>

Change-Id: I9bdd7ec5aadd0e5b37aa230ef44d067007f08d33
ARM: OMAP5430: hwmod data: Clean / Fix address spaces for SATA

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[only update change-ID for review.omapzoom]
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>

Change-Id: I1dd6c1b786b408e7036454103bb9decd51b0a092