Use an iterator instead of calling .size() on the worklist every time, which is wasteful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152794 91177308-0d34-0410-b5e6-96231b3b80d8
Short term fix for pr12270 before we change dominates to handle unreachable
code.
While here, reduce indentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152803 91177308-0d34-0410-b5e6-96231b3b80d8
Fix bug found by warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152812 91177308-0d34-0410-b5e6-96231b3b80d8
Fix VCVT decoding (between floating-point and fixed-point, Floating-point).  Patch by Richard Barton.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152814 91177308-0d34-0410-b5e6-96231b3b80d8
Revert r152105: "Use uint16_t to store indices into string table"

This patch limited the concatenated register names to 64K which meant
that the total number of registers was many times less than 64K.

If any compilers actually enforce the 64K limit on string literals, and
it turns out to be a problem, we should fix that problem by not using
long string literals.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152816 91177308-0d34-0410-b5e6-96231b3b80d8
Revert r152202: "Use uint16_t to store InstrNameIndices in MCInstrInfo."

We cannot limit the concatenated instruction names to 64K.  ARM is
already at 32K, and it is easy to imagine a target with more
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152817 91177308-0d34-0410-b5e6-96231b3b80d8
Use vmov.f32 to materialize f32 consts on ARM. This relaxes constraints on
register allocation by allowing all 32 D-registers to be used. Patch by Cameron
Zwarich.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152824 91177308-0d34-0410-b5e6-96231b3b80d8
Type sizes and fields offsets inside structs are unsigned.  This is a highly
theoretical fix since it only matters for types with >= 2^63 bits (!) and also
only matters if pointers have more than 64 bits, which is not supported anyway.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152831 91177308-0d34-0410-b5e6-96231b3b80d8
line endings

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152832 91177308-0d34-0410-b5e6-96231b3b80d8
Don't assume all mnemonics fit in 64k.

We currently assume that all targets have less than 64k opcodes. We
shouldn't limit it further.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152833 91177308-0d34-0410-b5e6-96231b3b80d8
ARM aliases for pre-unified syntax fcmpz[sd] mnemonics.

rdar://11056647

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152834 91177308-0d34-0410-b5e6-96231b3b80d8
Make MnemonicTable const again. That part of r152202 was OK.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152840 91177308-0d34-0410-b5e6-96231b3b80d8
Typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152841 91177308-0d34-0410-b5e6-96231b3b80d8
Tabs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152842 91177308-0d34-0410-b5e6-96231b3b80d8
Add another debug statement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152843 91177308-0d34-0410-b5e6-96231b3b80d8
Add some debugging output into fast isel as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152844 91177308-0d34-0410-b5e6-96231b3b80d8
We actually handle AllocaInst via getRegForValue below just fine.

Part of rdar://8905263

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152845 91177308-0d34-0410-b5e6-96231b3b80d8
ARM case-insensitive checking for APSR_nzcv.

rdar://11056591

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152846 91177308-0d34-0410-b5e6-96231b3b80d8
[fast-isel] Don't try to encode LONG_MIN using cmn instructions.
rdar://11038907


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152847 91177308-0d34-0410-b5e6-96231b3b80d8
docs: Update TestingGuide to change recommended practice to using LNT to drive
the test-suite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152860 91177308-0d34-0410-b5e6-96231b3b80d8