msm:kgsl: set state as requested state when in NAP

Fix the state to requested state so that when both ISR and
timer fire at the same time, the state is set as SLEEP

CRs-Fixed: 340484
Signed-off-by: Suman Tatiraju <sumant@codeaurora.org>
(cherry picked from commit 9b6110bb38c7acf61e065ec206b62b1e1f089908)

Change-Id: Ie625aba09feddf495647be2844dc0a4014605141
Signed-off-by: Ram Kumar Chakravarthy Chebathini <rcheba@codeaurora.org>
msm: kgsl: increase valid timestamp range

The existing timestamp_cmp function returns a different
result depending on the order of the input parameters due to
having an asymetric valid window. When no rollover is
detected the window is 2^31 but when a rollover is detected
the window is 25000. This change makes the rollover window
symmetric at 2^31.

CRs-fixed: 347631
Signed-off-by: Jeff Boody <jboody@codeaurora.org>
(cherry picked from commit beb4a64b08ac49d4e01f4dd0c911c14ed6939f6d)

Conflicts:

	drivers/gpu/msm/kgsl.h

Change-Id: I22dcc773438df32f105dc8bd069051c48fde5018
Signed-off-by: Ram Kumar Chakravarthy Chebathini <rcheba@codeaurora.org>
msm: kgsl: flush outer cache for alloc_page() pages

The outer cache needs to be flushed for these pages
after they are allocated so that the GPU and CPU
have a consistent view of them.

CRs-Fixed: 346921
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
(cherry picked from commit 7018a21bf2b52f1296557d1f6ec9ed64e9169de7)

Change-Id: Id5c11ab8d856fc270330fd3258baa51b8efca192
Signed-off-by: Ram Kumar Chakravarthy Chebathini <rcheba@codeaurora.org>
msm: kgsl: Resolve conflicts in state changes

Only check requested state once, and fully transition to that
specific state.  This will resolve any conflicts arising from
changes to the requested_state as the state transition occurs.

Signed-off-by: Lucille Sylvester <lsylvest@codeaurora.org>
(cherry picked from commit e4a7c1a365ea32aebfe3995e13fc63ca8c2916c5)

Change-Id: I9d351d9d7e479389e473fc6e54d9d06d7ef200b9
Signed-off-by: Ram Kumar Chakravarthy Chebathini <rcheba@codeaurora.org>
msm: vidc: Remove vcd restriction of duplicate input buffer queue

VCD previously had a limitation of not allowing two consecutive
encode_frame calls with the same buffer. This was primarily due to the
handling of buffer_entry elements in the buffer pool.  This commit
removes this restriction by maintaining an internal buffer_entry element
that VCD keep track of.

Signed-off-by: Deva Ramasubramanian <dramasub@codeaurora.org>
(cherry picked from commit 794a9dd1b5c22492ef2ad76e49073c0bc0a2b8f9)

Change-Id: Iadbcae197f4627218440bdf300e43e04e888eaaf
Signed-off-by: Ramakrishna Prasad N <crpn@codeaurora.org>
Revert "hack the version string displayed in Android"

This reverts commit 59c5ba00f6cb9cb0f7c6ea6c373f3e31dc055ba9.
Revert "change the default perms of leds"

This reverts commit fdd1607c8860259924cf3becaf81b0cb0d9d3732.
Revert "msm: audio: qdsp5v2: Update PCM driver to use pmem memory (squashed commit)"

This reverts commit 0ee4e0fb5ef4dc06509952a6dc3fc45d4215192e.
lib/crc: add slice by 8 algorithm to crc32.c

Add support for slice by 8 to existing crc32 algorithm.  Also modify
gen_crc32table.c to only produce table entries that are actually used.
The parameters CRC_LE_BITS and CRC_BE_BITS determine the number of bits in
the input array that are processed during each step.  Generally the more
bits the faster the algorithm is but the more table data required.

Using an x86_64 Opteron machine running at 2100MHz the following table was
collected with a pre-warmed cache by computing the crc 1000 times on a
buffer of 4096 bytes.

BITS Size LE Cycles/byte BE Cycles/byte
----------------------------------------------
1 873 41.65 34.60
2 1097 25.43 29.61
4 1057 13.29 15.28
8 2913 7.13 8.19
32 9684 2.80 2.82
64 18178 1.53 1.53

BITS is the value of CRC_LE_BITS or CRC_BE_BITS. The old
default was 8 which actually selected the 32 bit algorithm. In
this version the value 8 is used to select the standard
8 bit algorithm and two new values: 32 and 64 are introduced
to select the slice by 4 and slice by 8 algorithms respectively.

Where Size is the size of crc32.o's text segment which includes
code and table data when both LE and BE versions are set to BITS.

The current version of crc32.c by default uses the slice by 4 algorithm
which requires about 2.8 cycles per byte.  The slice by 8 algorithm is
roughly 2X faster and enables packet processing at over 1GB/sec on a
typical 2-3GHz system.

Signed-off-by: Bob Pearson <rpearson@systemfabricworks.com>
Cc: Roland Dreier <roland@kernel.org>
Cc: Eric Dumazet <eric.dumazet@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
lib/crc: Update slice by 8 algorithm for crc32, and add to crc32c
power: fix lcd resume taking long time with an ongoing file copy

It just does some pending works on previous incomplete patch for this
commit from CAF and removes the suspend_backoff feature stolen from 3.0.
Fix a memory leak in bt
vision: audio: boost some HW audio volumes
cpufreq interactive governor: event tracing

Change-Id: Ic13614a3da2faa2d4bd215ca3eb7191614f0cf66
Signed-off-by: Todd Poynor <toddpoynor@google.com>
cpufreq: interactive: apply intermediate load to max speed not current

Evaluate spikes in load (below go_hispeed_load) against the maximum
speed supported by the device, not the current speed (which tends to
make it too difficult to raise speed to intermediate levels until
very busy).

Change-Id: Ib937006abf8bedb60891a739acd733e89b732ae0
Signed-off-by: Todd Poynor <toddpoynor@google.com>
cpufreq: interactive: set at least hispeed when above hispeed load

If load is above go_hispeed_load, always go to at least hispeed_freq,
even when reducing speed from a higher speed, not just when jumping
up from minimum speed.  Avoids running at a lower than intended
speed after a burst of even higher load.

Change-Id: I5b9d2a15ba25ce609b21bac7c724265cf6838dee
Signed-off-by: Todd Poynor <toddpoynor@google.com>
cpufreq: interactive: prepare for updating
cpufreq: interactive: don't drop speed if recently at higher load

Apply min_sample_time to the last time the current target speed
was originally requested or re-validated as appropriate for the
current load, not to the time since the current speed was
originally set.  Avoids periodic dips in speed during bursty
loads.

Change-Id: I250bda657985de60373f9897cc41f480664d51a1
Signed-off-by: Todd Poynor <toddpoynor@google.com>

Conflicts:

	drivers/cpufreq/cpufreq_interactive.c
leds: suppress some annoying compiler warnings
mm: HTC typo for low memory device?