Add missing define to build qcom libgralloc.

This is needed by hardware/qcom/display/libgralloc/ashmemalloc.cpp.

Change-Id: I7b35bcdaedf3874d17a0e6ce18931c11db1e133d
implement work around for tegra errata 657451

tegra 2 processors have a bug in the register read path of bit 20 of
the CP15 c13, 3 register (used for software thread local storage)

the kernel work-around for this bug is to mux the value from bit 20
into bit 0; since the TLS value used by Android is an aligned address,
bit 0 is known to be available.

Change-Id: If70afa52585d327f9dd5eca479c14ca92532ddd8a
Reviewed-on: http://git-master/r/773
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
TLS: Call kernel helper in additional situations

ARMv6 has HW TLS support, and thus we should be using it rather
than hacking the Linux Kernel to use the software mechanism.
Unfortunately, ARMv6 targets without Thumb2 do not support the
necessary TLS instructions in Thumb Mode. Converting the tls libc
routines to ARM Mode will require an additional branch to switch
modes. Therefore, let's simply use the Kernel's Helper Routine
which already operates in ARM Mode. This changed behavior only
applies if the HAVE_ARM_TLS_REGISTER option is defined.
Otherwise, the existing paradigm is used.

Change-Id: I282697b0ab97cb62affd018494076e6ffa4d392a
msm7627A: Enable 7627A specific memcpy routine

Cache line size for 7627A is 32 bytes. The existing memcpy routine
gives sub-optimal performance for this cache line size. The memcpy
routine has been optimized taking this into consideration. Currently
7627A is the only ARM-v7 target with cache line size of 32 bytes,
hence this optimized code has been featurized under
CORTEX_CACHE_LINE_32 in memcpy.S, memset.S, which can be enabled
by definingTARGET_CORTEX_CACHE_LINE_32 in BoardConfig.mk
This change also adds corresponding cflag definition in Android.mk.

Change-Id: Idea0d1b977f60e0a690ddee36b1d9c67d3c241ef
Add missing define to build qcom libgralloc.

This is needed by hardware/qcom/display/libgralloc/pmemalloc.cpp

Change-Id: Id0732b82ed6c1852def9688544ec92e04afeff00
Add missing define for libcopybit.

This is needed by hardware/qcom/display/libcopybit/copybit.cpp.

Change-Id: Ic50a75b93b39443b772dd4cab67a55f75ad2b5ad
fix ARMv7 optimized strlen() usage condition

Change-Id: Ia2ab059b092f80c02d95ca95d3062954c0ad1023
getopt(): fix missing carriage return on bad parameters

This affect all command line tools which show the usage on stdout
after an invalid parameter error (printed on stderr)

Change-Id: I8e2cb3fda241ab989dc42055f15082f8b3ba1397
Signed-off-by: Tanguy Pruvot <tanguy.pruvot@gmail.com>
bionic: Fix aliasing violations

This makes bionic compile with compilers enforcing
strict adherence to aliasing rules (e.g. gcc 4.6
with -Wstrict-aliasing=2 -Werror=strict-aliasing).

Conflicts:

	libc/netbsd/resolv/res_send.c

Change-Id: I640bafe9fef399f856c9e57cb0ab877e8656e522
Signed-off-by: Bernhard Rosenkraenzer <Bernhard.Rosenkranzer@linaro.org>
Signed-off-by: Evan McClain <aeroevan@gmail.com>
bionic: Add ; after anonymous union declaration

This improves compatibility with different compilers

Signed-off-by: Bernhard Rosenkraenzer <Bernhard.Rosenkranzer@linaro.org>
libm: Add a proper sincos() implementation

Add a proper sincos() implementation that unifies the common
calculations for sin and cos instead of running them twice.

This should cause a speedup even in code not using that
(fairly uncommon) function because gcc can optimize separate
sin() and cos() calls into sincos() calls.

Signed-off-by: Bernhard Rosenkraenzer <Bernhard.Rosenkranzer@linaro.org>

Change-Id: I644578ab443506c7404d2638d6d4917ff6c96f20
Avoid multiple dns lookups for the same query

If two or more rapid dns requests for the same server are done
from different threads it turns into separate dns reques, if
the response of the request isn't found in the cache.

This patch avoid multiple request for the same server by
letting subsequents request wait until the first request
has finished.

Change-Id: Ic72ea0e7d3964a4164eddf866feb4357ec4dfe54
Remove expired dns cache entries before removing oldest

A suggestion how to make a smarter delete function when the cache
is full. First look through the entire cache and remove all entries
which have expired. If none use the old solution and just remove
the last entry in the MRU list.

Change-Id: I5f997ab35290a55dc6e1ddf37d725759edf83d36
Remove the meaningless on Linux if_dl.h header.

This was misleading 'configure' into thinking we actually support AF_LINK,
but we're Linux, so we don't, and we never implemented the functions we
declared here either.

Reported to AOSP by Jun-ya Kato.

(cherry-pick of 5056f1fad1187cd67729bb04ba72397d78256f03.)

Change-Id: Ic67f674d2221497c8166994812bb5fc7f0831066
Actually set the header guard in "linux-syscalls.h".

Spotted while merging a MIPS change.

Change-Id: I36fb5a07d0bba0c117e9fe9733957bd37ca4b4c0
msm8960: Improve performance of memcpy, memmove, bcopy and memmove_words (codeaurora)
Taken from the following commits to codeaurora
 https://www.codeaurora.org/gitweb/quic/la/?p=platform/bionic.git;a=commit;h=a5333c8fbeb5190e3a8dc9f99af66eb50b01462c
 https://www.codeaurora.org/gitweb/quic/la/?p=platform/bionic.git;a=commit;h=6077a9577667fc9999312a2c6daf4d3c77bdf294

Uses following variables in BoardConfig.mk
   TARGET_USE_KRAIT_BIONIC_OPTIMIZATION := true
   TARGET_USE_KRAIT_PLD_SET := true
   TARGET_KRAIT_BIONIC_PLDOFFS := 10
   TARGET_KRAIT_BIONIC_PLDTHRESH := 10
   TARGET_KRAIT_BIONIC_BBTHRESH := 64
   TARGET_KRAIT_BIONIC_PLDSIZE := 64

Change-Id: Iee66f7698dc301507a012e27c91141f3f6925dcb
headers: Unbreak some ARM syscalls

Restore the outside-kernel exclusion for some syscalls that was
removed by change I959b64280e184655ef8c713aa79f9e23cb1f7df4,
since these syscalls are used elsewhere.

Change-Id: I5b5bf3d78edd137e820d25281a375966b6c009ec
timezone: data file should be 32 bit aligned

The zoneinfo.dat file is memory mapped and then read as an int array.
On some platforms this is causing alignment errors (SIGBUS) because
the records are not 32 bit aligned.

Change-Id: Ieea8ef07e49ef86d139c52ebfccf4159c0ebd887
Don't use -fstack-protector on ssp.c

Don't use -fstack-protector on ssp.c

libc's stack protector initialization routine (__guard_setup)
is in bionic/ssp.c. This code deliberately modifies the stack
canary.  This code should never be compiled with -fstack-protector-all
otherwise it will crash (mismatched canary value).

Force bionic/ssp.c to be compiled with -fno-stack-protector

Change-Id: Ib95a5736e4bafe1a460d6b4e522ca660b417d8d6
memcpy: Fix ARCH_ARM_USE_NON_NEON_MEMCPY

This was broken by the scorpion/krait optimization merges, fixit

Change-Id: I689d95d6db2061254729b4d9064203d464d9e0f6