I2C: xilinx-ps: Fix hold flag handling

Set the hold flag whenever there is more data to send and clear it when sending
the last message. Otherwise STOP-START condintions will be generated instead of
a RESTART condition when sending multiple messages at once.

This was a patch from Lars that wouldn't apply so I manually added the change.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Xilinx: ARM: Update xylonfb.c to support device tree

Xylonfb.c as of Feb 03.  Now supports devicetree and changing resolution
by changing video_clk freq with writing proper divisor to PS_CLK.
This method does not yield the exact required freq of video_clk
and may not work with all monitors.

Removed xylonfb.h from driver/video and moved to include/linux
Xilinx: ARM: updated zynq defconfig for xylon frame buffer

The driver is now using device tree such that it can be
in the kernel all the time.
Xilinx: ARM: adding xylon IP snippet dts file

This snippet can be pasted into the 702 file to get
a device tree working for a frame buffer using the
Xylon IP.
Xilinx: ARM: SWDT driver updated to read the board from the DTS.

The driver now checks whether or not the current board is an EP107.
If it is, set the frequency to 2.5MHz and the prescalar to 64,
otherwise, set the frequency to 133MHz and the prescalar to 4096.
Xilinx: ARM: SWDT driver updated to work with higher frequencies.

At higher frequencies:
- Depending on the timeout value, the timeout count calculation
was truncating some of the upper bits due to size overflow. The
order of the multiplication and divison has been changed to prevent
this.
- Sometimes, the WDZ bit would toggle to 1 but no reset would occur
despite the reset enable being set. To fix this, the reset length
was increased from 2 to 4 clock cycles.
Xilinx: ARM: MTD: Fixed 16-bit flash issues with mtd layer.

Modified the Linux MTD layer to fix issues with 16-bit
flash parts that are ONFI compliant.
Xilinx: ARM: NAND: Fixed 16-bit On-Die ECC flash support.

Fixed 16-bit On-Die ECC NAND flash support in the NAND controller
driver. Updated the SMC timing parameters to support Zynq silicon.
Added ONFI read paramter page command.
Xilinx: ARM: Device tree entries updated for timer

The TTC has 3 timers which can operate on 3 different frequencies. The device
trees are updated have 3 different frequencies for 3 timers. Similarly three
interrupt numbers are added for the 3 timers in the device tree. The timer.c
is modified to use these frequencies from the device tree. The way interrupts
are read from the device tree is changed.
Xilinx: ARM: Device tree entries updated for EmacPs

The SLCR divisor entries are updated in the device tree along with the PTP
clock. The EmacPs driver is updated to use the entries from device tree
instead of hardcoded entries.
Xilinx: ARM: BSP: updated timer driver for device tree irq missing

The last timer driver change caused the kernel to crash on old
device trees which was a bit unfriendly for now. This makes it
not crash the kernel with an old device tree.
Xilinx: DMA: Removed Compilation Error and Warnings.

Removed Compilation error: irq_of_parse_and_map() implicit
declaration.

Signed-off-by: SrikanthT <sthokal@xilinx.com>
Xilinx: DMA: Identifies associated DMA device for a channel

This patch will add the logic to know the DMA device a
channel belongs to. This will help the user to get the
channel from a particular device. A unique device-id is
generated from the device-tree which forms as a mask
for requesting a channel.

Signed-off-by: SrikanthT <sthokal@xilinx.com>
Xilinx: DMA: Support to Reset a channel of VDMA device.

This patch adds the logic to reset a channel of VDMA.

Signed-off-by: SrikanthT <sthokal@xilinx.com>
Xilinx: DMA: Fixed VDMA Park Pointer Register bugs.

This patch fixes the following bugs:
1) On S2MM channel, Park Pointer Register accesses a invalid
   location. This register is common to both channels.
2) Park Pointer Register write value had a wrong shift.
3) Logic to disable Circular mode.
Xilinx: ARM: EmacPs: Made BD ring optimizations to improve performance

The BD ring structures for Rx and Tx were not absolutely necessary. There were
APIs used to access these BD rings to update the BDs or starting a DMA. All of
these are removed and instead simple BD arrays are used with appropriate
indexing. This improves the performance.
Xilinx: DMA: Identifies associated DMA device for a channel

This patch will add the logic to know the DMA device a
channel belongs to. This will help the user to get the
channel from a particular device. A unique device-id is
generated from the device-tree which forms as a mask
for requesting a channel.

Signed-off-by: SrikanthT <sthokal@xilinx.com>
Xilinx: DMA: Support to Reset a channel of VDMA device.

This patch adds the logic to reset a channel of VDMA.

Signed-off-by: SrikanthT <sthokal@xilinx.com>
Xilinx: DMA: Fixed VDMA Park Pointer Register bugs.

This patch fixes the following bugs:
1) On S2MM channel, Park Pointer Register accesses a invalid
   location. This register is common to both channels.
2) Park Pointer Register write value had a wrong shift.
3) Logic to disable Circular mode.
Xilinx: ARM: Device Tree update for Timer frequencies

TTC has 3 timers which can be sources from different frequencies. Entries added
in timer node of device trees for different frequencies for the 3 timers.
Chnages made in the timer.c to use these frequencies from the device tree.