ARM: SAMSUNG: add clock_tree debugfs file in clock

Add a clock/clock_tree debugfs file that shows the entire clock
hierarchy including usage counts and rates.

Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
[kgene.kim@samsung.com: silence checkpatch complaining]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
ARM: SAMSUNG: call clk_get_rate for debugfs rate files

c->rate is rarely set, call clk_get_rate on the clock to print
the value in /d/clock/.../rate.

Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
ARM: EXYNOS: Add dp clock support for EXYNOS5

Add dp clock instance for EXYNOS5 dp controller.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
ARM: socfpga: Enable SMP for socfpga

Enable SMP for the SOCFPGA platform.

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge branch 'socfpga/smp' into next/smp

SMP support for socfpga platform, from Dinh Nguyen <dinguyen@altera.com>

v3:
-cleaned up socfpga_defconfig.
-Needs # CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA is not set
-Removed CONFIG_VMSPLIT_2G, as system has 2GB of RAM
-Removed CONFIG_ARCH_TIMER
-Remove pen_release variable
-Added Reviewed-by: Rob Herring <rob.herring@calxeda.com>

v2:
-Remove pen_release code
-Remove code that was already done by v7_setup
-Add bindings document for reset and system manager
-Move socfpga_sysmgr_init from platsmp.c to socfpga.c,
 because we will need to use the reset and system manager
 for more than SMP.
-Move core.h to mach-socfpga from mach-socfpga/include/mach

* socfpga/smp:
  ARM: socfpga: Enable SMP for socfpga

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
ARM: socfpga: fix build break for allyesconfig

Building a multiplatform kernel with combined armv7 and armv6
kernel does not work with the socfpga smp code, which contains
v7-only instructions. Since this code never runs on armv6,
we can annotate the assmebly with .arch   armv7-a, as suggested
by Russell King.

[arnd: reword commit message]

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
socfpga: map uart into virtual address space so that early_printk() works

Early printk code needs UART to be mapped early during
boot. early_printk() is left there during the start-up; it is useful
as our emulators are fairly slow.

Signed-off-by: Pavel Machek <pavel@denx.de>
Acked-by: Dinh Nguyen <dinguyen@altera.com>
[olof: removed redundant newlines]
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge branch 'vexpress-clk-soc' of git://git.linaro.org/people/pawelmoll/linux into next/soc2

From Pawel Moll <pawel.moll@arm.com>:

This reworks the generic support for versatile express, in part
as preparation for the arm64 version of it that can now share
more of the code.

The series is based on top of the clk tree from Mike Turquette.

* 'vexpress-clk-soc' of git://git.linaro.org/people/pawelmoll/linux:
  ARM: vexpress: Remove motherboard dependencies in the DTS files
  ARM: vexpress: Start using new Versatile Express infrastructure
  ARM: vexpress: Add config bus components and clocks to DTs
  mfd: Versatile Express system registers driver
  mfd: Versatile Express config infrastructure

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
ARM: socfpga: mark secondary_trampoline as cpuinit

The socfpga_boot_secondary is correctly marked as __cpuinit but references
secondary_trampoline, which was introduced into the init section, causing
this build warning:

WARNING: vmlinux.o(.cpuinit.text+0xf90): Section mismatch in reference from the function socfpga_boot_secondary() to the variable .init.text:secondary_trampoline
The function __cpuinit socfpga_boot_secondary() references
a variable __init secondary_trampoline.
If secondary_trampoline is only used by socfpga_boot_secondary then
annotate secondary_trampoline with a matching annotation.

The solution is to mark secondary_trampoline as cpuinit as well.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
ARM: shmobile: sh7372: remove fsidivx clock

fsidivx clock is no longer needed.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
ARM: shmobile: sh7372: sh7372_fsiXck_clk become non-global

FSI's external clock is controled by FSI driver.
Global sh7372_fsiXck_clk is no-longer needed now.

But it needs to set external clock rate by platform,
so, this patch supports clk_get() interface.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
MIPS: tlbex: Fix section mismatches

The new functions introduced in commit 02a5417751 (MIPS: tlbex: Deal with
re-definition of label) should be marked __cpuinit, to eliminate a
warning that can pop up when CONFIG_EXPORT_UASM is disabled:

      LD      arch/mips/mm/built-in.o
    WARNING: arch/mips/mm/built-in.o(.text+0x2a4c): Section mismatch in reference from the function uasm_bgezl_hazard() to the function .cpuinit.text:uasm_il_bgezl()
    The function uasm_bgezl_hazard() references
    the function __cpuinit uasm_il_bgezl().
    This is often because uasm_bgezl_hazard lacks a __cpuinit
    annotation or the annotation of uasm_il_bgezl is wrong.

    WARNING: arch/mips/mm/built-in.o(.text+0x2a68): Section mismatch in reference from the function uasm_bgezl_label() to the function .cpuinit.text:uasm_build_label()
    The function uasm_bgezl_label() references
    the function __cpuinit uasm_build_label().
    This is often because uasm_bgezl_label lacks a __cpuinit
    annotation or the annotation of uasm_build_label is wrong.

(This warning might not occur if the function was inlined.)

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4517
Signed-off-by: John Crispin <blogic@openwrt.org>
mips/octeon: 16-Bit NOR flash was not being detected during boot

The cavium code assumed that all NOR on the boot bus was
an 8-bit NOR part and hardcoded the bankwidth. The simple
solution was to add the code that queries the configuration
register for the width of the bus that has been hardware strapped
to the Cavium. This allows both 8-bit and 16-bit parts to be
discovered during boot.

Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: Charles Hardin <ckhardin@exablox.com>
Patchwork: http://patchwork.linux-mips.org/patch/4323
Signed-off-by: John Crispin <blogic@openwrt.org>
MIPS: Move processing of coherency kernel parameters earlier

Commit 97ce2c88f9ad42e3c60a9beb9fca87abf3639faa (jump-label: initialize
jump-label subsystem much earlier) caused MIPS to break, so this was
resolved with commit 6650df3c380e0db558dbfec63ed860402c6afb2a (MIPS:
Move cache setup to setup_arch().).  Unfortunately, after this commit,
the coherency kernel parameters, cca and coherentio, are no longer
processed before their values are used.

This patch fixes this problem by marking them as early_param, which
results in them being processed before they are needed.

Signed-off-by: Shane McDonald <mcdonald.shane@gmail.com>
Acked-by: David Daney <david.daney@cavium.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/3961
Signed-off-by: John Crispin <blogic@openwrt.org>
MIPS: BCM47XX: ignore last memory page

Ignoring the last page when ddr size is 128M. Cached accesses to last
page is causing the processor to prefetch using address above 128M
stepping out of the ddr address space.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4365
Signed-off-by: John Crispin <blogic@openwrt.org>
MIPS: BCM47XX: improve memory size detection

The memory size is detected by finding a place where it repeats in
memory. Currently we are just checking when the function prom_init is
seen again, but it is better to check for a bigger part of the memory
to decrease the chance of wrong results.

This should fix a problem we saw in OpenWrt, where the detected
available memory decreed on some devices when doing a soft reboot.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4362
Signed-off-by: John Crispin <blogic@openwrt.org>
MIPS: BCM47xx: read out full board data

Read out the full board data independently of the sprom version. Now we
also get the full boardflags and so on if sromrev is not set and our
code would assume a rev 1 device. When a nvram option is not set
because it is not there this is no problem.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4363
Signed-off-by: John Crispin <blogic@openwrt.org>
MIPS: BCM47XX: read sprom without prefix if no ieee80211 core

If there is no ieee80211 core on the devices like on the BCM4706 read
out the sprom and the other data without using a prefix.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4361
Signed-off-by: John Crispin <blogic@openwrt.org>
MIPS: BCM47xx: sprom: read values without prefix as fallback

There are bcma based devices like the Linksys E2000 out there, which do
have one ieee80211 core, but no PCIe core and they are using no
prefixes for the sprom. In addition some values like boardtype are
stored without a prefix for the main SoC chip also when they have an
additional PCIe wifi chip with an own boardtype var on some devices.

The Ethernet addresses are now also read out correctly without a prefix
so calling bcm47xx_fill_sprom_ethernet is not needed any more.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4364
Signed-off-by: John Crispin <blogic@openwrt.org>
MIPS: BCM63XX: add and use a clock for PCIe

Add a PCIe clock and use that instead of directly touching the clock
control register. While at it, fail if there is no such clock.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Acked-by: Florian Fainelli <florian@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4452
Signed-off-by: John Crispin <blogic@openwrt.org>