ariesve: Use PMEM sizes as defined in CAF's msm7x30 board source

Frees up some memory for userspace, hopefully without causing
any issues. Revisit if that happens.
pm_qos: Remove system bus constraints and users

Now that all users of the system bus pm_qos constraints
are gone we can safely remove all the related code.

Change-Id: I2a049546449c5b51c4eb20685528f739e1e9ad8e
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

Conflicts:

	arch/arm/mach-msm/clock.h
msm: clock: Remove unused clk_get_max_axi_khz()

This should have been removed when the pm_qos code was removed
from clock.c. Remove it since it has no callers.

Change-Id: I971e7fcabf429ee8ffa5447700de889c8d9bbd76
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

Conflicts:

	arch/arm/mach-msm/board-msm7x27.c
	arch/arm/mach-msm/clock-dummy.c
msm: acpuclock-7x30: Dynamically populate cpufreq table

Populate the cpufreq table at runtime instead of allocating the
cpufreq table statically and fixing it up when the PLL2 frequency
changes. This allows us to modify the acpufreq table without
worrying about the cpufreq table.

Change-Id: I90b5187c4ae7080cdaa013dd1b773ace527016dc
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
msm: acpuclock-7x30: Support PLL2 frequency scaling

The step between 768MHz and 1400MHz is too large. Introduce some
more steps in between the two by scaling the frequency of PLL2.
This requires us to switch to 768MHz (PLL1) for a short time
while we reprogram PLL2 for a different frequency.

Change-Id: Ia9f836e17b1df54ccdbced57dfc5c3dbac3403f5
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
msm: acpuclock-7x30: Don't add slow freqs to cpufreq table

A recent patch populated the cpufreq table dynamically. This lead
to a handful of undesirable slow frequencies being added to the
cpufreq frequency table. Instead of adding those frequencies,
merge the cpufreq table into the acpuclock frequency table and
extract the cpufreq table out at runtime.

Change-Id: I35e348412ec16fd5ae851cd6dac048595404f8df
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
msm: acpuclock: Add memory barriers for later move to _relaxed accessors

The clock drivers will soon be moving use of readl_relaxed() and
writel_relaxed() in place of readl() and writel() which contained
barriers.  Add the prerequisite barriers so this conversion can
happen.

(cherry picked from commit 89a43299552a22ceab9dbc380e3e96c9e0b05d11)

Change-Id: Ia883b8643a731a1bb398ea9e20a4e2a52db0361f
Signed-off-by: Raj Kushwaha <rajk@codeaurora.org>
msm: clock-7x30: Fix missing and incorrect CSI0 clock rate test vectors

Change-Id: I92208968f71b1b04ed1528d67fe3ddff30c7c9b3
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: clock-local: Select low-power sources when clocks are disabled

Power savings can be achieved by selecting un-clocked or slowly-
clocked inputs of the MUXs which feed clock generation hardware,
even when the branch and root clocks are already disabled.

When disabling a clock, also switch its MUX to a low-power
source. Similarly, for dual-banked clocks, select a low-power
source for the inactive bank when the clock is running.

CRs-Fixed: 274420
Change-Id: I000f94d7103558d2650482d2bf4fd3903deb2362
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: clock-7x30: Correct MND divider settings for spi_clk

Change-Id: Ic32707685307ffcabe30c2b3c0a8f0ca463be781
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: clock-7x30: Remove 0Hz row from MFC clock table

Grounding the MFC clock source selection MUX when the clock
is disabled causes stability issue.  Select the LPXO input
instead.

Change-Id: I28b1fd9c439394d1a843fe7ede27d2d1a8c563bc
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: clock-7x30: Select LPXO source when disabling clocks with pwr rails

For clocks that have modem-controlled power rails associated with them,
a clocked input must remain selected even when the clock is disabled.

The power rail APIs are meant to be called while the clock is disabled.
Because the modem may assume that a valid clock source is selected when
it performs the power rail control operations, the clock driver should
not select a grounded input. Instead, when disabling the clock, LPXO
will be selected for good power savings.

CRs-Fixed: 280184
Change-Id: If09c7e85fb65d6626e10f5d86592db2876e53755
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: clock-local: Add memory barriers for later move to _relaxed accessors

The clock drivers will soon be moving use of readl_relaxed() and
writel_relaxed() in place of readl() and writel() which contained
barriers.  Add the prerequisite barriers so this conversion can
happen.

Change-Id: Idaf5781d3ca23792b775f10647ab6fc884e2fac9
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: clock-7x30: Add 24.576MHz rate from LPXO for SPI_CLK

Change-Id: I9af2b59fb5d971f17100b4c4cb5ee5439eed60ac
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: clock-7x30: Add missing sdac_m_clk to msm_clocks_7x30 table

Change-Id: I19ec3ef58a7a01edf2685ecdbbf7a45cb8902b65
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: clock-7x30: Remove unsupported ebi1_usb_clk

Change-Id: Ie75f70de33da45b77c755d5a88f4c2c2976b9ff4
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: pm: make temporary mapping used in power collapse large enough

When the system comes up out of power collapse, it relies
on having a temporary mapping where the physical and virtual
addresses are identical, so that the MMU can be turned
on safely.

This mapping is done using 1M pages, but the memory management
code uses the abstraction of 2M pmd segments (so there
are 2 1M pages per pmd).

The code had only mapped in the first of the two 1M pages, and
so if the code for exiting power collapse happened to be in the
second of the two 1M pages, the system would hang
(the PC would be unmapped when the MMU was turned on).

For paranoia's sake, the next 1M page is now also mapped,
in case msm_pm_collapse_exit() is at the very end of the
second 1M page (the actual PC where the MMU is turned on
is 100 bytes or so into the function, but the calculation
of what to map in is done on the entry point).

Change-Id: I17b2014417ad1d3302934ddbbadb0f93c2885575
Signed-off-by: Larry Bassel <lbassel@codeaurora.org>
msm: pm: replace readl/writel with __raw_readl/__raw_writel

Change-Id: I9037af486b316e74b054afce169da25f659dacac
Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>
msm: pm2: Add 'dsb' calls after every __raw_writel functions.

Add 'dsb' macros after every  __raw_writel function. These 'dsb's
make sure that all the writes must be flushed to memory before next
instruction got executed after the dsb.

Change-Id: Ia520d4cd1278ce6f34d6a971a95a4df9dd217721
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
msm: pm: remove obsolete CLOCK_BASED_SLEEP_LIMIT code

Change-Id: I5867ed1dd86e9f389f63c53d37e50a0779e6e18d
Signed-off-by: Ai Li <aili@codeaurora.org>

Conflicts:

	arch/arm/mach-msm/pm2.c