Documentation: common clk API

Provide documentation for the common clk structures and APIs.  This code
can be found in drivers/clk/ and include/linux/clk*.h.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Jeremy Kerr <jeremy.kerr@canonical.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Arnd Bergman <arnd.bergmann@linaro.org>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Richard Zhao <richard.zhao@linaro.org>
Cc: Saravana Kannan <skannan@codeaurora.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Linus Walleij <linus.walleij@stericsson.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Amit Kucheria <amit.kucheria@linaro.org>
Cc: Deepak Saxena <dsaxena@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Andrew Lunn <andrew@lunn.ch>
clk: introduce the common clock framework

The common clock framework defines a common struct clk useful across
most platforms as well as an implementation of the clk api that drivers
can use safely for managing clocks.

The net result is consolidation of many different struct clk definitions
and platform-specific clock framework implementations.

This patch introduces the common struct clk, struct clk_ops and an
implementation of the well-known clock api in include/clk/clk.h.
Platforms may define their own hardware-specific clock structure and
their own clock operation callbacks, so long as it wraps an instance of
struct clk_hw.

See Documentation/clk.txt for more details.

This patch is based on the work of Jeremy Kerr, which in turn was based
on the work of Ben Herrenschmidt.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Jeremy Kerr <jeremy.kerr@canonical.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Arnd Bergman <arnd.bergmann@linaro.org>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Richard Zhao <richard.zhao@linaro.org>
Cc: Saravana Kannan <skannan@codeaurora.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Linus Walleij <linus.walleij@stericsson.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Amit Kucheria <amit.kucheria@linaro.org>
Cc: Deepak Saxena <dsaxena@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Andrew Lunn <andrew@lunn.ch>
clk: basic clock hardware types

Many platforms support simple gateable clocks, fixed-rate clocks,
adjustable divider clocks and multi-parent multiplexer clocks.

This patch introduces basic clock types for the above-mentioned hardware
which share some common characteristics.

Based on original work by Jeremy Kerr and contribution by Jamie Iles.
Dividers and multiplexor clocks originally contributed by Richard Zhao &
Sascha Hauer.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Jeremy Kerr <jeremy.kerr@canonical.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Arnd Bergman <arnd.bergmann@linaro.org>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Jamie Iles <jamie@jamieiles.com>
Cc: Richard Zhao <richard.zhao@linaro.org>
Cc: Saravana Kannan <skannan@codeaurora.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Linus Walleij <linus.walleij@stericsson.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Amit Kucheria <amit.kucheria@linaro.org>
Cc: Deepak Saxena <dsaxena@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Andrew Lunn <andrew@lunn.ch>
OMAP: Kconfig: select COMMON_CLK

This only works for OMAP44xx with the rest of the common clk patches.
Enabling it currently breaks OMAP2 & OMAP3 compilation and obviously
multi-image boot.

Not-yet-signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
omap: cm-regbits-44xx.h: add bitfield width values

The new common clk framework includes basic definitions for mux and
divider clocks.  These definitions depend on shift and width values
instead of the pre-computed masks that the OMAP clk framework has
traditionally used when accessing the register to control the mux or
divisor.

To ease this transition the masks are left intact and the width field is
simply added alongside the shift and mask data.

Signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
omap: clk: convert to common struct clk

This is a pile of code to convert the OMAP4 clk framework over to the
common struct clk definition and it's supporting functions.

Note that this only works for OMAP4, and I have only tested it on Panda.
This patch is only for testing purposes and to kick off discussion of
how we want to reshape the OMAP clk framework for the new way of doing
things.

Highlight of changes in this patch:
 * convert omap's old struct clk to the new struct clk_hw_omap
 * convert all omap clock functions to use struct clk_hw_omap
 * remove duplicate clock lists and duplicate string-lookup helper
   function
 * delete plat-omap/clock.c and include/plat/clock.h
 * improve initialization of clkdev aliases (not final)
 * remove far too much duplicated clock framework infrastructure to list
   here
 * miscellaneous fixes to clock code found along the way

Not-yet-signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
omap: convert 44xx data to common struct clk

This patch is output from updated omap hw data autogeneration scripts.
Those scripts were modified to support the common struct clk
infrastructure.  It has been boot-tested on an OMAP4430 Panda.

Highlights:
 * convert some omap clock to use the basic clk types
  * root clocks use struct clk_fixed
  * m2 dividers use struct clk_divider
  * CM1/CM2 mux clocks use struct clk_mux
 * the remaining clock use struct clk_hw_omap
  * basically the old struct clk that omap's clock framework defined
 * replace struct omap_clk useage with clkdev's struct clk_lookup
 * removed omap's duplicate list of omap-specific clocks

Shortcomings:
 * breaks omap1/2/3
 * autogen scripts don't yet use a hash table to prevent duplicate struct
   clk_ops definitions which could be re-used
 * still using dummy_clk defined in omap clock code
  * this should be provided by the clk core

Not-yet-signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
omap: hwmod: convert to use common struct clk

hwmod functions implicitly deal with hardware clks and must be updated
to support the new common struct clk and accompanying functions.

Changes in this patch include adding clk_prepare/clk_unprepare to hwmod
as well as using struct clk_hw_omap instead of the old OMAP-specific
struct clk.  Direct references to struct clk (often for debugging
purposes) have been converted to use the helper functions in
include/linux/clk-provider.h

Not-yet-signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
omap_device: do not use omap_clk_get_by_name

Signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
omap2+: pm: use clk_get_rate

Accessing members of struct clk directly is bad.  Use clk_get_rate
instead of clk->rate.

Signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
omap: panda: use clk_prepare in ehci init

Signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
omap: dss: use clk_prepare in dss reset

Signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
HACK: comment WARN_ON in _clkdm_clk_hwmod_disable

This gets noisy after converting OMAP4 over the common clock framework.
I haven't debugged this yet, so this patch is obviously a temporary
hack.

Not-ever-signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
MFD: palmas PMIC device support

Palmas is a PMIC from Texas Instruments and this is the MFD part of the
driver for this chip. The PMIC has SMPS and LDO regulators, a general
purpose ADC, GPIO, USB OTG mode detection, watchdog and RTC features.

Contains WIP code to start to support sharing the rtc-twl as its
the same IP block

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
MFD: Palmas GPADC Support

The Palmas has a 15 channel ADC which has two asynchronous reading modes
and one software controlled mode. One of the asynchronous modes can
automatically compare voltages with a threshold and raise an interrupt
when the voltage crosses the threshold. The resolution of the ADC is
12 bits.

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
GPIO: Add Palmas GPIO support

Palmas has a maximum of 8 GPIO available but depending on the package and
OTP programming of the chip they may not all be exposed to pins on the
chip

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
REGULATOR: regulator driver for Palmas series chips

Palmas has both Switched Mode (SMPS) and Linear (LDO) regulators in it.
This regulator driver allows software control of these regulators.

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
MFD: Palmas RESOURCE IP block driver

The Resource IP block controls the NSLEEP, ENABLE1, ENABLE2, pin actions.
As well as controlling the clk32kg* clocks and regen* pins.

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
RTC: palmas RTC support

Rough and ready patch to support palmas RTC using twl driver. This
still needs work to clean up and split out the diffs correctly.

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
LED: Add support for Palmas LEDs

The Palmas familly of chips has LED support. This is not always muxed
to output pins so depending on the setting of the mux this driver
will create the appropriate LED class devices.

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>