Remove expired dns cache entries before removing oldest

A suggestion how to make a smarter delete function when the cache
is full. First look through the entire cache and remove all entries
which have expired. If none use the old solution and just remove
the last entry in the MRU list.

Change-Id: I5f997ab35290a55dc6e1ddf37d725759edf83d36
[MIPS] Fix the warning originating from the kernel header signal.h.
This is a clean header generated from the corresponding change in
external/kernel-headers repository. (CL 35760)
Merge "[MIPS] Fix the warning originating from the kernel header signal.h. This is a clean header generated from the corresponding change in external/kernel-headers repository. (CL 35760)"
Merge from AOSP

Change-Id: If2e8e4305d10df738cc4ebcf226077f273a48cbf
am b091dd9b: libc: continue to use Android\'s custom linker script

* commit 'b091dd9bf27a9132c4ac9da55f2f4a87ffe3b59f':
  libc: continue to use Android's custom linker script
am efcf8893: Merge "Update f_accessory.h kernel header" into jb-dev

* commit 'efcf8893a97df2eb2ecb7aab305998878771d2f2':
  Update f_accessory.h kernel header
Add the posix_memalign(3) function to bionic

The posix_memalign(3) function is very similar to the traditional
memalign(3) function, but with better error reporting and a guarantee
that the memory it allocates can be freed.  In bionic, memalign(3)
allocated memory can be freed, so posix_memalign(3) is just a wrapper
around memalign(3).

Change-Id: I62ee908aa5ba6b887d8446a00d8298d080a6a299
am 6baffed2: Add the posix_memalign(3) function to bionic

* commit '6baffed252d0efbce5a79f356c2f156f4f818996':
  Add the posix_memalign(3) function to bionic
Update s_fabsl.c to upstream head.

Bug: http://code.google.com/p/android/issues/detail?id=29539
Change-Id: I843dcfcbfe49e8e9f43c49aae6ade1edb57a3053
Merge "Update s_fabsl.c to upstream head."
am 10579fc4: Merge "Update s_fabsl.c to upstream head."

* commit '10579fc43d3ade285eed7318aee062a999f2784d':
  Update s_fabsl.c to upstream head.
MIPS support to libm, libdl and libthread_db

Change-Id: I9106721af7fe0cd45df82976250db0d300a20117
Signed-off-by: Raghu Gandham <raghu@mips.com>
Merge "MIPS support to libm, libdl and libthread_db"
am f7db5ecc: Merge "MIPS support to libm, libdl and libthread_db"

* commit 'f7db5ecc4d662da8368f31d57401ca1a39690e40':
  MIPS support to libm, libdl and libthread_db
Adjust memcpy for ARM Cortex A9 cache line size

ARM Cortex A8 use 64 bytes and ARM Cortex A9 use 32 bytes cache line
size.

The following patch:
  Adds code to adjust memcpy cache line size to match A9 cache line
  size.
  Adds a flag to select between 32 bytes and 64 bytes cache line
  size.

  Copyright (C) ST-Ericsson SA 2010
    Modified neon implementation to fit Cortex A9 cache line size
    Author: Henrik Smiding henrik.smiding@stericsson.com for
            ST-Ericsson.

Change-Id: I8a55946bfb074e6ec0a14805ed65f73fcd0984a3
Signed-off-by: Christian Bejram <christian.bejram@stericsson.com>
Merge "Adjust memcpy for ARM Cortex A9 cache line size"
Merge "Remove expired dns cache entries before removing oldest"
bionic: fix integer overflows in chk_malloc(), leak_malloc(), and leak_memalign()

The allocation size in chk_malloc(), leak_malloc(), and leak_memalign()
functions may be rounded up to a small value, leading to buffer overflows.
The code only runs in debugging mode.

This patch complements commit 6f04a0f4 (CVE-2009-0607).

Change-Id: Id899bcd2bcd2ea2205e5753c433390710032dc83
Signed-off-by: Xi Wang <xi.wang@gmail.com>
Merge "bionic: fix integer overflows in chk_malloc(), leak_malloc(), and leak_memalign()"
am 8657eafc: Merge "Adjust memcpy for ARM Cortex A9 cache line size"

* commit '8657eafc3552f36c176667c1591beab255308da6':
  Adjust memcpy for ARM Cortex A9 cache line size