Check SSSE3 instead of SSE4.1

- All shuffle insns required, especially PSHUB, are added in SSSE3.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166086 91177308-0d34-0410-b5e6-96231b3b80d8
Remove LLVM_DELETED_FUNCTION from destructors that override non-deleted base class destructors. This isn't legal by the C++11 standard and clang now checks for it. Curiously gcc didn't catch this, possibly because of the template usage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166089 91177308-0d34-0410-b5e6-96231b3b80d8
Fix a really annoying "bug" introduced in r165941. The change from that
revision makes no sense. We cannot use the address space of the *post
indexed* type to conclude anything about a *pre indexed* pointer type's
size. More importantly, this index can never be over a pointer. We are
indexing over arrays and vectors here.

Of course, I have no test case here. Neither did the original patch. =/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166091 91177308-0d34-0410-b5e6-96231b3b80d8
Marked this variable as 'used' so that LTO doesn't get rid of it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166092 91177308-0d34-0410-b5e6-96231b3b80d8
This just in, it is a *bad idea* to use 'udiv' on an offset of
a pointer. A very bad idea. Let's not do that. Fixes PR14105.

Note that this wasn't *that* glaring of an oversight. Originally, these
routines were only called on offsets within an alloca, which are
intrinsically positive. But over the evolution of the pass, they ended
up being called for arbitrary offsets, and things went downhill...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166095 91177308-0d34-0410-b5e6-96231b3b80d8
[asan] better debug diagnostics in asan compiler module

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166102 91177308-0d34-0410-b5e6-96231b3b80d8
Support: Don't remove special files on signals.
 - Similar to Path::eraseFromDisk(), we don't want LLVM to remove things like
   /dev/null, even if it has the permission.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166105 91177308-0d34-0410-b5e6-96231b3b80d8
docs: Add link to integrated assembler HowTo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166106 91177308-0d34-0410-b5e6-96231b3b80d8
misched: Better handling of invalid latencies in the machine model

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166107 91177308-0d34-0410-b5e6-96231b3b80d8
Fix fallout from RegInfo => FrameLowering refactoring on MSP430.
Patch by Job Noorman!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166108 91177308-0d34-0410-b5e6-96231b3b80d8
Check for empty YMM use-def lists in X86VZeroUpper.

The previous MRI.isPhysRegUsed(YMM0) would also return true when the
function contains a call to a function that may clobber YMM0. That's
most of them.

Checking the use-def chains allows us to skip functions that don't
explicitly mention YMM registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166110 91177308-0d34-0410-b5e6-96231b3b80d8
Add a loop vectorizer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166112 91177308-0d34-0410-b5e6-96231b3b80d8
Update the release notes about the new loop vectorizer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166113 91177308-0d34-0410-b5e6-96231b3b80d8
Update the release notes about the new TargetTransformInfo API changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166115 91177308-0d34-0410-b5e6-96231b3b80d8
Update the release notes about the store-merge dag optimization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166116 91177308-0d34-0410-b5e6-96231b3b80d8
Merge MRI::isPhysRegOrOverlapUsed() into isPhysRegUsed().

All callers of these functions really want the isPhysRegOrOverlapUsed()
functionality which also checks aliases. For historical reasons, targets
without register aliases were calling isPhysRegUsed() instead.

Change isPhysRegUsed() to also check aliases, and switch all
isPhysRegOrOverlapUsed() callers to isPhysRegUsed().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166117 91177308-0d34-0410-b5e6-96231b3b80d8
Add a really faster pre-RA scheduler (-pre-RA-sched=linearize). It doesn't use
any scheduling heuristics nor does it build up any scheduling data structure
that other heuristics use. It essentially linearize by doing a DFA walk but
it does handle glues correctly.

IMPORTANT: it probably can't handle all the physical register dependencies so
it's not suitable for x86. It also doesn't deal with dbg_value nodes right now
so it's definitely is still WIP.

rdar://12474515


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166122 91177308-0d34-0410-b5e6-96231b3b80d8
Update the release notes about how to enable the loop vectorizer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166123 91177308-0d34-0410-b5e6-96231b3b80d8
Switch MRI::UsedPhysRegs to a register unit bit vector.

This is a more compact, less redundant representation, and it avoids
scanning long lists of aliases for ARM D-registers, for example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166124 91177308-0d34-0410-b5e6-96231b3b80d8
Teach DAG combine to fold (extract_subvec (concat v1, ..) i) to v_i

- If the extracted vector has the same type of all vectored being concatenated
  together, it should be simplified directly into v_i, where i is the index of
  the element being extracted.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166125 91177308-0d34-0410-b5e6-96231b3b80d8