ARM: tegra: configs: Remove CONFIG_REGULATOR_GPIO_SWITCH

Removing config variable CONFIG_REGULATOR_GPIO_SWITCH as the
same functionality can be achieve with fixed regulator.

Change-Id: I803105f2a247da70721f29562881448bb00d3a44
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94197
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
ARM: tegra: p852: fix kernel boot

CSUS clock can't be driven from any clk other than clk_m. So
updating its parent to clk_m.
Removing pll_m's entry as it's already enabled and running at
666 MHz which is our requirement.
Removing tegra_init_suspend() as it's not needed on p852.

Bug 938667.
Bug 949584.

Change-Id: Id62401de11d213d4e0b87b52fe30e2b37372bbea
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/94237
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
tegra_audio: add default implementation for tegra_is_voice_call_active()

- mods kernel do not enable audio related configs in kernel
- tegra_is_voice_call_active() is defined only when audio
related configs are enabled
- this commit adds a default implementation for tegra_is_voice_call_active()
which can be called from generic pm code in mach-tegra
- it also makes the default implementation inline

Bug 924817

Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/92312
(cherry picked from commit 1b7507db6f2266d5cac10fcd4b3e7b06f6d2f3bd)

Change-Id: I286237b838c39cf5c7784c014459bdcaf50c31ef
Reviewed-on: http://git-master/r/94394
Tested-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
arm: tegra: turn off pll-a/p in LP1

- current code does not turn off pll-a/p in LP1
irrespective of voice call status
- add a new flag to indicate voice call on-going
- use PMC_SCRATCH37 to hold this flag
- if it is set, do not turn-off pll-a/p during LP1
- save-restore PMC_SCRATCH37 if it was used to hold the
voice call on-going flag
- fix few misc formatting issues in tegra3_cpu_clk32k

Bug 924817

Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/85768
(cherry picked from commit 7853981c987ae329620bb54d869016cb74a6c054)

Change-Id: Id5348d2eb44a4bacaf00f6d17edceedaef819e29
Reviewed-on: http://git-master/r/94395
Tested-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
dmaengine: add new enum dma_transfer_direction

This new enum removes usage of dma_data_direction for dma direction. The new
enum cleans tells the DMA direction and mode
This further paves way for merging the dmaengine _prep operations and also for
interleaved dma

Suggested-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
Cherry-picked from mainline
	49920bc66984a512f4bcc7735a61642cd0e4d6f2

Change-Id: Ia554f0635e46d98aac4899d369533b8b4f7dd294
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94462
Reviewed-by: Automatic_Commit_Validation_User
dmaengine/dma_slave: introduce inline wrappers

Add inline wrappers for device_prep_slave_sg() and device_prep_dma_cyclic()
interfaces to hide new parameter from current users of affected interfaces.
Convert current users to use new wrappers instead of direct calls.
Suggested by Russell King [https://lkml.org/lkml/2012/2/3/269].

Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>

cherry-picked from mainline commit
	16052827d98fbc13c31ebad560af4bd53e2b4dd5

Change-Id: I929a49556539621a0546829e88b3caa498c94be2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94463
dmaengine: add context parameter to prep_slave_sg and prep_dma_cyclic

Add context parameter to device_prep_slave_sg() and device_prep_dma_cyclic()
interfaces to allow passing client/target specific information associated
with the data transfer.
Modify all affected DMA engine drivers.

Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>

Cherry-picked from mainline
	185ecb5f4fd43911c35956d4cc7d94a1da30417f

Change-Id: Ief79d20f6e9d367ee2b530d08df72864fb16895a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94464
Reviewed-by: Automatic_Commit_Validation_User
lib: devres: add convenience function to remap a resource

Almost every platform_driver does the three steps get_resource,
request_mem_region, ioremap. This does not only lead to a lot of code
duplication, but also a huge number of similar error strings and
inconsistent error codes on failure. So, introduce a helper function
which simplifies remapping a resource and make it hard to do something
wrong and add documentation for it.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
(cherry picked from mainline commit
	72f8c0bfa0de64c68ee59f40eb9b2683bffffbb0)

Change-Id: I600c5200104e234d42ca396e50853133b3ab4b1f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/94533
Reviewed-by: Automatic_Commit_Validation_User
patch: add hr_msleep support
usb: ehci: use version from nvidia
ARM: tegra: Enterprise: Provide settling time for 3.3 Voltage rail

It is observed that voltage rails for 3V3 is taking around 400us
for setting it output. Providing the startup delay of 500us for this
rail so that rails are stablized at desired level before any consumer
uses that rail.

Bug 959902

Change-Id: I602b428db44d595a94d69fccb3340a77c3819a3b
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/94537
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
config: tegra[3]: remove trailing /

Remove the trailing / from bcmdhd firmware path.

Change-Id: I76e415784cd29bf2551b36c236d84bcbbc5bda1b
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/94557
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
ARM: pm: force non-zero return value from __cpu_suspend when aborting

Ensure that the return value from __cpu_suspend is non-zero when
aborting.  Zero indicates a successful suspend occurred.

Change-Id: I53afba30ecd8a34ea16f39eaafa07e7b0c127e64
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85669
Reviewed-by: Automatic_Commit_Validation_User
ARM: pm: preallocate a page table for suspend/resume

Preallocate a page table and setup an identity mapping for the MMU
enable code.  This means we don't have to "borrow" a page table to
do this, avoiding complexities with L2 cache coherency.

Change-Id: I625d3622359e961e4f358171e9a82b51bcecf9c2
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85671
Reviewed-by: Automatic_Commit_Validation_User
ARM: pm: only use preallocated page table during resume

Only use the preallocated page table during the resume, not while
suspending.  This avoids the overhead of having to switch unnecessarily
to the resume page table in the suspend path.

Change-Id: Ib71c9b60b0ec39749aadc6f592549d213e6a852e
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85725
Reviewed-by: Automatic_Commit_Validation_User
ARM: pm: get rid of cpu_resume_turn_mmu_on

We don't require cpu_resume_turn_mmu_on as we can combine the ldr
instruction with the following code provided we ensure that
cpu_resume_mmu is aligned for older CPUs.  Note that we also align
to a 32-byte boundary to ensure that the code can't cross a section
boundary.

Change-Id: I356eeff464eec48d167d98ee45b80b300d7c4c99
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85726
Reviewed-by: Automatic_Commit_Validation_User
ARM: pm: no need to save/restore context ID register

There is no need to save and restore the context ID register on ARMv6
and ARMv7 with a temporary page table as we write the context ID
register when we switch back to the real page tables for the thread.

Moreover, the temporary page tables do not contain any non-global
mappings, so the context ID value should not be used.  To be safe,
initialize the register to a reserved context ID value.

Change-Id: I7de05e736dde5bc1b8ab682a8660eaaba52104cf
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85727
Reviewed-by: Automatic_Commit_Validation_User
ARM: pm: convert some assembly to C

Convert some of the sleep.S guts to C code, which makes it easier to
use our macros and to add L2 cache handling.  We provide a helper
function, __cpu_suspend_save(), which deals with saving the common
state, setting up for resume, and flushing caches.

The remainder left as assembly code is the saving of the CPU general
purpose registers, and allocating space on the stack to save the CPU
specific registers and resume state.

Change-Id: I0e8bc196fa7302cfe52c17d39675dadf25ea1004
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85728
Reviewed-by: Automatic_Commit_Validation_User
ARM: pm: add L2 cache cleaning for suspend

We need to ensure that state is pushed out from the L2 cache when
suspending so that the resume paths can access their data before the
MMU and caches have been re-initialized.  Add the necessary calls to
__cpu_suspend_save().

Change-Id: Idf7516347478731b722e62a37b5cc9f1c52be68e
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85729
Reviewed-by: Automatic_Commit_Validation_User
Revert "ARM: tegra: power: Workaround PMD corruption by cpu_resume_mmu"

This reverts commit 48565a367997c1748c655bc834e06b348d4e5b2c.

Change-Id: I0e1411f1260ae916c510478276d88b41416a0d42
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85670
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>