mklib: clean up abi flags for x86 targets

The current code is duplicated in two places and relies on `uname` to
detect the flags.  This is no good for cross-compiling, and the current
logic uses -m64 for the x32 ABI which breaks things.

Unify the code in one place, avoid `uname` completely, and add support
for the new x32 ABI.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
mesa: use a prefix for the program lex

This avoids us making a global yylex symbol which will interfere will
all sorts of apps.

with libdricore which can't do symbol visibility currently we pollute
the namespace with this.

This is a candidate for 9.0 & stable branches.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit cc943c8470b38a1f13d2493f293a153f75754caa)
glcpp: fix abuse of yylex

So glcpp tried to workaround yylex its own way, but failed,
do it properly.

This fixes another crash found after fixing the first crash.

this is a candidate for 9.0 and stable branches

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 53d46bc787318ccf9911fdd1d5fe99ee4db7f41a)
mesa/glsl: rename preprocess to glcpp_preprocess

This symbol with dricore escapes into the namespace, its too generic,
we should prefix it with something just to be nice.

Should be applied to stable + 9.0

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 88b0790b1ae8864d4ec6196b3939498bbffdbb5f)
build: Don't list glproto and dri2proto in pkg-config file

No files provided by glproto or dri2proto are needed for building
something with Mesa.

Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=342393
Reviewed-by: Dan Nicholson <dbn.lists@gmail.com>
docs/devinfo: fix typo
(cherry picked from commit abb1c847ac9d9fa14ba6f786a205446957d45827)
docs: fix some issues in relnotes

improve markup
fix link to relnotes-9.0
add missing relnotes links
(cherry picked from commit 6fb8aeb2c5c64418795691261176c158c1a20e00)
r600g: don't use a staging resource for large transfers

It kills performance if the resource is linear.
(cherry picked from commit e386972f5bcb59a37489ea627030315bf8961fd4)
r300g: fix colormask with non-BGRA formats

NOTE: This is a candidate for the stable branches.
(cherry picked from commit 1e51d368eb5360378218217ff35731896f48512f)
gallium/u_blitter: fix stencil-only blits

NOTE: This is a candidate for the stable branches.
(cherry picked from commit 61706915a3b5644faf7a5e67f47c9c593620bf8c)
r600g: do not require MSAA renderbuffer support if not asked for

to allow stencil-only sampler-only formats (like X24S8)

NOTE: This is a candidate for the stable branches.
(cherry picked from commit df5e2c058f73b72909fa99a2a189f5877525e3bf)
r600g: set QUANT_MODE on Cayman too

This fixes piglit/fbo-blit-stretched.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit bfe489c76b6fd58bc4d8cc7f7a3859ff3dc1782e)
draw: fix non-indexed draw calls if there's an index buffer

pipe_draw_info::indexed determines if it should be indexed and not
the presence of an index buffer.

This fixes crashes in r300g.

NOTE: This is a candidate for the stable branches.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit 2988fa940e1d8a4531fddff4d554eec1e6e04474)
winsys/radeon: fix relocs caching

Don't cache pointers to elements of reallocatable array.
In some circumstances it caused false cache hits resulting in incorrect
command stream and gpu lockup.

Note: This is a candidate for the stable branches.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
(cherry picked from commit 9aa8bac98b823e8783bc3a06a6e5b23fbf8d87fb)
darwin: do not create double-buffered offscreen pixel formats

http://xquartz.macosforge.org/trac/ticket/536

Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
(cherry picked from commit 5fdf1f784bf449d7ce9839506fa23c5357696c4c)
meta: Don't _mesa_set_enable() invalid targets in ES 1.

GL_TEXTURE_1D, GL_TEXTURE_3D, GL_TEXTURE_RECTANGLE, and GL_TEXTURE_GEN_*
don't exist in ES 1 contexts, so any meta ops that used _mesa_meta_begin
with MESA_META_TEXTURE would trigger GL errors.  One such operation is
_mesa_meta_Clear().

Fixes the ES1 conformance test miplin.c, which was regressed by commit
08be1d288f216232d3974f5997b266a8dd720928.

NOTE: This is a candidate for the 9.0 branch.

v2: Also blacklist GL_TEXTURE_3D, per Brian's comments.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54297
Cc: Ian Romanick <idr@freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
mesa: Don't override S3TC internalFormat if data is pre-compressed.

Commit 42723d88d intended to override an S3TC internalFormat to a
generic compressed format when the application requested online
compression of uncompressed data.  Unfortunately, it also broke
pre-compressed textures when libtxc_dxtn isn't installed but the
extensions are forced on.

Both glCompressedTexImage2D() and glTexImage2D() call teximage(), which
calls _mesa_choose_texture_format(), hitting this override code.  If we
have actual S3TC source data, we can't treat it as any other format, and
need to avoid the override.

Since glCompressedTexImage2D() passes in a format of GL_NONE (which is
illegal for glTexImage), we can use that to detect the pre-compressed
case and avoid the overrides.

Fixes a regression since 42723d88d370a7599398cc1c2349aeb951ba1c57.

NOTE: This is a candidate for the 9.0 branch.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-and-tested-by: Jordan Justen <jordan.l.justen@intel.com>
(cherry picked from commit 328961d95586931a17fe81ba816d362e8389c105)
mesa: Ignore SRGB when determining compatible resolve formats.

MSAA resolves and other blit-like operations ignore SRGB state anyway,
so we should be able to safely allow resolves between compatible
SRGB/linear formats like SRGBA8 and RGBA8888.

This matches the behavior of the nVidia and AMD binary drivers.

Fixes completely black rendering when using multisampling in L4D2.

NOTE: This is a candidate for the 9.0 branch.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit c96828ecb46b5aee3121a018be365b738c35cbdc)
i965/gen6+: Adjust stencil buffer size after computing miptree layout.

Since Gen6+ stencil buffers use W-tiling (a tiling arrangement which
drm and the kernel are not aware of) we need to round up the width and
height of a stencil buffer to multiples of the W-tile size (64x64)
before allocating a stencil buffer.  Previously, we rounded up the
size of the base miplevel, and then computed the miptree layout based
on the rounded up size.  This was incorrect, because it meant that the
total size of the miptree would not be properly W-tile aligned, and
therefore we would not always allocate enough pages.

(Note: even though the GL API doesn't allow creation of mipmapped
stencil textures, it does allow mipmapping of a combined depth/stencil
texture, and on Gen6+, a combined depth/stencil texture is internally
implemented as a pair of separate depth and stencil buffers.)

For example, on Sandy Bridge, when allocating a mipmapped stencil
texture of size 128x128, we would first round up to the nearest
multiple of 64x64 (causing no change to the size), and then compute
the miptree layout (whose size worked out to 128x196).  Then we would
request an allocation of 128*196 bytes (6.125 pages), causing 7 pages
to be allocated to the texture.  However, the texture needs 8 pages,
since each W-tile occupies a page, and it takes 2 W-tiles to cover a
width of 128 and 4 W-tiles to cover a height of 196.

This patch changes the order of operations so that the miptree layout
is computed first and then the total size of the miptree is rounded up
to be W-tile aligned.

NOTE: This is a candidate for stable release branches.

Reviewed-by: Eric Anholt <eric@anholt.net>
i965/blorp: Clarify why width/height must be adjusted for Gen6 IMS surfaces.

Also add a clarifying comment for why the width/height doesn't need
adjustment for Gen7.

NOTE: This is a candidate for stable release branches.

Reviewed-by: Eric Anholt <eric@anholt.net>