leds-pm8xxx: Set both PWM percentages when not blinking.

Set PWM percentages for both the low and high states when the LED isn't
blinking (delayon == delayoff == 0).  Otherwise the low state remains at
0%, resulting in a dim, rapidly pulsing LED.

This is also consistent with the behavior of the non-blinking battery
charging patterns used by TW.
Revert "video: msm: Add support for VSYNC notify via sysfs"

This reverts commit 9891f29907d879cb7fa6ec19fcca10b999fb2279.
msm_fb: Make Vsync IOCTL during disable sequence as NO WAIT

Change to make the vsync IOCTL no wait during the disable sequence.
This is to increase the performance. Handle the synchronization of
vsync interrupt using state variables in drivers from now.

(cherry picked from commit 5e0fcdbf8b22bc9637413de9cd0592c159dd4e8f)

Change-Id: I2d861c4ffbea535802860c47e3e9d5a84c9d4956
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Jessica Gonzalez <jgaona@codeaurora.org>
msm_fb: Return pan_display call on Vsync interrupt

Till now, the pan_display call returns on DMA_P_DONE interrupt.
For command mode panels, the DMA transfer starts only after the
DMA engine receives a TE signal from the panel. Hence, return
pan_display ioctl on vsync interrupt to improve performance.
We still wait if the previous DMA transfer is not finished at
the beginning of next pan_display.

(cherry picked from commit 61832135cad75ef082a905fedb30d835c85611b5)

Change-Id: I2eb250c0ba87098424c03fb6ecfffcd1e62ec2c9
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Jessica Goznalez <jgaona@codeaurora.org>
msm_fb: display: Send vsync events using sysfs for MDP4 targets

Replace sending of vsync timestamp using uevents with sysfs entry
as uevent result in increase in power numbers due to broadcast in
nature. Also, for smart panel, wait4vsync is removed.

(cherry picked from commit ca47ab601b9d36b2a96685a6e93042318ebbba8b)

Change-Id: I96577a3408fa0e2e1b54cf97434ddcf75bee589c
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Jessica Gonzalez <jgaona@codeaurora.org>
msm_fb: display: Send vsync events using sysfs for MDP3 targets

Replace sending of vsync timestamp using uevents with sysfs entry
as uevent result in increase in power numbers due to broadcast in
nature.

(cherry picked from commit 4ae2fcc7a3e2f1e68efe57ea0a42e7a4b83e87da)

Change-Id: I89bebef35e04c1b5e1e5a56d26482c95f1928b68
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Jessica Gonzalez <jgaona@codeaurora.org>
msm_fb: display: turn vsync irq off at suspend

Turn off vsycn irq at suspend to prevent vsync irq firing
before vsycn enabled ioctl called at resume.

Change-Id: I2428cdeb5cf7008e50f6d8dabfad52416db2fff7
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
msm_fb : display : Block RGB downscale in MDP 4.0 and 4.1

Downscale is not allowed on RGB pipes in MDP 4.0 and 4.1. Hence,
fail the OVERLAY_SET ioctl for such configurations.

Signed-off-by: Pradeep Jilagam <pjilagam@codeaurora.org>
(cherry picked from commit 3545573720822ce97ec37586f10fdf74a6d4f090)

Change-Id: I8445c18ac21cb7322eb9eb4c802623df5da07eb7
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
video: msm: Dynamically toggle histogram interrupt

Make histogram enable/disable functions also enable/disable the histogram
"interrupt enabled" bit on the MDP enabled interrupts register.

CRs-Fixed: 398556
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
Change-Id: I56f811e88cf3fd44ae0a2df8a6e5de32ba9a0c1c
video: msm: Defer histogram reset to workqueue

Currently, when an underrun occurs, a reset request is sent to the
histogram hardware. This has been observed to cause a hang in the histogram
collection cycle. The fix for this hang is to instead rely on the existing
checks for histogram validity in the histgram read worker. When the
underrun occurs, the histogram is invalidated, which in turn causes the
histogram read worker to reset the histogram collection when it attempts to
read its contents.

Change-Id: I66d33ddedef76fdcb6c4a3d8095c0e8ca695e33d
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
video: msm: Ensure idle state before enabling histogram

Disable interrupt, set state flags to false, cancel histogram collection,
and clear the workqueue before attempting to enable the histogram. This
guarantees that this is the only configuration of the histogram running.

Change-Id: I222932db40494724b3efdb2e5bea08a849095c1e
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
msm: rotator: Add pseudo-planar 422 H1V2 dst format for MDP4

For interleaved 422 inputs, rotator outputs MDP_Y_CRCB_H1V2
format on 90 degree rotation. Add support as destination format
for MDP4.

CRs-Fixed: 371303
Change-Id: Ie0f98d40f58bf2cb9bc3298a94cae9c4e89b2f7a
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
msm_fb: display: Add pseudo-planar 422 H1V2 support in the MDP4

Rotator outputs pseudo-planar 422 H1V2 for interleaved inputs
on 90 degree rotation. Add changes to support MDP_Y_CRCB_H1V2
in MDP4.

CRs-Fixed: 371303
Change-Id: I8083bf44f9e2addf9e8732268147c1c3f6c0e2af
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
msm_fb: display: Program source address registers correctly

Scale filter FIR uses the adjacent pixels as part of the
processing. Source address registers should be program such that
they point to the first valid pixel so that non-ROI pixels are
ignored. This is done by making source x,y offsets to zero and
adding the computed offset to source address.

CRs-Fixed: 380020
Change-Id: I998fdd46f39dc67f32c422ec209da59d1add2e95
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
video: msm: Enable mdp clock for histogram and histLUT

Enable the mdp clock for histogram and histogram LUT to ensure that the
clock remains enabled when they are being accessed.

Change-Id: Ic744f2ee96b64442f23ba19aa1c38552c0dad83a
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
msm_fb: display: remove extra dmap irq disable

Both irq enable and disable need to be called symmetrically.
Remove an extra dmap irq disable call.

Change-Id: Ic51003c50431ebe46a9fc540163cda77a1c91797
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
msm_fb: display: add pipe commit ioctl

currently, pan display serves as pipe commit. However it
may spend long time pending on cosole_lock() which cause
flickering on HDMI. Add pipe commit ioctl to allow commit
from overlay in addition to pan_display.

CRs-fixed: 391564
Change-Id: I163b5d96f727b70b4d5693e9a414b59339818998
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
msm_fb: display: empty pending queue during suspend

Overlay_play() adds a pipe into pending queue and pan_display()
will commit those pipes to hardware and empty queue. This patch
will make sure queue is empty at suspend so that no unexpected
pipes will be commited to hardware by pan_display() at resume.
Otherwise, iommu page fault may happen.

Change-Id: Iafdf469c6cdbf5d469c9dee114555a8d1adb9c66
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
msm_fb: display: Timeout pan display if time greater than 100ms

Timeout if pan display is taking more than 100ms to complete. This
will unblock the userspace thread and continue. This will solve
the hang issues.

Change-Id: Ica6a395b0e992263567633d6dc93a92ee1fa59cf
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
(cherry picked from commit 7c270369ccb7eca4934d6005b1960ac7ec2ed2fc)
msm_fb: display: remove background invert alpha option for alpha drop pipe

When the blended background pipe has dropped alpha and it is going to
be blended with foreground pipe on the next stage,
MDP4_BLEND_BG_ALPHA_FG_CONST is taken. Foreground alpha constant is
0xFF, so we need to use this alpha value to show background, instead
of its inverted value.

Change-Id: I1fe0572f9bb54db6280bcc44117a21b8c0d8b07a
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>