gcx: Fixed l3 data throughput requested value.

Change 0xA0000000 to smaller value because of calculation overflow.
Request 800MB/s, so bus target value calculation produces 800000*1000/4=200Mhz.

Change-Id: I5a1ecea50f7ff7faeb90c25e7c3b4fa49ce85e83
Signed-off-by: Oleg Matcovschi <oleg.matcovschi@ti.com>
gcx: more driver cleanup

Change-Id: I21cb347232c56427d7f89200c6ccc1793aea79c1
Signed-off-by: Rick Tillery <rtillery@ti.com>
Signed-off-by: Alexei Shlychkov <shlychkov@gmail.com>
gcx: moved GC320 pixel cache flush to the end of the batch.

Change-Id: I4d604f6efa3ee09dd630b99b783cbacb9a4f3e6c
Signed-off-by: Alexei Shlychkov <shlychkov@gmail.com>
gcx: optimized programming of the destination.

Change-Id: Ifc3b3c6005d7e715406f0a5da4b5cbafc03efbc3
Signed-off-by: Alexei Shlychkov <shlychkov@gmail.com>
gcx: return an error if 2d hardware is not present.

for now, we need to plug this hole by checking the omap
cpu version.  later, we ought to check for null on the
interface returned from gccore.

Change-Id: I82c15f4ab2376affdb11a8bb5a85d27cf050946c
Signed-off-by: David Sin <davidsin@ti.com>
omap: remove unused omaplfb platform device

Change-Id: Ic7d8aa22868c0cf2396ae499a1a320903e9feb31
Signed-off-by: Tony Lofthouse <a0741364@ti.com>
sgx_omaplfb: Create omaplfb platform device file to permit device configuration

Change-Id: Ic790a0440d19d862d981a230470523409b25b9a3
Signed-off-by: Tony Lofthouse <a0741364@ti.com>
Signed-off-by: Gustavo Diaz Prado <a0273371@ti.com>
bltsville: add bv_cache to bltsville API

Change-Id: I0e87b1180fad52706106e14b38fb79aa498754a5
Signed-off-by: Jack Yen <jyen@ti.com>
bltsville: update headers in bvbuffdesc and bvsurfgeom

Change-Id: I34c39c52a0249f0f2f7eb43053cc37b2a2f93b5a
Signed-off-by: Jack Yen <jyen@ti.com>
omap_hwc: Adds a flag to hint omaplfb a blit FB is needed

When HWC generates blits a DSS pipe is configured and assigned
for the blit framebuffer, this patch adds a flag to give a
hint to omaplfb to use such pipe when it is present.

This helps in situations where there are not blits but blit
buffers to synchronize with and a blit buffer must be used.
In such case the rgz_items and num_ovls from dsscomp where not
enough data to recognize this scenario.

Change-Id: I70542b5d4a865b783277a46afe5e030d17b90f8f
Signed-off-by: Gustavo Diaz Prado <a0273371@ti.com>
blaze_defconfig: Update kernel version (blitsville and HWC header changes)

A change in the blitsville and hwc header files have been done in the
following patches.

http://review.omapzoom.org/#/c/21203/
http://review.omapzoom.org/#/c/21118/
http://review.omapzoom.org/#/c/21145/

This requires to update the kernel version to 3.0.21-00003-OMAP-Android

Change-Id: I66e87139c5f7d0b15dc4f0d76b268e08435d0f99
Signed-off-by: Gustavo Diaz Prado <a0273371@ti.com>
gcbv: update gcbv to match latest BLTsville API

Change-Id: I67452163521bf4118f47649836123257201b166e
Signed-off-by: Jack Yen <jyen@ti.com>
OMAP4: OPP: Correct default ABB type for MPU OPP Turbo

Default MPU ABB type for OMAP4460/70 is following:

   OPP   | ABB type
---------+----------
 OPP50   | Bypass
 OPP100  | Bypass
 OPPTB   | Bypass
 OPPNT   | FBB
 OPPNTSB | FBB

This patch corrects default ABB type for MPU OPP Turbo for OMAP4460/70.

Change-Id: Ifc424be0b3d103f8923d2633f1a1830f2de9651f
Signed-off-by: Taras Kondratiuk <taras@ti.com>
OMAP4460: OPP: Move ABB update for MPU OPP turbo to OPP init code

Initially ABB type update was implemented in ABB init code.
This leads to a voltage values duplication.
This patch moves ABB type detection into the OPP init code.

Change-Id: I6140dff1be0f2b9e667160da957c8e1dbabf3e8f
[taras@ti.com: remove previous implementation]
Signed-off-by: Taras Kondratiuk <taras@ti.com>
[nm@ti.com: movement of code to central opp update]
Signed-off-by: Nishanth Menon <nm@ti.com>
[mturquette@ti.com: original author]
Signed-off-by: Mike Turquette <mturquette@ti.com>
OMAP4460: OPP: update ABB for IVA OPP turbo

On 4460 all OPPs have pre-determined states for VDD_IVA's ABB LDO,
except for OPP_TURBO.  OPP_TURBO may require bypass or RBB.
depending on a characterisation data blown into eFuse
register CONTROL_STD_FUSE_OPP_DPLL_1.

Bit 21 of that register signify DPLL_IVA trim OPP_TURBO might put
IVA's ABB LDO into bypass or RBB based on this value.

This patch introduces ABB type detection into the OPP init code.

Change-Id: Ie2f49652fda667943a7a9ac76d529c6a594b8755
Signed-off-by: Nishanth Menon <nm@ti.com>
OMAP4: OPP: Make ABB type trim update more generic

Change omap4460_abb_update() with generic omap4_abb_trim_update()
So it can be used for other devices and OPPs.

Change-Id: I2390bedc439b3388eda9efbaaecf1d66f7436ab8
Signed-off-by: Taras Kondratiuk <taras@ti.com>
OMAP4470: OPP: Update ABB type according to trim bits

Depending on a trim bits blown into eFuse register CONTROL_STD_FUSE_OPP_DPLL_1
RBB should be enabled at some MPU/IVA OPPs to reduce a leakage on OMAP4470.

 Bit #|       Name      |             Description
------+-----------------+---------------------------------------
  20  | MPU_RBB_TURBO   | 0 - RBB is trimmed and should be used.
  21  | IVA_RBB_TURBO   | 1 - RBB is not trimmed
  22  | MPU_RBB_NITRO   |
  23  | MPU_RBB_NITROSB |
  24  | IVA_RBB_NITRO   |
  25  | IVA_RBB_NITROSB |

Change-Id: Idd76e8dd2f5e55573f6dd6f7515ab57d87b14125
Signed-off-by: Taras Kondratiuk <taras@ti.com>
ION : ION buffers caching support (ION, TILER 1D buffers)

ION map is enhanced to map ion buffers as cached pages
This patch also adds IOCTLs in ION to flush and invalidate
the cached buffers
Note: TILER 2D buffers cant be mapped as cached regions to
MPU due to DMM limitation

Complete list of feature patchset (cross project dependencies)
  http://review.omapzoom.org/18390  kernel/omap
  http://review.omapzoom.org/18391  external/kernel-headers
  http://review.omapzoom.org/18392  bionic
  http://review.omapzoom.org/18393  hardware/ti/omap4xxx
  http://review.omapzoom.org/18394  hardware/ti/domx

Change-Id: I8c7c3f0375a4b3fae13f46a657d0c2eec703f72b
Signed-off-by: Kalpesh Patil <kalpeshpatil@ti.com>
Signed-off-by: Devaraj Rangasamy <dev@ti.com>
omap: iommu: program constraints based on platform data

IOMMU driver requests and releases constraints in iommu_get
and iommu_put respectively. These constraints are actually
needed only on OMAP4 and beyond for sub-systems that have
an AMMU. The current driver code has these values hard-coded
for all the chips.

A new platform data field has been added now for the constraints
values, and this allows the values to be programmed based on
the OMAP chip and also allow a unique value if needed for each
iommu instance.

The logic in IOMMU driver code is adjusted to request the
constraints only if the relevant platform data field is set.

Change-Id: Iab18cbdde1d7fa7507dbff0b9512c8577b42fefd
Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
omap: mailbox: add pm constraint field to mbox structure

By adding this field, the pm qos apis can be selectively applied
only if the pm constraint is set to a +ve value.

Change-Id: I3b6930e85f65f7354826813798dec76b25149370
Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
Signed-off-by: Omar Ramirez Luna <omar.ramirez@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>