Revert "Not sure what happened here"

This reverts commit 5a20886054ca0467c3610b9ef9d85f24322cfedd.
Revert "Properly show my dirty hack on GitHub."

This reverts commit 73885a7258f67f7e6d241d28d3c7f9107181b299.
Import CAF genalloc
msm: memory: Use standard cache routines

Convert custom clean, flush, and invalidate cache routines to use
standard ARM cache routines.

Change-Id: Ida0c539b89e1b6c98542221f847a9bcd7fc32a2e
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
(cherry picked from commit 29bb4d5fa7a285c8fb5d5db55225dab700b80419)

Signed-off-by: Zhoulu Luo <zluo@codeaurora.org>
msm: improve handling of DONT_MAP_HOLE_AFTER_MEMBANK0

The code to avoid mapping the hole after memory bank 0
located the start and size of this hole after running
generic initialization code which needed to convert
physical addresses to virtual ones and vice-versa
beyond this hole.

While this didn't prevent the kernel from booting, this
isn't clean, and in fact it was giving us more vmalloc
space than the config file specified (and as a result
there was less lowmem than expected).

The code to locate the hole now runs before this
initialization code.

CRs-Fixed: 352258
Signed-off-by: Larry Bassel <lbassel@codeaurora.org>
(cherry picked from commit 31a949b5c5004f017e4adfa86f4a136025acdcd4)

Change-Id: Ia80c5db63c214ab86084ef68e29429fbac622434
Signed-off-by: Zhoulu Luo <zluo@codeaurora.org>
(cherry picked from commit af20a668c96a6869d89bc9430bee748fb43f52d2)
arm: remove "optimized" SHA1 routines

Since commit 1eb19a12bd22 ("lib/sha1: use the git implementation of
SHA-1"), the ARM SHA1 routines no longer work.  The reason? They
depended on the larger 320-byte workspace, and now the sha1 workspace is
just 16 words (64 bytes).  So the assembly version would overwrite the
stack randomly.

The optimized asm version is also probably slower than the new improved
C version, so there's no reason to keep it around.  At least that was
the case in git, where what appears to be the same assembly language
version was removed two years ago because the optimized C BLK_SHA1 code
was faster.

Reported-and-tested-by: Joachim Eastwood <manabian@gmail.com>
Cc: Andreas Schwab <schwab@linux-m68k.org>
Cc: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
lib/sha1: use the git implementation of SHA-1

For ChromiumOS, we use SHA-1 to verify the integrity of the root
filesystem. The speed of the kernel sha-1 implementation has a major
impact on our boot performance.

To improve boot performance, we investigated using the heavily
optimized sha-1 implementation used in git. With the git
sha-1 implementation, we see a 11.7% improvement in boot time.

10 reboots, remove slowest/fastest.

Before:

Mean: 6.58 seconds Stdev: 0.14

After (with git sha-1, this patch):

Mean: 5.89 seconds Stdev: 0.07

The other cool thing about the git SHA-1 implementation is that
it only needs 64 bytes of stack for the workspace while the original
kernel implementation needed 320 bytes.

Signed-off-by: Mandeep Singh Baines <msb@chromium.org>
CC: Ramsay Jones <ramsay@ramsay1.demon.co.uk>
CC: Nicolas Pitre <nico@cam.org>
CC: Linus Torvalds <torvalds@linux-foundation.org>
CC: Herbert Xu <herbert@gondor.apana.org.au>
CC: David S. Miller <davem@davemloft.net>
CC: linux-crypto@vger.kernel.org
arm: remove export for removed "optimized" SHA1 routines

This fixes the sha_transform exported twice compilation warning.
Import CAF genlock
diag: Fix data corruption.

Diag uses krealloc for allocating memory if number of client exceeds 15 as
krealloc doesn't initialize memory to 0 resulting in corruption of data.
This fix initializes the memory after allocation.

CRs-Fixed: 347675
Change-Id: Ide504a18adc2e1fc282c5543ec77818f346e4015
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
(cherry picked from commit 6bac272ef9b64f0830af50f1537aa18017711022)
ARM: entry: no need to increase preempt count for IRQ handlers

X-Git-Tag: v3.1-rc1~258^2~1^3~16
X-Git-Url: http://git.kernel.org/?p=linux%2Fkernel%2Fgit%2Ftorvalds%2Flinux-2.6.git;a=commitdiff_plain;h=1613cc1119ecdb1bdb950da53065e615e4c4b8db

irq_enter() and irq_exit() already take care of the preempt_count
handling for interrupts, which increment and decrement the hardirq
bits of the preempt count.  So we can remove the preempt count handing
in our IRQ entry/exit assembly, like x86 did some 9 years ago.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
mmc: msm_sdcc: Power down slots after reboot

Some reboot methods (eg. adb reboot) may not power
down SDCC slots. This can result in cards being
in unexpected states after reboot. Explicitly reset
slot voltage regulator on reboot.

CRs-Fixed: 341840
Change-Id: I8cdb52bc58e34900378af468794760653f3babad
Signed-off-by: Oluwafemi Adeyemi <aadeyemi@codeaurora.org>
lib/string: use glibc version

the performance of memcpy and memmove of the general version is very
inefficient, this patch improved them.

Signed-off-by: Miao Xie <miaox*******>
lib/memcopy: use glibc version

the kernel's memcpy and memmove is very inefficient. But the glibc version is
quite fast, in some cases it is 10 times faster than the kernel version. So I
introduce some memory copy macros and functions of the glibc to improve the
kernel version's performance.

The strategy of the memory functions is:
1. Copy bytes until the destination pointer is aligned.
2. Copy words in unrolled loops.  If the source and destination are not
   aligned in the same way, use word memory operations, but shift and merge
   two read words before writing.
3. Copy the few remaining bytes.

Signed-off-by: Miao Xie <miaox*******>
Bluetooth : Ignore incomming events when the hci device is down

In error conditions Adapter state machine via Bluez tries to reset
the hci device, during that in some rare scenario if some pending event
comes from riva, the command complete apis tries to access some already
freed memory in reset sequence.

CRs-fixed: 369658
Signed-off-by: Bhasker Neti <bneti@codeaurora.org>
(cherry picked from commit 6f4ceb1f8588aec11b4d9380cd328d0008c8d167)

Change-Id: I7d72cc12ef98f15cc21bd5954c5ba9c810246716
Signed-off-by: Ramakrishna Prasad N <crpn@codeaurora.org>
msm: kgsl: Add TLB flush for each submit in case of 8x25/7x2xa

Add TLB flush for each submit to prevent target freeze
in case of 8x25/7x27a/7x25a targets.

CRs-fixed: 379991
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
(cherry picked from commit 22a06d18c6eb100419616ddf7a2c4ac403420a9e)

Change-Id: I7c34660128c791c9329b41246af39879625d64d3
Signed-off-by: Srivalli Oguri <oguri@codeaurora.org>
msm: kgsl: Pass correct datatype to kgsl_mmu_ptpool_destroy()

This fixes a crash due to NULL pointer access when allocation of DMA
Coherent memory fails.

Change-Id: I7ea7405713682aaa7cd660ef341a968342dc0880
Signed-off-by: Ranjhith Kalisamy <ranjhith@codeaurora.org>
Optimized ARM RWSEM algorithm

RWSEM implementation for ARM using atomic functions.
Heavily based on arch/sh/include/asm/rwsem.h

Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>
msm: audio: qdsp5: Fix for logical errors in qdsp5

Add missing break statement in AUDIO_FLUSH ioctl in audio_out driver.
Add missing braces for the conditional check for buffer size in
AUDIO_SET_STREAM_CONFIG ioctl for AMR NB, EVRC and QCELP drivers.
Correct the loop terminating logic in audpcm_in_flush() function.
Add break statement in AUDPP_MSG_FLUSH_ACK ioctl in WMA and WMAPro
drivers.

CRs-Fixed: 355773
Signed-off-by: Phani Kumar Allada <pallad@codeaurora.org>
(cherry picked from commit ee940eb44f76503dc818b8a8ed21869b84990547)

Change-Id: I2ebeb27f1a024ae5df3d35f0629d321c3664c615
Signed-off-by: Srivalli Oguri <oguri@codeaurora.org>
Another CAF commit, something about flags