video: tegra-ics: backport/sync with nvidia's 3.1

-nvmap:
 revert:
  http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=commitdiff;h=82d503cee7af4bad948cf4cb8fa16d798e7a2c8c
  http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=commitdiff;h=fc8a4a14fda67747fa0ec308866531114758e23c
  http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=commitdiff;h=65e8c13a3b1c0259b80a36afbefc9b2d443216b4

-update iovmm
 remove static declarations for tegra_iovmm_suspend and tegra_iovmm_resume

-add syscore

-also merge (partial; 2.6.39):
 http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=commitdiff;h=69c76b526e9a2f0ef4b5f5c645e9c878dbb26574#patch9

-fix compile for OVERLAY

Conflicts:

	arch/arm/mach-tegra/iovmm-ics.c
	drivers/base/syscore.c
video: tegra: dc: prevent nvmap_unpin crash

This is a workaround to make sure serialization of flip worker,
for Android specific.
Android doesn't need mutiple workqueues per each window
since it gets composited one from user layer.
If the last windows' argument index is not 0,
provided change will make the last index to 0 with swap operation
so work will be queued into one workqueue all the time.

Bug 929993
Bug 932592
Bug 933831
Bug 935623
Bug 934569

Change-Id: Ic467bb4f593c72ae98ea1fb324cf1a6d343faa62
Signed-off-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-on: http://git-master/r/82971
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
video: tegra: host: Add syncpt value to traces

Add current values of sync points to sync point read and wait
IOCTL's.

Change-Id: I479a66e283b47867ed13685b75c1858b4fb65c2d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/80006
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
video: tegra: dc: use side-by-side stereo HDMI mode

Add a config option to limit HDMI stereo 3D output to 74.25MHz pixel clock.

When this option is set,
substitute the frame pack stereo modes
for side-by-side (half) left-right stereo modes
to meet this pixel clock restriction.

By default, do not use it (use frame packed HDMI mode as usual).

Bug 938807

Change-Id: I2ce2ca72cbb15ac1939af0f3386dd23650262435
Reviewed-on: http://git-master/r/84252
Reviewed-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com>
Tested-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
video: tegra: host: incr_syncpt should not modify max

When user space calls NvRmChannelSyncPointIncr(), the maximum value of sync
point should not be incremented unless sync point is client managed.

Also prevents kernel panic if user space tries to increment beyond maximum.
Instead, give debug spew and ignore.

Bug 936097

Change-Id: I4dc7ed46b1e0394d41066051a47f1d7a1f08493c
Reviewed-on: http://git-master/r/79957
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
video: tegra: host: Change sync queue to a list

Sync queue is the list of jobs still in flight. As context priorities
requires possibility to insert a job in the middle of the queue, the
structure needs to be changed into a linked list.

Bug 926690

Change-Id: Id257a11f18476c70dd69e36ba44ed2d380c80040
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/83127
video: tegra: host: Fix irq race in system resume

At system resume, host1x sync point values are restored from memory, and
interrupts are enabled. This is done in reverse order, and in cases it might be
that interrupt is triggered while sync point values are still being restored.

Bug 940381

Change-Id: I0191b84b41306e0f0ba0758d41e5632dcf9d06cd
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/83995
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
video: tegra: dc: in continuous mode mask VBLANK after first frame

A V_BLANK interrupt for each frame does not allow long lp2 idle intervals.
If all windows are clean, mask V_BLANK interrupt after processing it
for updating smart dimmer. It's unmasked again when a new window update
is performed. This will schedule a work for updating smart dimmer for
the new frame.

Bug 920110

Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/85137
(cherry picked from commit 68398090aee22cf02069e5767c3e9a062b0fc2f6)

Change-Id: I588328bfd0d6036febed236dc07f441878aa81d1
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/85166
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
video: tegra: dc: fix pixel clock latency issue

GENERAL_ACT_REQ causes double-buffered registers to become active.
This register needs to be programed to reduce the latency of pixel clock after
dc enabled by tegra_dc_enable().

bug 926189

Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/83346
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
(cherry picked from commit f39c5ddd1867c508900c9aa2d4eead7eb3082343)

Change-Id: I741c9be9074709c1ab571aa631cb462599d5fb78
Reviewed-on: http://git-master/r/84561
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
video: tegra: host: Dump client managed sync points

Change sync point debug dump filtering so that client managed sync
points are added to output.

Remove also an infinite loop when sync point value goes beyond maximum.
Debug dump calls t20_syncpt_update_min, which should not call debug
dump again.

Change-Id: I086a3c21d6171d083e5254e7a34b1582e38a3e49
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/84940
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
video: tegra: dsi: Fix dsi phy timing

Corrected the formulas to calculate phy timing.
Added mipi d-phy constraints.

Bug 938043

Change-Id: Ie1f2dd45e7e39f83735fe28e21a62dc0415c7c00
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/85217
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
video: tegra: nvmap: don't override contiguous flag

Don't override contiguous flag in nvmap_page_alloc().
This is causing incorrect iovm_commit accounting.

Bug 938864

Change-Id: If30ea43702465980914b12816fa28eac9e14581d
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/85319
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Kamal Balagopalan <kbalagopalan@nvidia.com>
Tested-by: Kamal Balagopalan <kbalagopalan@nvidia.com>
video: tegra: host: Reject gathers if submit failed

If submit failed, for example when we ran out of memory, we should
reject any subsequent writes.

Bug 936097

Change-Id: Ic124fc08b7715532d210a0c0d0b7aebcb54e43d4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/85479
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
video: tegra: dc: Clear window option before window update.

There exits an issue that if window number is less than DC_N_WINDOWS,
window option of some windows won't be cleared. So although it should
be disabled, it might not be disabled properly. This will lead to the
failure of scan-out on screen.

Bug 943846

Change-Id: I604399abaa590b27ab4ea41ed9eb2706be16a75a
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/86230
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
video: tegra: host: Merge tegra_grhost and host1x devices

- tegra_grhost is a platform device that represents host1x
- nvhost has device host1x which represents the same hardware
- merge these two device structs
- as the new struct is a nvhost_device, platform_driver
is also converted into a nvhost_driver
- register nvhost device before other graphics devices.
this ensures that nvhost_probe() is called as soon as
nvhost_driver is registered with the core.
- this also ensures that nvmap is probed first, followed
by nvhost, followed by tegra-dc and nvavp (if they
are enabled).

Change-Id: Ic420a6516a9cb20d6f481692a4db10fa6053dd90
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/82631
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
video: tegra: dsi: Fix syncpt hang during early suspend cycle

Fixing dsi syncpt hang issue after multiple cycles of
early suspend-late resume.

Bug 943096

Change-Id: Iefc0530a6e514b7733819dd1df35cde8f5c3dd47
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/86946
Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com>
Tested-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
video: tegra: host: register nvhost master device in board-xxx-panel.c

- the suspend order of devices is governed by the order
in which devices are registered
- this commit ensures that nvhost master is registered before
any of the graphics devices
- previously this was done in rootfs_init call which is
later than arch_init calls of board-xxx-panel.c
- this caused tegra-dc device to be registered *before* nvhost
master device. as a result it was suspended *later* than nvhost
master device. this is a clear violation of dependency rule
for nvhost. this caused suspend-resume to fail for L4T
- this worked on android as it has CONFIG early suspend enabled
while it failed for L4T which doesn't have CONFIG early suspend
enabled

Bug 947617

Change-Id: I6cd405f3ba23d004e7659140019f5130e6c25159
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/87756
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
video: tegra: dsi: fix DSI_PAD_CONTROL reg wr value on resume

In panel resume path DSI_PAD_CONTROL value gets calibrated,
however later on values are overwritten with bit settings
for ulpm mode.

refactor value for reg write to only change ulpm related bits.

Change-Id: I9f9713bdf376c06b0e1b9f43b3e6c9f719bbd855
Signed-off-by: Boris Suvorov <bsuvorov@nvidia.com>
Reviewed-on: http://git-master/r/85873
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
video: tegra: dc: Fix the race condition of one-shot work.

Add lock to prevent race condition between cancellation of old delayed
work and schedule of new delayed work.

Bug 936337

Change-Id: I52df82e92279163841546127c72be9879ef810d0
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/86730
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
video: tegra: implement DC capabilities ioctl

The returned capabilities bitfield is initially 0 (no caps).

bug 942631

Change-Id: Ia7496981e525526147ecebe67b09dc877d3e0c17
Reviewed-on: http://git-master/r/87088
Tested-by: Adam Cheney <acheney@nvidia.com>
Reviewed-by: Robert Morell <rmorell@nvidia.com>