HACK: increase TILER memory from 16MB to 32MB

Change-Id: Ib417703fca753eaff7ab0fe6e91ad4d38dbe434f
Signed-off-by: Vince Kim <vince.kim@ti.com>
I2C: OMAP: Fix the crash in i2c remove

Should fix the crash at arch/arm/mach-omap2/omap_l3_noc.c
Initial Commit
Sio, Overclock, Temp limit increase, Remove Touch boost, Remove cpu limits
Decrease transition latency
OMAPDSS: DISPC: Fix rounding error in scaling decision

When checking if we are downscaling by more than a factor,
we were dividing the source dimensions instead of multiplying
back the target dimensions.  This allowed downscaling by
slightly more than the max supported downscaling, resulting
in out-of-range register settings and ultimately SYNC_LOST.

Change-Id: Ic039789c5011d64da870121eeb227a803af1fa83
Signed-off-by: Lajos Molnar <lajos@ti.com>
iosched (796d511): prevent aliased requests from starving other I/O
deadline: tweak generally recommended for SSDs
omap2plus: cpufreq: Modify lpj recalculation logic

Somethimes "mdelay" function provide delay
that several times lower than it should be.

This happens because recalculating lpj
performed after switching OPP. In this case,
for short period of time, when OPP on MPU
was switched but lpj was not recalculated,
"udelay" function can provide incorrect
delay - upto 5 times lower
(if OPP was switched from lowest to highest).

This patch changes lpj recalculation logic to:
if OPP will be switched to higher - recalculate lpj before switching OPP,
if OPP will be switched to higher - recalculate lpj after switching OPP.

Change-Id: I3258e756c471fd0258a849d712ab00f4e1279ea9
Signed-off-by: Sergii Postulga <x0153364@ti.com>

Patch Set 3
Added CPUfreq governor 'wheatley'.

Conflicts:

	drivers/cpufreq/Kconfig
	drivers/cpufreq/Makefile
	include/linux/cpufreq.h
Clock rate for dpll_core_m6x2_ck for OPP100 should be exactly 266666666
= 1600000000 / 6 (266600000 is rounded down to 228571428 = 1600000000 / 7).
Add dynamic writeback feature from 3.1
arm: Allow CPU-supported unaligned accesses
Added optimized ARM RWSEM algorithm.
Added optimized CRC32 algorithm.
sched: don't call task_group() many times in set_task_rq()

It improves perfomance, especially if autogroup enabled.

The size of set_task_rq() was 0x180 and now it is 0xa0.

Signed-off-by: Andrew Vagin <avagin@openvz.org>
lib/string: use glibc version

the performance of memcpy and memmove of the general version is very
inefficient, this patch improved them.

Signed-off-by: Miao Xie <miaox*******>
adapted by faux123 for 3.0.13 kernel
lib/memcopy: use glibc version

the kernel's memcpy and memmove is very inefficient. But the glibc version is
quite fast, in some cases it is 10 times faster than the kernel version. So I
introduce some memory copy macros and functions of the glibc to improve the
kernel version's performance.

The strategy of the memory functions is:
1. Copy bytes until the destination pointer is aligned.
2. Copy words in unrolled loops.  If the source and destination are not
   aligned in the same way, use word memory operations, but shift and merge
   two read words before writing.
3. Copy the few remaining bytes.

Signed-off-by: Miao Xie <miaox*******>
adapted by faux123 for 3.0.13 kernel
lib/sha1: use the git implementation of SHA-1

For ChromiumOS, we use SHA-1 to verify the integrity of the root
filesystem.  The speed of the kernel sha-1 implementation has a major
impact on our boot performance.

To improve boot performance, we investigated using the heavily optimized
sha-1 implementation used in git.  With the git sha-1 implementation, we
see a 11.7% improvement in boot time.

10 reboots, remove slowest/fastest.

Before:

  Mean: 6.58 seconds Stdev: 0.14

After (with git sha-1, this patch):

  Mean: 5.89 seconds Stdev: 0.07

The other cool thing about the git SHA-1 implementation is that it only
needs 64 bytes of stack for the workspace while the original kernel
implementation needed 320 bytes.

Signed-off-by: Mandeep Singh Baines <msb@chromium.org>
Cc: Ramsay Jones <ramsay@ramsay1.demon.co.uk>
Cc: Nicolas Pitre <nico@cam.org>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: David S. Miller <davem@davemloft.net>
Cc: linux-crypto@vger.kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Remove ARM sha1 routines

Since commit 8827a4a6b397b07a341ba7fd36ffb91a7835207d
("lib/sha1: use the git implementation of SHA-1"), the ARM SHA1
routines no longer work. The reason? They depended on the larger
320-byte workspace, and now the sha1 workspace is just 16 words
(64 bytes). So the assembly version would overwrite the stack randomly.

The optimized asm version is also probably slower than the new improved
C version, so there's no reason to keep it around.  At least that was
the case in git, where what appears to be the same assembly language
version was removed two years ago because the optimized C BLK_SHA1 code
was faster.

Reported-and-tested-by: Joachim Eastwood <manabian@gmail.com>
Cc: Andreas Schwab <schwab@linux-m68k.org>
Cc: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
block: strict rq_affinity