Patent ID: 10937765

Abstract:
A semiconductor device includes a plurality of memory chips laminated to each other, each of the memory chips include a first transmission/reception coil for communication by means of inductive coupling; first lead-out lines led out from both ends of the first transmission/reception coil; and a first transmission/reception circuit, which is connected to the first lead-out lines, and which inputs/outputs signals to/from the first transmission/reception coil. The semiconductor device is also provided with an interposer, which is disposed on one end in the laminating direction of the memory chips, and which has, for each of the memory chips: a second transmission/reception coil coupled to the first transmission/reception coil by means of inductive coupling; second lead-out lines led out from both ends of the second transmission/reception coil; and a second transmission/reception circuit, which is connected to the second lead-out lines, and which inputs/outputs signals to/from the second transmission/reception coil.