Patent ID: 11483000

Abstract:
An interface circuit includes a first switch element connected to a first power supply node, supplying a first power supply voltage, and an output node, transmitting an output signal, and controlled by a first input signal, a second switch element connected to a second power supply node, supplying a second power supply voltage, lower than the first power supply voltage, and the output node and controlled by a second input signal, different from the first input signal, a first resistor connected between the first power supply node and the first switch element, a second resistor connected between the second power supply node and the second switch element, a first capacitor connected between the first resistor and the first switch element and charged and discharged by a first control signal, a second capacitor connected between the second resistor and the second switch element and charged and discharged by a second control signal, and a buffer circuit configured to output the first control signal and the second control signal and connected to a third power supply node, supplying a third power supply voltage, through a first variable resistor and connected to a fourth power supply node, supplying a fourth power supply voltage, lower than the third power supply node, through a second variable resistor.