Patent ID: 11239247

Abstract:
Memory device includes a bottom-select-gate (BSG) structure including cut slits vertically through the BSG structure, on a substrate. A cell-layers structure is formed on the BSG structure. Gate-line slits are formed vertically through the cell-layers structure and the BSG structure, into the substrate and arranged along a first lateral direction to distinguish finger regions. A first gate-line slit is between first and second finger regions and includes gate-line sub-slits. The first finger region is divided into a first string region and a second string region by a first cut-slit, formed in the first finger region along a second lateral direction and further extended into at least the second finger region along the first lateral direction. At least one BSG defined by the first cut-slit is located in at least the second finger region to connect to cell strings in the first string region through an inter-portion between adjacent gate-line sub-slits.