Patent ID: 11728811

Abstract:
A key reuse circuit is provided, a key component is used to generate a DC voltage and a startup-trigger-signal according to a user input, the switch circuit generates a key trigger signal according to the DC voltage, the control circuit reverses a level of an enable-regulation-signal when a time duration of the key trigger signal is longer than or equal to a preset time duration, or determines a key value of the key component when the time duration of the key trigger signal is shorter than the preset time duration, the power on/off regulation circuit generates a voltage-conversion-enable-signal according to the startup-trigger-signal and an enable-regulation-signal having a first level, the buck circuit generates a first voltage according to the power voltage and the voltage-conversion-enable-signal and stops generating the first voltage when the voltage-conversion-enable-signal is terminated, so that reuse of a general key in the key matrix is realized.