Patent ID: 10644119

Abstract:
A semiconductor layer (2,3) is provided on a substrate (1). A gate electrode (4), a source electrode (5) and a drain electrode (6) are provided on the semiconductor layer (3). A first passivation film (7) covers the gate electrode (4) and the semiconductor layer (3). A source field plate (9) is provided on the first passivation film (7), and extends from the source electrode (5) to a space between the gate electrode (4) and the drain electrode (6). A second passivation film (10) covers the first passivation film (7) and the source field plate (9). The first passivation film (7) has a quasi-conductive thin film (8) provided at least between the gate electrode (4) and the drain electrode (6) and having an electric resistivity of 1.0 Ωcm to 1010 Ωcm.