Patent ID: 10950501

Abstract:
Fabrication schemes based on triblock copolymers for forming self-aligning vias or contacts for back end of line interconnects, and the resulting structures, are described. In an example, a method of fabricating an interconnect structure for a semiconductor die includes forming a lower metallization layer including alternating metal lines and dielectric lines above a substrate. The method also includes forming a triblock copolymer layer above the lower metallization layer. The method also includes segregating the triblock copolymer layer to form a first segregated block component over the dielectric lines of the lower metallization layer, and to form alternating second and third segregated block components disposed over the metal lines of the lower metallization layer, where the third segregated block component is photosensitive. The method also includes irradiating and developing select locations of the third segregated block component to provide via openings over the metal lines of the lower metallization layer.