Patent ID: 10620960

Abstract:
An apparatus and method are provided for performing branch prediction. The apparatus has processing circuitry for executing instructions out-of-order with respect to original program order, and event counting prediction circuitry for maintaining event count values for branch instructions, for use in making branch outcome predictions for those branch instructions. Further, checkpointing storage stores state information of the apparatus at a plurality of checkpoints to enable the state information to be restored for a determined one of those checkpoints in response to a flush event. The event counting prediction circuitry has training storage with a first number of training entries, each training entry being associated with a branch instruction. The event counting prediction circuitry implements a training phase for each training entry during which it seeks to determine an event count value for the associated branch instruction based on branch outcome behaviour of the branch instruction observed for instances of execution of the branch instruction that have been committed by the processing circuitry. The event counting prediction circuitry further has access storage with a second number of active entries, where the second number is less than the first number. Each active entry is associated with a branch instruction for which an event count value has been successfully determined during the training phase. The event counting prediction circuitry is arranged to make branch outcome predictions for branch instructions having an active entry. At each checkpoint, state information for the active entries is stored to the checkpointing storage. This provides a particularly efficient form of event counting prediction circuitry that can be used in out-of-order systems, while reducing the amount of state information that needs to stored into the checkpointing storage at each checkpoint.