Patent ID: 10341587

Abstract:
A matrix-array sensor comprises a matrix of detection elements arranged in rows and columns and a readout circuit for each column, the elements of one and the same column linked to the corresponding readout circuit via a bus, each element comprising a sensor, a charge integrator configured to accumulate charge generated by the sensor, a comparator configured to generate a trigger signal when a voltage level across the terminals of this comparator reaches a threshold level, and a bus access logic circuit which is configured to receive, as input, the trigger signal and to attempt to transmit, over the bus, an address of the element in the column, wherein the elements of one and the same column have predetermined bus access priority levels, and wherein the bus access logic circuit of each element is configured: to abandon transmission of the address and reset the charge integrator of the detection element if the bus is pre-empted by an element having a higher priority level; to count the number of attempts made before being able to transmit the address; and to communicate the number to the readout circuit along with the address of the element.