Patent ID: 11347998

Abstract:
A method to translate a nervous system model into Hardware Description Language (HDL) is presented here. The nervous system model is that produced from the Nervous System Modeling Tool, patent application Ser. No. 15/660,858, and the HDL translation downloads into either a Field Programmable Gate Array (FPGA) chip or an Application-Specific Integrated Circuit (ASIC) architecture. The method supports the neurobiological realism of Ser. No. 15/660,858 and adds massive parallelism operating at adjustable microchip speeds. A neurobiologically realistic nervous system embedded on a microchip achieves the goal of neuromorphic computing and thus embodies a nervous system on a chip. The potential applications are extensive and cover the range of robotics, big data analysis, medical diagnostics and remediation, self-learning systems, and artificially intelligent applications such as intelligent assistants. Intelligent assistants can be applied to the fields of language and technology exposition, the Internet of Things (IOT) and security.