Patent ID: 10002878

Abstract:
Methods of integrating complementary SONOS devices into a CMOS process flow are described. The method begins with depositing and patterning a first photoresist mask over a surface of a substrate to expose a N-SONOS region, and implanting a channel for a NSONOS device through a first pad oxide, followed by depositing and patterning a second photoresist mask to expose a P-SONOS region, and implanting a channel for a PSONOS device through a second pad oxide. Next, a number of Nwells are concurrently implanted for the PSONOS device and a PMOS device in a core region of the substrate. Finally, the first and second pad oxides, which were left in place to separate the P-SONOS region and the N-SONOS region from the first and second photoresist masks, are concurrently removed. In one embodiment, implanting the Nwells includes implanting a single, contiguous deep Nwell for the PSONOS and PMOS device.