Patent ID: 10490569

Abstract:
Multiple tier structures are stacked over a substrate. Each tier structure includes an alternating stack of insulating layers and sacrificial material layers and a retro-stepped dielectric material portion overlying the alternating stack. Multiple types of openings are formed concurrently during formation of each tier structure. Openings concurrently formed through each tier structure can include at least two types of openings that may be selected from through-tier memory openings, through-tier support openings, and through-tier staircase-region openings. Each through-tier opening is filled with a respective through-tier sacrificial opening fill structure. Stacks of through-tier sacrificial opening fill structures can be removed in stages to form various device components, which include memory stack structures, support pillar structures, and staircase-region contact via structures. The sacrificial material layers are replaced with electrically conductive layers, which are laterally electrically isolated from the staircase-region contact via structures by annular insulating spacers.