Patent ID: 10879308

Abstract:
A nanosheet 4T2R unit cell for neuromorphic computing is provided. In one aspect, a method of forming a 4T2R unit cell includes: forming nanosheets on a substrate having alternating sacrificial and channel nanosheets; patterning the nanosheets into FET stacks; forming lower/upper source and drains on opposite sides of lower/upper portions of the FET stacks; forming a first gate of an FET1 in the upper portion of a first FET stack, a second gate of an FET2 in the upper portion of a second FET stack, a third gate of an FET3 in the lower portion of a second FET stack, and a fourth gate of an FET4 in the lower portion of a third FET stack; and forming RRAM devices in contact vias to the source and drains of the FET1 and the FET4. A 4T2R unit cell and method for neuromorphic computing are also provided.