Patent ID: 11398484

Abstract:
The present disclosure provides a semiconductor device with an air gap for reducing parasitic capacitance between a bit line and a capacitor contact and a method for forming the semiconductor device. The method includes forming a first source/drain region and a second source/drain region in a semiconductor substrate, and forming a bit line over and electrically connected to the first source/drain region. The method also includes forming a first spacer structure on a sidewall of the bit line, and forming a capacitor contact over and electrically connected to the second source/drain region. The capacitor contact is adjacent to the first spacer structure, and the first spacer structure is etched during the forming the capacitor contact. The method further includes forming a second spacer structure over the etched first spacer structure, and performing a heat treatment process to transform a portion of the first spacer structure into an air gap after the second spacer structure is formed.