Patent ID: 11513887

Abstract:
A memory controller includes an interface and a processor. The interface communicates with memory cells that store data in predefined Programming Voltages (PVs). The processor is configured to produce observation samples that each includes (i) a target sample read from a target memory cell in a target Word Line (WL), and (ii) neighbor samples read from neighbor memory cells. Based on the observation samples, the processor is further configured to jointly estimate Cross-Coupling Coefficients (CCFs), by searching for CCFs that aim to minimize a predefined function of distances calculated between transformed observation samples that have been transformed using the CCFs and combinations of PVs that are closest to the respective transformed observation samples, to apply, based on the CCFs, cross-coupling cancelation to readout samples retrieved from the memory cells to produce enhanced readout samples, and to perform a storage operation related to reading data, using the enhanced readout samples.