Patent ID: 11520398

Abstract:
A processor system and method is described. The processor system includes a central processing unit (CPU) comprising a register for storing a stack pointer value, a non-volatile memory coupled to the CPU and having a first non-volatile memory region configured to store instructions executable by the CPU and a second non-volatile memory region configured to store a RAM-image comprising program context data. The processor system includes a random-access memory (RAM) coupled to the CPU and having a first RAM region and a second RAM region. The processor system is configured to have a first operating mode where the RAM data values are not retained and a second operating mode where the RAM is powered on. In operation, the processor system changes from the first operating mode to the second operating mode by applying power to the RAM, setting the stack pointer value to an address in the second RAM region, copying the program context data from the second non-volatile memory region to the first RAM region, and setting the stack pointer value to an address within a segment of the first RAM region.