Patent ID: 11209990

Abstract:
An apparatus including a control unit, a memory having computer program code, and N groups of storage units electrically connected to the control unit is disclosed. Each of the N groups of storage units has N storage units, each of the N storage units has N storage regions, wherein N is a positive integer. The memory and the computer program code configured to, with the control unit, cause the apparatus to perform: storing a first data segment into an ith storage region of a first storage unit of a kth group of storage units; storing a fourth data segment into an ith storage region of a first storage it of a (k+1)th group of storage units; storing a fifth data segment into an ith storage region of a second storage unit of the (k+1)th group of storage units; and storing a sixth data segment into an ith storage region of a third storage unit of the (k+1)th group of storage units. Wherein the first data segment is associated with the fourth data segment, the first data segment is independent of the fifth data segment, and the first data segment is independent of the sixth data segment.