Patent ID: 10249621

Abstract:
A method of limiting plasma charging damage on ICs. A die includes gate stacks on active areas defined by a field dielectric. A pre-metal dielectric (PMD) layer is over the gate electrode. A contact masking material pattern is defined on the PMD layer including first contact defining features for forming active contacts and second contact defining features for forming dummy contacts (DC's) including over active areas and gate electrodes. Contacts are etched through the PMD layer using the contact masking material pattern to form active contacts and DC's. A patterned metal 1 (M1) layer is formed including first M1 portions over the active contacts and dummy M1 portions over the DC's. Metallization processing follows including forming interconnects so that the active contacts are connected to MOS transistors on the IC, and the DC's are not electrically connected to the MOS transistors.