Patent ID: 10679902

Abstract:
Semiconductor device and fabrication method are provided. The method includes: forming a first work function metal layer and a first gate electrode on the first work function metal layer in a first trench; forming a second work function metal layer and a second gate electrode on the second work function metal layer in a second trench; forming a first recess between the first gate electrode and a first dielectric layer by etching a portion of the first work function metal layer and a first high-k dielectric layer along the sidewalls of the first trench; forming a second recess between the second gate electrode and the first dielectric layer by etching a portion of the second work function metal layer and a second high-k dielectric layer along the sidewalls of the second trench; forming a first protection layer in the first recess and a second protection layer in the second recess; and polishing surfaces of the first dielectric layer, the first protection layer and the second protection layer using the first gate electrode and the second gate electrode as a stop layer.