Patent ID: 10475825

Abstract:
The invention provides a TFT backplane and manufacturing method thereof, wherein the TFT backplane comprises a substrate (1); a gate (11) and a first metal electrode (21) formed on the substrate (1); a gate insulating layer (31) formed on the substrate (1) and covering the gate (11) and the first metal electrode (21), the gate insulating layer (31) on the first metal electrode (21) having a thickness less than thickness of the gate insulating layer (32) on the gate (11); an etch stop layer (ESL) (5) on the gate insulating layer (31) and a second metal electrode (22) on the ESL (5). Only a portion of the gate insulating layer deposited on the first metal electrode is etched away, and the first metal electrode always protects the gate insulating layer, so that the first metal electrode is not damaged by the etching gas, favorable for the final storage capacitor.