Patent ID: 10158027

Abstract:
A semiconductor device (100) includes a thin film transistor (5) provided on a substrate and including a gate electrode (12), a gate insulating layer (20) in contact with the gate electrode, an oxide semiconductor layer (18) located so as to partially overlap the gate electrode with the gate insulating layer being located between the oxide semiconductor layer and the gate electrode, a source electrode (14), and a drain electrode (16). The oxide semiconductor layer (18) includes a gate facing region (18g) overlapping the gate electrode as seen in a direction of normal to the substrate; and offset regions (18os, 18od) provided adjacent to the gate facing region, the offset regions not overlapping the gate electrode, the source electrode or the drain electrode as seen in the direction of normal to the substrate. The gate facing region has a carrier concentration in the range of 1×1017/cm3 or greater and 1×1019/cm3 or less.