Patent ID: 11627005

Abstract:
In an embodiment, a powered device (PD) interface circuit includes a lower priority PD and a higher priority PD. The lower priority PD is configured to receive, and to couple to a power supply onboard a subsystem, a first power signal from first power source equipment (PSE). And the higher priority PD is configured to receive a second power signal from second PSE, to couple the second power signal to the power supply, and to prevent the lower priority PD from coupling the first power signal to the power supply while the higher priority PD is coupling the second power signal to the power supply. That is, such a PD interface circuit is configured to impart a respective priority to each PD such that if two or more PDs receive power from respective PSEs, then the interface circuit enables only the PD having the higher priority to couple a corresponding PSE power signal to the power supply onboard the subsystem.