Patent ID: 10192905

Abstract:
The present disclosure relates to a manufacturing method of array substrates, wherein a second masking process forming an active layer, a source electrode and a drain electrode further includes: forming a semiconductor thin-film layer, N+ doping thin-film layer, a metal thin-film layer, and a photo-resistor layer on a gate insulation layer in sequence; applying a gray-tone-mask process to expose and develop the photo-resistor layer to obtain a first photo-resistor mask; applying a first wet etching process and a first dry etching process to etch the metal thin-film layer, the semiconductor thin-film layer, and the N+ doping thin-film layer; applying a plasma ashing process to the first photo-resistor mask to obtain a second photo-resistor mask; applying a second wet etching process to etch the metal thin-film layer; and peeling off the second photo-resistor mask, applying a second dry etching process to etch the N+ doping thin-film layer. The present disclosure also relates to the array substrate formed by the above manufacturing method and the display device having the array substrate.