Patent ID: 11276764

Abstract:
A device including a semiconductor die, a first contact, a second contact, a third contact, a first passivation layer, a second passivation layer and an interconnect metal. The semiconductor die may include a plurality of semiconductor layers disposed on a GaAs substrate. The first contact may be electrically coupled to a semiconductor emitter layer. The second contact may be electrically coupled to a semiconductor base layer. The third contact may be electrically coupled to a semiconductor sub-collector layer. The first passivation layer may cover one or more of the semiconductor and the contacts. The first passivation layer may comprise an inorganic insulator. The second passivation layer may comprise an inorganic insulator or organic polymer with low dielectric constant deposited on the passivation layer. The interconnect metal may be coupled to the first contact and separated from the first passivation layer by the second passivation layer.