Patent ID: 10615082

Abstract:
Forming a PFET work function metal layer on a p-type field effect transistor (PFET) fin in a PFET region and on an n-type field effect transistor (NFET) fin in an NFET region, removing a portion of the PFET work function metal layer between the PFET fin and the NFET fin, thinning the PFET work function metal layer, patterning an organic planarization layer on the PFET work function metal layer, where the organic planarization layer covers the PFET region and partially covers the NFET region, removing the PFET work function metal layer in the NFET region, by etching isotropically selective to the organic planarization layer and an insulator in the NFET region, removing the organic planarization layer, and conformally forming an NFET work function metal layer on the semiconductor structure.