Patent ID: 10468533

Abstract:
A semiconductor device includes at least one thin film transistor (100, 200), the at least one thin film transistor including a semiconductor layer (3A, 3B) which includes a channel region (31A, 31), a high-concentration impurity region, and a low-concentration impurity region (32A, 32B) which is located between the channel region and the high-concentration impurity region, a gate electrode (7A, 7B) provided on a gate insulating layer (5), an interlayer insulating layer (11) provided on the gate electrode, and a source electrode (8A, 8B) and a drain electrode (9A, 9B), wherein the interlayer insulating layer and the gate insulating layer have a contact hole extending to the semiconductor layer, at least one of the source electrode (8A, 8B) and the drain electrode (9A, 9B) being in contact with the high-concentration impurity region inside the contact hole, at a side wall of the contact hole, a side surface of the gate insulating layer is aligned with a side surface of the interlayer insulating layer, and at an upper surface of the semiconductor layer, an edge of the contact hole aligned with an edge of the high-concentration impurity region.