Patent ID: 10019173

Abstract:
A memory system includes a memory device comprising a plurality of memory blocks each memory block having N word line groups, N being a natural number equal to or more than 2; and a controller suitable for: selecting bad memory blocks among the memory blocks; arranging normal word line groups of the selected bad memory blocks into one or more memory-block-word-line groups each including non-conflicting N normal word line groups; and managing each of the memory-block-word-line groups as a reused memory block, the controller manages a reused block mapping table including a plurality of entries respectively corresponding to the memory-block-word-line groups, the reused block mapping table includes a plurality of logical addresses respectively corresponding to the entries, and each of the entries includes a plurality of physical address values respectively corresponding to the selected bad memory blocks having the normal word line groups included in the corresponding memory-block-word-line group.