Patent ID: 10804852

Abstract:
To provide a high-voltage output amplifier having a wide bandwidth which can efficiently reduce power consumption and allows employment of relatively low withstand voltage Nch MOS FETs without imbalanced voltage distribution between a Nch MOS FET Q101 and a Nch MOS FET Q102 and imbalanced distribution between a Nch MOS FET Q201 and a Nch MOS FET Q202. A high-voltage amplifier of a positive-side output stage circuit comprises a Nch MOS FET Q101 and a Nch MOS FET Q102, while a high-voltage amplifier of a negative-side output stage circuit comprises a Nch MOS FET Q201 and a Nch MOS FET Q 202. The source of the Nch MOS FET Q101 is connected to the drain of the Nch MOS FET Q102, the source of the Nch MOS FET Q201 is connected to the drain of the Nch MOS FET Q202. Current controls at the source of the Nch MOS FET Q102 and the source of the Nch MOS FET Q202 are conducted respectively. The current control at the source of the Nch MOS FET Q202 is conducted by a negative-side photo coupler. The gate of the Nch MOS FET Q101 and the gate of the Nch MOS FET Q201 are connected via a condenser C151.