Patent ID: 10950686

Abstract:
The terminal pattern TP1 of the wiring substrate PB has a side T1a facing the terminal pattern TP2 and the terminal pattern TP2 of the wiring substrate PB has a side T2a facing the side T1a of the terminal pattern TP1. The side T1a and the side of T2a are exposed from the opening portion OP1 and OP2 of the solder resist layer SR1 respectively, and outer peripheries of terminal patterns TP1 and TP2 other than sides T1a and T2a are not exposed from opening portions OP1 and OP2. The opening portion OP1 and the opening portion OP2 are separated from each other. The electrode E1 of the capacitor C1 is soldered to the terminal pattern TP1 exposed from the opening portion OP1, and the electrode E2 of the capacitor C1 is soldered to the terminal pattern TP2 exposed from the opening portion OP2.