Patent ID: 11539348

Abstract:
A circuit comprises a power source, an Open Loop Reactance Matching Circuit Control Signal Generator (OLRMCCSG), an Open Loop Reactance Matching (OLRM) circuit, and a load. The power source supplies an input voltage and an input current used to drive the load. The load is an inductive type load or a capacitive type load. If the power source operates as a voltage source, then the OLRMCCSG uses input voltage information to control the OLRM circuit to generate a reactance matching voltage that is phase delayed with respect to the input voltage. If the power source operates as a current source, then the OLRMCCSG uses input current information to control the OLRM circuit to generate a reactance matching current that is phase delayed with respect to the input current. The reactance matching voltage or the reactance matching current causes the input voltage and the input current to be in phase.