Patent ID: 11676861

Abstract:
The present application discloses method for fabricating a semiconductor device. The method includes providing a substrate; forming a word line trench in the substrate; conformally forming a first insulating layer in the word line trench and conformity forming a first barrier layer on the first insulating layer; conformally forming a first nucleation layer on the first barrier layer; performing a post-treatment to the first nucleation layer, wherein the post-treatment comprises a reducing agent comprising diborane and a tungsten-containing precursor; forming a first bulk layer on the first nucleation layer, wherein the first nucleation layer and the first bulk layer configure a first conductive layer; and performing a planarization process to turn the first insulating layer, the first barrier layer, and the first conductive layer into a word line insulating layer, a word line barrier layer, and a word line conductive layer, respectively and correspondingly.