Patent ID: 11360713

Abstract:
The present invention monitors read data or write data of a CPU without generating any influences on an execution operation of a program.An LSI includes: a processing unit, executing a program; a storage unit, capable of performing a read operation or a write operation; and an internal bus, connected to the processing unit and the storage unit; and a monitoring unit (21). The processing unit is capable of performing a read access or a write access, the read access is outputting a read enable signal (RE) and an address signal (ADD) to the internal bus, and the write access is outputting write data (WD), a write enable signal (WE) and the address signal to the internal bus. The storage unit outputs the read data to the internal bus in response to the read access and stores the write data in response to the write access. The monitoring unit latches the read data or the write data to be sent through the internal bus when an access meeting a set monitoring condition is present.