Patent ID: 10090408

Abstract:
A SJ-MOSFET includes a parallel pn layer in which an n-type drift region and a p-type partition region are alternately arranged repeatedly along a direction parallel to a base main-surface. The n-type drift region and the p-type partition region have total impurity amounts that are roughly the same and widths that are basically constant over an entire depth direction. The n-type drift region is configured to have an n-type impurity concentration profile in which an impurity concentration of a portion on the drain-side is higher than an impurity concentration of a portion on the source-side by ΔCnx. The p-type partition region is configured to have a p-type impurity concentration profile in which an impurity concentration of a portion on the drain-side is higher than an impurity concentration of a portion on the source-side by ΔCph, and an impurity concentration of part of the portion on the source-side is relatively low.