Patent ID: 10332891

Abstract:
A static random access memory includes a substrate, fins on the substrate and including a first fin for a first pull-up transistor, a second fin for a second pull-up transistor, a third fin for a first pass-gate transistor and a first pull-down transistor, and a fourth fin for a second pass-gate transistor and a second pull-down transistor, dummy fins on the substrate, gate structures on the fins for forming transistors, first and second recesses in the fins on opposite sides of the gate structures, third recesses in the dummy fins, a first epitaxial region in the first recess, a second epitaxial region in the second recess, a third epitaxial region in the third recess, a merged epitaxial region including the third epitaxial region and the first epitaxial region or the third epitaxial region and the second epitaxial region, and a contact member on the merged epitaxial region.