Patent ID: 10169516

Abstract:
Embodiments include methods, processing systems and computer program products for extracting via capacitance. Aspects include placing various shapes of target nets of an IC into a Cshapes collection and a CshapesVia collection, processing the shapes in these collections and placing the processed shapes into a Ctile collection and a CtilesVia collection, and extracting via capacitance of the target nets through each of Cshapes, CshapesVia, Ctiles, and CtilesVia collections. In exemplary embodiments, the processing operation includes: reducing the complexity of the shapes in the shape collections, removing all overhang shapes, and all overlapped shapes from the shape collections, and unioning the shapes in the Cshapes collection and the CshapesVia collection, respectively. Unioning operation includes: unioning shapes from Cshapes collection into a non-overlapping Ctiles collection, unioning shapes from CshapesVia collection into a non-overlapping CtileVia collection, computing the tile intersections of Cshapes collection and CshapesVia collection, and removing intersections from CshapesVia collection.