Patent ID: 10381272

Abstract:
A method of forming a three-dimensional transistor device may include performing a first blanket deposition of a first work function metal over a first nanowire stack, having a first polarity, and over a second nanowire stack having a second polarity, in a complementary metal oxide semiconductor (CMOS) nanosheet device structure, disposed on a substrate. The method may include directing angled oxygen ions at the CMOS nanosheet device structure. As a result an oxide may be formed in the first work function metal along a top region of the first nanowire stack and the second nanowire stack, while an oxide is not formed in the first work function metal at a bottom of a trench between the first nanowire stack and the second nanowire stack. The method may include performing a vertical etch to selectively remove the first work function metal between the first nanowire stack and the second nanowire stack.