Patent ID: 11463053

Abstract:
In some embodiments, a circuit includes: a first chopping circuit configured to receive an input signal and generate a modulated signal responsive to the input signal; first and second input capacitors selectively coupled to receive a modulated signal or a common-mode voltage; an amplifier having an input and an output, the input coupled to the first and second input capacitors; an auto-zeroing circuit comprising one or more auto-zeroing feedback capacitors selectively coupled between the amplifier input and output; a gain selection circuit comprising one or more gain selection feedback capacitors coupled to the amplifier input and selectively coupled to the amplifier output or the common-mode voltage; an offset compensation circuit comprising one or more offset capacitors coupled to the amplifier input and selectively coupled to a reference voltage or the common-mode voltage; and a second chopping circuit configured to generate a demodulated signal responsive to the amplifier output.