Patent ID: 10110346

Abstract:
Forward Error Correction (FEC) is an essential component of most digital communication systems. The decoders for the FEC perform better when working in soft-decision mode using the Log Likelihood Ratios (LLRs) as the input. Spatial Multiplexing (SM) with Multiple Input Multiple Output (MIMO) is used in many systems for providing high data rate. When SM-MIMO is used in conjunction with FEC, it is important for SM-MIMO decoders to provide soft channel bits to the FEC decoder. The complexity of the SM-MIMO decoders is generally very high, especially when LLRs need to be generated for each bit of the decoded symbol. Conventional methods for LLR generation in SM-MIMO decoders require the storage and sorting of partial and cumulative distance. A method and apparatus are disclosed that compute the LLRs on the fly without requiring extensive storage or sorting of partial and cumulative distance metrics.