Patent ID: 10439071

Abstract:
The present disclosure relates to a TFT including a gate on a substrate; a gate insulation layer on the substrate and the gate, and a surface of the gate insulation layer being applied with a flattening process; an oxygen-rich layer on the gate insulation layer; an active layer on the oxygen-rich layer; a source and a drain on the active layer; and a passivation layer on the active layer, the source, and the drain. In addition, the present disclosure also relates to a manufacturing method of the TFTs and the array substrate having the TFTs. By applying the flattening process to the surface of the gate insulation layer and by forming the oxygen-rich layer on the gate insulation layer, the surface of the gate insulation layer is smooth so as to eliminate the oxygen vacancy defects on the surface of the gate insulation layer. Thus, the surface state of the gate insulation layer is stable.