Patent ID: 11342844

Abstract:
Circuit comprising: a first switch (1S) having: a first side (FS) connected to an input node (IN); and a second side (SS); a first capacitor (FC) having: FS connected to SS of 1S; and SS; a second switch having: FS connected to SS of FC; and SS connected to a voltage level node; a third switch having: FS connected to SS of FC; and SS connected to a voltage output node; a fourth switch (4S) having: FS connected to IN; and SS; a second capacitor (SC) having: FS connected to SS of 4S; and SS; a fifth switch having: FS connected to SS of SC; and SS connected to the voltage level node; a sixth switch having: FS connected to SS of SC; and SS connected to the voltage output node; a first connection node connected to FS of FC; and a second connection node connected to FS of SC.