Patent ID: 10424752

Abstract:
Electrical device comprising a field effect transistor (FET). The FET includes a substrate with a channel region thereon, the channel region including a film of single-walled carbon nanotubes located on the substrate, metallic source and drain electrodes layers on the channel region and gate structure covering a portion of channel region and located between the metallic source and drain electrode layers. The gate structure includes a gate dielectric layer on the portion of the channel region and a gate electrode layer on the gate dielectric layer. Other non-gate-covered portions of the channel region are located between the source electrode layer and the gate structure and between the drain electrode layer and the gate structure. The FET includes a stoichiometrically oxygen-reduced silicon oxide layer contacting the non-gate-covered portions of the channel region, wherein the stoichiometrically oxygen-reduced silicon oxide composition includes SiOx where x has a value of less than 2.