Patent ID: 10002868

Abstract:
Semiconductor devices and methods are provided in which vertical fin resistor devices are integrally formed as part of a process flow for fabricating FinFET (Fin Field Effect Transistor) devices. For example, a semiconductor device includes a FinFET device and a vertical fin resistor device formed on a semiconductor substrate. The FinFET device includes a vertical semiconductor fin which includes a structural profile that is defined by dimensions of width W, height H, and length L. The vertical fin resistor device includes a vertical fin structure which is formed of a resistive material (e.g., polysilicon or amorphous silicon), and which has a structural profile that is defined by dimension of width W1, height H1, and length L1. The structural profiles of the vertical semiconductor fin of the FinFET device and the vertical fin structure of the vertical fin resistor device have at least one corresponding dimension that is substantially the same.