Patent ID: 10062581

Abstract:
A method of forming an isolation structure, wherein a hard mask is formed on a first region and a second region of a substrate; the substrate is etched using the hard mask as an etching mask to form a plurality of first active patterns in the first region and a plurality of second active patterns in the second region, a first trench between the first active patterns having a first trench width, and a second trench between the second active patterns having a second trench width smaller than the first trench width; a first oxide layer is formed on the hard mask and the first and second trenches; the first oxide layer is conformally formed on an inner wall of the first trench and filling the second trench; a polysilicon layer is conformally formed on the first oxide layer and a spin-on-dielectric (SOD) layer is formed on the polysilicon layer to fill the first trench; and the SOD layer and the polysilicon layer are annealed using an oxygen-containing gas so that the SOD layer and the polysilicon layer are transformed into a second oxide layer and a third oxide layer, respectively, in the first trench, resulting in a semiconductor device with an isolation structure with good isolation characteristics.