Patent ID: 11741876

Abstract:
A display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a driving module. The driving module includes a driving transistor. A time period of one frame of the display panel includes a non-light-emitting stage and a light-emitting stage. The non-light-emitting stage includes a bias adjustment stage. A source or a drain of the driving transistor is configured to receive a bias adjustment signal in the bias adjustment stage. An operation state of the pixel circuit includes a first mode and a second mode. A time length of the non-light-emitting stage in the first mode is L1. A time length of the non-light-emitting stage in the second mode is L2. L1>L2. A time length of at least one sub-bias adjustment stage in a first frame is equal to a time length of at least one sub-bias adjustment stage in a second frame.