Patent ID: 10651846

Abstract:
A driver circuit (DRV1) includes a pull-up circuit (PU1) and a pull-down circuit (PD1) that share an output node (external terminal (T3)). A signal (DI1 (DI2)) input to the pull-up circuit (PU1) and a signal (DI3) input to the pull-down circuit (PD1) are selected in a complementary manner, and the output node outputs an output signal in which rising time and falling time of the signals (DI1 (DI2) and DI3) are adjusted in accordance with on-off operation of the signals. The rising time is adjusted by transistors (M1 and M2) and a resistor (R1), while the falling time is adjusted by transistors (M3, M4 and M5) and a resistor (R2).