Patent ID: 11251106

Abstract:
The invention discloses a packaging structure and manufacturing method of a SiC MOSFET module, which is composed of SiC MOSFET chips, upper DBC substrate, lower DBC substrate, ceramic interposer, silicon oxide dielectric layer, nano silver pastes, redistribution layer, through-ceramic-hole conductive metals and power terminals. The SiC MOSFET chips are connected to the lower DBC substrate using nano silver pastes in the invention. Besides, some rectangular frames are made on the ceramic interposer, and the SiC MOSFET chips are embedded in the ceramic interposer by filling dielectric materials. The upper surfaces of the chips and the ceramic interposer are covered with a conductive metal redistribution layer, and the upper and lower surfaces of the ceramic interposer are interconnected with the upper and lower DBC substrates, respectively. The power terminals are led out from the conductive copper layers of the upper and lower DBC substrates. This invention can realize the high-temperature packaging of SiC MOSFET modules. By introducing double-sided heat dissipation, the thermal performance can be improved effectively. The parasitic inductance of the module can be also reduced by using planar interconnection instead of wire bonding.