Patent ID: 10110996

Abstract:
The DC detection circuit includes: a OR circuit configured to generate a logical OR flag on the basis of logical OR of values of X bits from a (MSB-1)th bit to a (MSB-X)th bit of input data; a NAND circuit configured to generate a NAND flag on the basis of a NAND of values of X bits from the (MSB-1)th bit to the (MSB-X)th bit of the input data; a counter configured to count up and a counter value which outputs a DC detection flag if a counter value is exceeds predetermined set value on the basis of the MSB and any one of the logical OR flags of NAND flags. Accordingly, safety can be secured by detecting whether the DC data is included in the input PCM data, and thereby preventing degradation and breakage of the loudspeaker etc. due to the DC data.