Patent ID: 11657347

Abstract:
Systems and methods including one or more processors and one or more non-transitory storage devices storing computing instructions configured to run on the one or more processors and perform: executing a greedy incremental batcher loop, which can comprise: selecting a first picklist of one or more picklists; and merging the first picklist with one or more picklists in a first remainder of the one or more picklists when the merging would decrease a cost of the first picklist, wherein the first remainder of the one or more picklists comprises the one or picklists excluding the first picklist; executing a randomized tote local search loop, which can comprise: selecting two random picklists of the one or more picklists, as merged; and swapping totes of the two random picklists of the one or more picklists, as merged, when the swapping would decrease a cost of at least one picklist of the two random picklists; executing an update min trolley loop, which can comprise: selecting a shortest picklist of the one or more picklists, as merged and swapped; and combining the shortest picklist with at least one picklist of the one or more picklists, as merged and swapped, wherein a combination picklist of the shortest picklist and the at least one picklist results in a savings of cost; and facilitating displaying the combination picklist and the one or more picklists, as merged and swapped, to a picker. Other embodiments are disclosed herein.