Patent ID: 10224305

Abstract:
In order to inhibit defective connection between a bump of a semiconductor chip and an electrode pad of a substrate, a semiconductor device includes a substrate provided on a surface with a plurality of electrode pads 15, a semiconductor chip 20 provided on a surface with a plurality of bumps 21 substantially equal in size, and an anisotropic conductive film 30 interposed between the plurality of bumps 21 and the plurality of electrode pads 15 and electrically connecting each of the bumps 21 and corresponding one of the electrode pads 15. The plurality of electrode pads 15 includes a plurality of first electrode pads 15A positioned closest to an end 25 of the semiconductor chip 20, and a plurality of second electrode pads 15B positioned inside the plurality of first electrode pads 15A on the semiconductor chip 20. Each of the second electrode pads 15B is larger in area than each of the first electrode pads 15A.