Patent ID: 10672872

Abstract:
A method of forming a semiconductor structure includes forming a semiconductor layer stack over a substrate. The stack includes a collector layer of silicon (Si) providing a collector region for one or more bipolar junction transistors (BJTs), an emitter layer of Si providing an emitter region for the BJTs, a base layer of (SiGe) with a first germanium percentage (Ge %) providing a base region for the BJTs, and at least one additional layer of SiGe with a second Ge %. The method also includes forming vertical fins in the stack, and forming a germanium oxide (GeOx) layer over the vertical fins. The method further includes performing a thermal anneal to react at least a portion of the GeOx layer with SiGe having one of the first and second Ge % to form a self-alignment layer providing self-alignment for at least one contact to the base layer.