Patent ID: 10628057

Abstract:
An example computing system may include a plurality of processors, persistent memory that is shared by the plurality of processors, and a memory-side accelerator that is to control access to the memory. A requesting processor of the plurality of processors may simultaneously request locking of and access to a target data object of the persistent memory by sending a single lock-and-access message to the memory-side accelerator. The lock-and-access message may include a first memory capability pointing to the target data object, a second memory capability pointing to a lock object that controls locking of the target data object, and a specified access operation that is requested. The memory-side accelerator may, in response to receiving the lock-and-access message: fetch locking information that is stored in the lock object pointed to by the second memory capability, and determine, based on the locking information, whether to lock and perform the requested access operation on the target data object pointed to by the first memory capability for the requesting processor.