Patent ID: 10997089

Abstract:
A computing device with a multicore processing unit and a memory management unit (MMU) may provide multi-order failure resistant data isolation and segregation with a cross domain filtration system. The multicore processing unit may include a first processor, a second processor, and a third processor. A first processor may process data via an egress filter task(s). The MMU may allow the egress filter task(s) to write the data to a first segregated physical memory location. A second processor may perform filtering of the data via a cross domain filter task(s). The MMU may allow the cross domain filter task(s) to read from the first segregated physical memory location and write to a second segregated physical memory location. A third processor may process the data via an ingress filter task(s). The MMU may allow the ingress filter task(s) to read the data from the second segregated physical memory location.