Patent ID: 10951174

Abstract:
A transistor (2) is provided on a surface of a semiconductor substrate (1). First and second wirings (10,11) are provided on the surface of the semiconductor substrate (1) and sandwich the transistor (2). Plural wires (20) pass over the transistor (2) and are connected to the first and second wirings (10,11). A sealing material (21) sealing the transistor (2), the first and second wirings (10,11), and the plural wires (20). The sealing material (21) contains a filler (21a). An interval distance between the plural wires (20) is smaller than a particle diameter of the filler (21a). The sealing material (21) does not intrude into a space between the plural wires (20) and the transistor (2) so that a cavity (22) is formed.