Patent ID: 11881859

Abstract:
A circuit includes an inverter coupled between an input and an output. The inverter includes first and second pull-down transistors having control terminals coupled to the input, a pull-up resistor, and a pull-up transistor having a control terminal coupled to the input. The first and second pull-down transistors are coupled in series along a pull-down path extending between a first voltage supply terminal and the output. The pull-up resistor and pull-up transistor are coupled in series along a pull-up path extending between a second voltage supply terminal and the output. A hysteresis transistor has a control terminal coupled to the output. The hysteresis transistor is coupled to the inverter along a hysteresis path extending between the first voltage supply terminal and the pull-up path. A clamp circuit is coupled to the inverter along a clamp path extending between the first voltage supply terminal and the pull-down path.