Patent ID: 10043826

Abstract:
Certain aspects of the present disclosure generally relate to a semiconductor device. The semiconductor device generally includes a substrate, a first non-insulative region disposed above the substrate, and a second non-insulative region disposed above the first non-insulative region, wherein the first and second non-insulative regions have the same doping type and different doping concentrations. In certain aspects, the semiconductor device also includes a first dielectric layer, a channel region, the first dielectric layer being disposed adjacent to a first side of the channel region, a second dielectric layer disposed adjacent to a second side of the channel region, and a third non-insulative region disposed above the second dielectric layer. In certain aspects, the semiconductor device also includes a fourth non-insulative region disposed adjacent to a third side of the channel region, and a fifth non-insulative region disposed adjacent to a fourth side of the channel region.