Patent ID: 10497703

Abstract:
At least one method, apparatus and system disclosed involves forming a finFET device having silicon and silicon germanium fins. The method includes: forming an n-doped and a p-doped region in a semiconductor wafer; forming a layer of silicon above both the those regions; removing a portion of the silicon layer above the p-doped region to create a first recess; forming a layer of silicon germanium in the first recess; etching away at least a portion of the silicon layer and the underlying p-doped region; etching away at least a portion of the silicon germanium layer and the underlying n-doped region; forming fins from the unetched silicon and silicon germanium layers; and forming a shallow trench isolation dielectric in the etched away portion of the silicon layer and the underlying p-doped region and in the etched away portion of the silicon germanium layer and the underlying n-doped region.