Patent ID: 10263004

Abstract:
The present disclosure relates to a method of forming sidewall spacers configured to improve dielectric fill between adjacent gate structures. In some embodiments, the method may be performed by depositing a sidewall spacer material over a first gate structure and a second gate structure. A first etching process is performed on the sidewall spacer material to form a first intermediate sidewall spacer surrounding the first gate structure and a second sidewall spacer surrounding the second gate structure. A masking material is formed over the substrate. Parts of the first intermediate sidewall spacer protrude outward from the masking material, while the second sidewall spacer is completely covered by the masking material. A second etching process is then performed on the parts of the first intermediate sidewall spacer protruding outward from the masking material to form a first sidewall spacer recessed below an uppermost surface of the first gate structure.