Patent ID: 10148194

Abstract:
A pulse-controlled inverter with a circuit providing a DC voltage between high-side and low-side inputs. In one example, the circuit includes a first high-side stray capacitance and inductance and a first low-side stray capacitance and inductance. A busbar arrangement is configured to connect the high-side input to a high-side connection and the low-side input to a low-side connection. The busbar arrangement includes a second high-side stray capacitance and inductance and a second low-side stray capacitance and inductance. An inverter module is coupled to the high-side connection and the low-side connection and configured to convert the DC voltage into an AC voltage. The inverter module has a third high-side stray capacitance and inductance and a third low-side stray capacitance and inductance. The sum of the first, second, and third high-side stray capacitance and inductance is substantially equal to the sum of the first, second, and third low-side stray capacitance and inductance.