Patent ID: 10363423

Abstract:
Circuitry for generating a compliance voltage (V+) for the current sources and/or sinks in an implantable stimulator device in disclosed. The circuitry assesses whether V+ is optimal for a given pulse, and if not, adjusts V+ for the next pulse. The circuitry uses amplifiers to measure the voltage drop across active PDACs (current sources) and NDAC (current sinks) at an appropriate time during the pulse. The measured voltages are assessed to determine whether they are high or low relative to optimal values. If low, a V+ regulator is controlled to increase V+ for the next pulse; if not, the V+ regulator is controlled to decrease V+ for the next pulse. Through this approach, gradual changes that may be occurring in the implant environment can be accounted for, with V+ adjusted on a pulse-by-pulse basis to keep the voltage drops at or near optimal levels for efficient DAC operation.