Patent ID: 11989133

Abstract:
Methods, systems, and devices for logical-to-physical (L2P) mapping compression techniques are described. A memory system may use an L2P mapping to map logical addresses to physical addresses of the memory system. The L2P mapping may be a hierarchical L2P mapping divided into multiple levels or subsets that are used to identify a physical address corresponding to a logical address. The memory system may write data to a set of physical addresses that are consecutively indexed and may set a flag in an entry of a second-level of the L2P mapping (e.g., of a three-level L2P mapping) to indicate that the entry is associated with a starting physical address of the consecutively indexed physical addresses. The memory system may subsequently read the data starting at the starting physical address based on the flag (e.g., bypassing reading an entry of a lowest-level of the L2P mapping to determine the physical address).