Patent ID: 11302379

Abstract:
A semiconductor apparatus according to an embodiment of the present invention includes: a plurality of semiconductor chips that are laminated; a plurality of penetration electrodes that penetrate in a lamination direction through the plurality of semiconductor chips and that electrically connect together the plurality of semiconductor chips; and a plurality of input/output elements that are configured to perform a signal input/output operation to the plurality of penetration electrodes, wherein the semiconductor chips are joined together via no bump, one of the plurality of input/output elements is connected to each of the plurality of penetration electrodes such that a functional element connected to each of the plurality of penetration electrodes performs an ON or OFF operation at a predetermined timing, and the input/output element connected to a first of two adjacent penetration electrodes among the plurality of penetration electrodes and the input/output element connected to a second of two adjacent penetration electrodes are configured to perform the signal input/output operation at a different timing from each other.