Patent ID: 11404210

Abstract:
The present disclosure is generally directed to utilizing capacitors stacks with capacitors mounted in a terminal-to-terminal mounting orientation to reduce overall footprint of capacitor arrays for bypass filtering circuits. In an embodiment, each capacitor stack includes at least a first capacitor, a second capacitor, and a ground plane interconnect. The first capacitor includes first and second terminals disposed opposite each other. The first terminal provides a mating surface to couple to the second capacitor, the second terminal couples to a ground plane. The second capacitor includes first and second terminals disposed opposite each other. The first terminal provides a mounting surface to electrically couple to and support the first capacitor, and the second terminal provides a mating surface to electrically and physically couple to the ground plane. Accordingly, the first capacitor can be inverted and mounted atop the second capacitor to eliminate the necessity of wire bonds, for example.