Patent ID: 10147632

Abstract:
A wafer processing laminate including support, temporary adhesive material layer formed on support, and wafer stacked on temporary adhesive material layer, wafer having front surface on which circuit is formed and back surface to be processed, wherein temporary adhesive material layer includes a three-layered complex temporary adhesive material layer that includes first temporary adhesive layer composed of thermoplastic organopolysiloxane polymer layer (A) having thickness of less than 100 nm and releasably laminated to front surface of wafer, second temporary adhesive layer composed of thermosetting siloxane-modified polymer layer (B) releasably laminated to first temporary adhesive layer, and third temporary adhesive layer composed of thermoplastic organopolysiloxane polymer layer (A′) having thickness of less than 100 nm, releasably laminated to second temporary adhesive layer, and releasably laminated to support. This wafer processing laminate can withstand thermal process at high temperature exceeding 300° C., and can increase productivity of thin wafers.