Patent ID: 10411030

Abstract:
A 3D memory device comprising: a substrate; at least one first group of at least three first U-shaped memory cells strings each including a first buried string portion, a first source line selector side string portion and a first bit line selector side string portion, wherein the first buried string portion is formed in the substrate and connects the first source line selector side string portion and the first bit line selector side string portion, each of the first U-shaped memory cells strings including memory cells stacks along the first source line selector side string portion and along the first bit line selector side string portion; and at least one second group of at least three second U-shaped memory cells strings each including a second buried string portion, a second source line selector side string portion and a second bit line selector side string portion. The second buried string portion is formed in the substrate and connects the second source line selector side string portion and the second bit line selector side string portion, each of the second U-shaped memory cells strings including memory cells stacks along the second source line selector side string portion and along the second bit line selector side string portion. The first and second source line selector side string portions are between the first and second bit line selector side string portions. The at least three first U-shaped memory cells strings are mutually co-planar and one surrounded by the other, and the at least three second U-shaped memory cells strings are mutually co-planar and one surrounded by the other.