Patent ID: 10262706

Abstract:
An anti-floating circuit including a first pull-high circuit, a first pull-low circuit and a first control circuit is provided. The first pull-high circuit includes a first P-type transistor and a second P-type transistor and is coupled to a first power terminal. The first pull-low circuit includes a first N-type transistor and a second N-type transistor and is coupled to a second power terminal. A first path is between the first P-type transistor and the first N-type transistor. A second path is between the second P-type transistor and the second N-type transistor. A third path is between the first P-type transistor and the second power terminal. In the first mode, the control circuit turns on the first and second paths and turns off the third path. In the second mode, the control circuit turns off the first and second paths and turns on the third path.