Patent ID: 11996054

Abstract:
Provided is a scan driver for applying a bias voltage comprising a kth stage that includes an inputter transmitting an input signal to a first node, a stress reliever disposed between the first node and a second node, a carry signal outputter receiving a high-power-supply voltage and a second clock signal and outputting the second clock signal, an output signal outputter receiving the high-power-supply voltage and a third clock signal and outputting the third clock signal, a maintainer transmitting the first clock signal to a third node, and a stabilizer applying a first low-power-supply voltage to the third node and the high-power-supply voltage to the first node. The first and second clock signals selectively toggle between the high-power-supply voltage and the first low-power-supply voltage, the third clock signal selectively toggles between the high-power-supply voltage and a second low-power-supply voltage, and the bias voltage is adjusted as the second low-power-supply voltage varies.