Patent ID: 10084699

Abstract:
Apparatus has at least one processor and at least one memory having computer-readable code stored therein which when executed controls the at least one processor to perform a method comprising: maintaining plural logical connections on a communications path; transmitting data packets on different ones of the logical connections; monitoring acknowledgements received in respect of the data packets transmitted over the different ones of the logical connections; reusing a logical connection for which an acknowledgement for a transmitted data packet has been received; creating a new logical connection when there is a data packet to transmit over the path and there are no logical connections available for reuse; and destroying excess logical connections. This can result in the maintenance and use of a number of logical connections that is most appropriate for the link conditions and the data transmission requirements, thereby potentially maximizing transmission speed and minimizing system resource requirements. Advantageously, one excess logical connection is retained. This contributes further to minimizing system resource requirements.