Patent ID: 11776954

Abstract:
Aspects of the present disclosure provide 3D semiconductor apparatus and a method for fabricating the same. The 3D semiconductor apparatus can include a first semiconductor device including first S/D regions, a first gate region sandwiched by the first S/D regions, and a first channel surrounded by the first S/D regions and the first gate region; a second semiconductor device stacked on the first semiconductor device that includes second S/D regions, a second gate region sandwiched by the second S/D regions, and a second channel surrounded by the second S/D regions and the second gate region and formed vertically in-situ on the first channel; and silicide formed between the first and second semiconductor devices where the first and second channels interface and coupled to an upper one of the first S/D regions of the first semiconductor device and a lower one of the second S/D regions of the second semiconductor device.