Patent ID: 10896139

Abstract:
The present disclosure describes technologies and techniques for use by a data storage controller (such as a non-volatile memory (NVM) controller) to emulate hardware registers in software and/or firmware. In illustrative examples, an arbiter of the NVM controller arbitrates inbound register accesses from a host. Regular register accesses from the host are directed by the arbiter along a regular hardware read path within the NVM controller to physical memory registers. Other transactions (e.g. writes to, or reads from, an undefined or reserved address space) are instead directed by the arbiter to the processor of the NVM controller for handling by software running on the processor (and/or by firmware). In this manner, new hardware registers added to an NVM standard may be implemented by software and/or firmware rather than hardware. Hence, the NVM controller may comply with new standard requirements without changing the hardware. NVMe examples are provided.