Patent ID: 10877543

Abstract:
The present disclosure provides implementations of a level shifter (LS), an integrated circuit, and a method. A LS may run in a first mode and a second mode, alternating with each other. The LS may include: an input unit that is configured to: transmit a first signal to a latch unit in the first mode, and be turned off in the second mode; a power supply switch unit that is configured to: transmit a first power supply voltage to the latch unit in the first mode, and transmit a second power supply voltage to the latch unit in the second mode, where the first power supply voltage is lower than the second power supply voltage; the latch unit that is configured to: latch the first signal in the first mode, change a level amplitude of the first signal from the first power supply voltage to the second power supply voltage in the second mode, and output a second signal whose logic is opposite to that of the first signal to an output unit; and the output unit that is configured to: isolate the second signal and output the second power supply voltage in the first mode, and output, in the second mode, a third signal whose logic is opposite to that of the second signal, where a level amplitude of the third signal is the second power supply voltage.