Patent ID: 11283542

Abstract:
An encoding circuit includes an allocator to allocate a symbol to bit-strings within a first frame, a converter to convert values of target-bit-strings that exclude a predetermined-bit-string so that, as a region within the constellation is closer to a center of the constellation, a number of symbols allocated in the region is larger, a generator to generate an error-correction-code of the bit-strings, and an insertion circuit to delay the error-correction-code and insert the error-correction-code in the predetermined-bit-string within a second frame that succeeds the first frame, wherein the allocator allocates, to the bit-strings, one symbol that corresponds to the values of the target-bit-strings, the one symbol being within a quadrant that corresponds to a value of the predetermined bit-string, and wherein the converter switches, based on the value of the predetermined-bit-string, association relationships between the values of the target-bit-strings before and after the conversion.