Patent ID: 11281397

Abstract:
A stacked memory device includes a plurality memory semiconductor dies, a plurality of through silicon vias, a function-in-memory (FIM) front-end circuit and a plurality of FIM back-end circuits. The buffer semiconductor die is configured to communicate with a host device. The memory semiconductor dies are stacked on the buffer semiconductor die, and include a plurality of memory banks. The through-silicon vias electrically connect the buffer semiconductor die and the memory semiconductor dies. The FIM front-end circuit receives a plurality of FIM instructions for a FIM operation from the host device, and stores the FIM instructions. The FIM operation includes data processing based on internal data read from the memory banks. The FIM back-end circuits are respectively included in the memory semiconductor dies. The FIM back-end circuits perform the FIM operation corresponding to the plurality of FIM instructions stored in the FIM front-end circuit under control of the FIM front-end circuit.