Patent ID: 11714125

Abstract:
A multi-bit flip-flop (MBFF) has flip-flops connected to form an internal scan chain. One of the flip-flops outputs a first data-out signal at a first data output terminal of the MBFF, and includes a selection circuit, a latch-based circuit, and a data-out stage circuit. The selection circuit transmits a data signal or a test signal to an output node of the selection circuit to serve as an input signal. The latch-based circuit generates a first signal according to the input signal. The data-out stage circuit receives the first signal, and generates the data-out signal according to the first signal. When the MBFF operates in a test mode, the selection circuit transmits the test signal to serve as the input signal, and the data-out stage circuit keeps the data-out signal at a fixed voltage level regardless of a voltage level of the test signal.