Patent ID: 11538793

Abstract:
A semiconductor structure includes a first substrate, a first semiconductor die, a second semiconductor die, and a multi-terminal multi-capacitor structure. The first substrate includes a wiring structure. The first semiconductor die and the second semiconductor die are disposed on the first substrate. The multi-terminal multi-capacitor structure is disposed on the first substrate and includes a second substrate, an insulating layer, a first multi-terminal capacitor, and a second multi-terminal capacitor. The insulating layer is disposed over the second substrate. The first multi-terminal capacitor is disposed over the insulating layer and electrically coupled to the first semiconductor die through the wiring structure. The second multi-terminal capacitor is disposed over the insulating layer and electrically coupled to the second semiconductor die through the wiring structure, wherein the first multi-terminal capacitor and the second multi-terminal capacitor are electrically isolated from the second substrate.