Patent ID: 10318723

Abstract:
A Central Processing Unit (CPU) comprising an internal Network-On-Chip (NOC) core and multiple internal System-On-Chip (SOC) cores communicates with external CPUs comprising external NOC cores and external SOC cores. The internal NOC core exchanges hardware trust data with the internal SOC cores and the external NOC cores to maintain hardware trust. The internal SOC cores execute Virtual Network Functions (VNFs) and responsively exchange user data with the internal NOC core for the NFV VNFs. The internal NOC core exchanges an allowed portion of the user data for the VNFs among the internal SOC cores and the external NOC cores. The internal NOC core blocks a disallowed portion of the user data to an internal SOC core or an external NOC core when hardware trust fails between the internal NOC core and the individual SOC core or NOC core.