Patent ID: 10411725

Abstract:
An analog-to-digital conversion circuit and method are provided. At a sampling stage, the first capacitor array connects lower electrode plates of N capacitors to a first input voltage, connect lower electrode plates of the other capacitors to a common-mode voltage, and connect upper electrode plates of all the capacitors to the common-mode voltage to sample the first input voltage; in an ith conversion at a conversion stage, the logic circuit controls, the lower electrode plate of an ith capacitor to connect to a reference voltage or a ground voltage, a first comparison voltage output by the first capacitor array approximates a second comparison voltage; and the comparator stores a comparison result between the first and the second comparison voltage to an i+1th flag bit in the logic circuit, and analog-to-digital conversion is completed when i+1 is equal to the total number of capacitors in the first capacitor array.