Patent ID: 11649525

Abstract:
A method for fabricating a single electron transistor is provided. A substrate includes a substantially planar surface with a source electrode, a drain electrode, and a gate electrode thereon, with the source and drain electrodes spaced apart from one another by a gap. The source electrode and the drain electrode are electrified, and a single nanometer-scale conductive particle is electrospray deposited in the gap. The single nanometer-scale conductive particle has an effective size of not greater than 10 nanometers. At least one carbon nanotube is deposited on the substrate and subjected to dielectrophoresis to position the carbon nanotube within 1 nanometer of the single nanometer-scale conductive particle. The at least one carbon nanotube establishes a first connection between the source electrode and the single nanometer-scale conductive particle and a second connection between the drain electrode and the single nanometer-scale conductive particle.