Patent ID: 11587836

Abstract:
A semiconductor structure and its fabrication method are provided in the present disclosure. The method includes providing a layer to-be-etched, including first regions and second regions. The method further includes forming a plurality of discrete first sacrificial layers on the layer to-be-etched, where a plurality of openings is between the plurality of first sacrificial layers and includes first openings on the first regions. The method further includes forming initial sidewall spacer structures on sidewalls of the plurality of first sacrificial layers, where the initial sidewall spacer structures include first sidewall spacers, and the first sidewall spacers fill the first openings. The method further includes, using the first sidewall spacers as an alignment mark, forming a first mask layer on the layer to-be-etched and the initial sidewall spacer structures, where the first mask layer exposes a portion of the layer to-be-etched and a portion of the initial sidewall spacer structures.