Patent ID: 10062750

Abstract:
An active region through which current flows in a semiconductor device includes an n−-type silicon carbide epitaxial layer formed on a front surface of an n+-type silicon carbide semiconductor substrate; a p-type layer becoming a channel region; a trench formed so as to be in contact with a p-type layer and having an oxide film and a gate electrode embedded therein; a p+-type layer arranged beneath the trench and between trenches; an n−-type layer in contact with the p-type layer, a p+-type layer, and the trench, and arranged in contact with a p+-type layer or on a surface side of the semiconductor substrate; an n-type layer in contact with the n−-type silicon carbide epitaxial layer and the p+-type layer, and having an impurity concentration higher than that of the n−-type layer and that of the n−-type silicon carbide epitaxial layer.