Patent ID: 11461101

Abstract:
Circuitry comprises processing circuitry to process program instructions, in which the program instructions are stored by storage circuitry and the processing circuitry comprises execute-in-place processing circuitry configured to execute the program instructions from the storage circuitry; a prefetch buffer to store program instructions for execution by the processing circuitry; prefetch circuitry to control prefetching of program instructions to the prefetch buffer and to select a next instruction for prefetching; and replacement circuitry to control deletion of instructions from the prefetch buffer to provide storage for newly prefetched program instructions; in which one or both of the prefetch circuitry and the replacement circuitry are configured so that one or both of a selection operation by the prefetch circuitry of a next program instruction for prefetching, and a deletion operation to delete an instruction from the prefetch buffer by the replacement circuitry is dependent upon previously executed program instructions and a prediction of future program instructions to be executed.