Patent ID: 10797594

Abstract:
Power converter circuits, including DC-DC converter circuits, that conserve IC area by utilizing more area-efficient alternatives for measurement circuitry. Various embodiments include a power converter circuit including a charge pump having a plurality of stack-nodes VCXM and at least one multiplexor for coupling selected stack-nodes VCXM to a corresponding comparator circuit configured to output a signal indicative of a difference between a selected input to the multiplexor and a reference signal. The number of comparator circuits is less than (N−1)×M, where N is the conversion gain of the power converter circuit (i.e., the number of charge pump stages X plus one), and M is the number of parallel charge pump legs. Related methods include measuring voltages at stack-nodes VCXM in a charge pump, wherein the stack-nodes VCXM are selected by means of a multiplexor and an input to a comparator.