Patent ID: 10847520

Abstract:
A method for fabricating an SRAM includes forming a plurality of first fin structures, a plurality of second fin structures, and an isolation layer. Each first fin structure is adjacent to a second fin structure and includes a first replacement region exposed by the isolation layer. The method includes forming pull down (PD) transistors, including forming PD gate structures to partially cover the first fin structures; forming a fin sidewall film on sidewall surfaces of each first replacement region; forming a first PD dielectric layer, exposing each first replacement region, to cover sidewall surfaces of the fin sidewall film; removing the first replacement region and the fin sidewall film on sidewall surfaces of the first replacement region; and forming a first source/drain doped layer. The method also includes forming adjacent transistors, including forming a second source/drain doped layer in the second fin structures adjacent to the first source/drain doped layer.