Patent ID: 11184019

Abstract:
An analog-to-digital converter (ADC) with split-gate laddered-inverter quantizer is presented herein. The ADC converts, via the split-gate laddered-inverter quantizer, an analog input voltage into a digital output value. The split-gate laddered-inverter quantizer separately couples, during respective phases of a clock signal via respective capacitances, a reference voltage and an input voltage corresponding to the analog input voltage to P-type metal-oxide-semiconductor (PMOS) gates of a PMOS branch of the split-gate laddered-inverter quantizer and N-type metal-oxide-semiconductor (NMOS) gates of an NMOS branch of the split-gate laddered-inverter quantizer to optimize current flow at respective frequencies. Further, the split-gate laddered-inverter quantizer separately biases, during the respective phases of the clock signal, the NMOS gates and the PMOS gates at respective bias voltages to optimize the current flow at the respective frequencies.