Patent ID: 10984741

Abstract:
A display apparatus includes a display panel, a gate driving circuit, and a data driving circuit. The display panel includes N gate lines, M data lines, and a plurality of pixels connected to the N gate lines and the M data lines. The gate driving circuit sequentially drives K-th, (K+2)-th, (K+4)-th, (K+12)-th, (K+14)-th, (K+16)-th, (K+24)-th, . . . , (N−11)-th, (N−9)-th, and (N−7)-th gate lines during a first subframe period, (K+6)-th, (K+8)-th, (K+10)-th, (K+18)-th, (K+20)-th, (K+22)-th, (K+30)-th, . . . , (N−5)-th, (N−3)-th, and (N−1)-th gate lines during a second subframe period, (K+1)-th, (K+3)-th, (K+5)-th, (K+13)-th, (K+15)-th, (K+17)-th, (K+25)-th, . . . , (N−10)-th, (N−8)-th, and (N−6)-th gate lines during a third subframe period, and (K+7)-th, (K+9)-th, (K+11)-th, (K+19)-th, (K+21)-th, (K+23)-th, (K+31)-th, . . . , (N−4)-th, (N−2)-th, and N-th gate lines during a fourth subframe period. The data driving circuit drives the M data lines by outputting data signals to the M data lines.