Patent ID: 11961940

Abstract:
The present description concerns an optoelectronic device (300) including: a vertical stack of first (101) and second (105) semiconductor layers forming a PN junction, and of a third conductive layer (107) arranged on top of and in contact with the surface of the second layer opposite to the first layer; a peripheral trench (110) crossing the third (107) and second (105) layers, said trench laterally delimiting a portion of the third layer (107) and a portion of the second layer (105); in said trench (110), a conductive spacer (301) in contact with a lateral side of said portion of the third layer (107); and in said trench (110), an insulated conductive gate (113, 111) extending against a lateral side of the conductive spacer (301) and against a lateral side of said portion of the second layer.