Patent ID: 10473992

Abstract:
The present application discloses a display panel including an array substrate and an opposing substrate facing the array substrate; a data line layer having a plurality of data lines on the array substrate; a passivation layer on a side of the data line layer proximal to the opposing substrate; a sealant layer on a side of the passivation layer distal to the data line layer, sealing the array substrate and the opposing substrate together; the display panel having a first area enclosed by the sealant layer and a second area outside of the first area and the sealant layer; the plurality of data lines extending from the first area into the second area; and a common electrode layer on a side of the sealant layer distal to the passivation layer. The common electrode layer includes a portion having a plurality of connections, and a plurality of slits spaced apart from each other by the plurality of connections; the plurality of slits and the plurality of connections extending from the first area into the second area, each of the plurality of connections is between two adjacent slits; each of the plurality of connections has a first portion in the first area and a second portion in the second area.