Patent ID: 10048542

Abstract:
There are provided an array substrate and a method of manufacturing the same, a display panel and a display device. The array substrate includes a substrate and and an array region and a peripheral wire region formed on the substrate, peripheral wires in the peripheral wire region each including a plurality of vacancy patterns. Adjacent edges of the non-vacancy patterns of the peripheral wires define shielding regions such that the maximum circle region contained in the shielding regions has a maximum diameter of a first threshold value. The vacancy patterns of each of the peripheral wires have a total area of a second threshold value. The resistivity of the peripheral wire is in a range from 0 to 2.83×10−8 Ω·m. The embodiments of the present disclosure address problem in prior art that a peripheral wire blocks curing of the frame sealing glue in the display panel so that the frame sealing glue is cured insufficiently and throughout of the display panel is thus degraded.