Patent ID: 10859404

Abstract:
A magnetic revolution counter for the self-identification of error states includes magnetic domain wall conductors which are composed of open spirals or closed, multiply-wound loops, formed by a GMR layer stack or a sort magnetic layer of locally present TMR layer stacks and in which the magnetic 180° domain walls can be introduced and located, wherein a predefinable bijective magnetization pattern of domain walls and/or domain wall gaps is written in, and the associated signal levels thereof are stored in the form of signal level sequences in a first memory in tabular form, which is compared to tabular target value patterns of the signal level sequences stored in a second memory for each permissible revolution i (0≤i≤n), and a third memory is provided, in which tabular error target value patterns of deviations of signal level sequences, caused thereby, from regular signal level sequences stored in the second memory are stored.