Patent ID: 10158283

Abstract:
A PFC signal generation circuit which generates a PFC signal to control a PFC circuit including a first inductor L1 connected to a first switch NM1 and a second inductor L2 connected to a second switch NM2 includes: a counter 101 whose count value is cleared based on a first timing when a zero current of the first inductor L1 is detected; a counter clear control circuit 202 that clears the count value after waiting until a cycle lower limit is reached, when the first timing is below the cycle lower limit; a first control signal output unit 109 that outputs a first PFC signal to turn on the first switch NM1 at a timing when the count value is cleared; and a second control signal output unit 117 that outputs a second PFC signal to turn on the second switch NM2 based on a second timing when a zero current of the second inductor L2 is detected. This leads to an improvement in power factor correction by the PFC circuit.