Patent ID: 10840919

Abstract:
A clock data recovery circuit includes a phase detector (PD) having a data input, a second input, and an output. The circuit also includes a filter, first and second charge pumps, a voltage-controlled oscillator (VCO), and a frequency detector (FD). The first charge pump couples between the output of the PD and the filter. The VCO has first and second inputs and an output. The first input of the VCO couples to the filter, and the VCO output couple to the second input of the PD. The FD has a data input, a second input, and first and second outputs. The FD second output couples to the second input of the VCO. The FD data input couples to the data input of the phase detector, and the FD second input couples to the output of the VCO. The second charge pump couples between the FD first output and the filter.