Patent ID: 10573641

Abstract:
A TFT substrate includes a TFT, a patch electrode electrically connected to the TFT, a gate metal layer, a gate insulating layer, a source metal layer, a first insulating layer, and a patch metal layer including the patch electrode. The gate metal layer includes a plurality of gate connection wiring lines disposed in a non-transmission and/or reception region. The source bus lines SL are each electrically connected to one of the gate connection wiring lines via a conductor section. The conductor section is in contact with the gate connection wiring line in a second opening provided in the gate insulating layer and the first insulating layer and with the source bus line SL in a first opening provided in the first insulating layer. The patch metal layer further includes a first patch connection section located in the first opening and/or the second opening. The first patch connection section includes the conductor section or is disposed on the conductor section.