Patent ID: 10629613

Abstract:
A three-dimensional semiconductor device includes source-level material layers including a doped semiconductor source contact layer including boron atoms and n-type dopant atoms, an alternating stack of insulating layers and electrically conductive layers located over the source-level material layers, memory stack structures vertically extending through the alternating stack in which each of the memory stack structures comprises a memory film and a vertical semiconductor channel. Each vertical semiconductor channel includes a first region in which n-type dopants have a higher atomic concentration than boron atoms and a second region overlying the first region that includes boron atoms at a higher atomic concentration than n-type dopant atoms to provide a p-n junction at an interface with the first region. Boron atoms in the source-level p-doped layer and an underlying source-level sacrificial layer that is replaced with an n-doped source contact layer yields a sharp p-n junction at the source-select gate electrode layer.