Patent ID: 10700699

Abstract:
A digital-to-analog converter (DAC) includes input circuitry to receive a digital word of N bits, and an array of N bit processing units disposed in parallel. Each of the N bit processing units includes first switch circuitry to generate a first output state based on a first value of a received one of the N bits, and second switch circuitry to generate a second output state based on a second value of the received one of the N bits. The DAC also includes selectively enabled third switch circuitry to generate a conditional third output state.A voltage-mode driver includes input circuitry to selectively receive one of N bits of a digital word. First switch circuitry generates a first output state based on a first value of the received one of the N bits. Second switch circuitry generates a second output state based on a second value of the received one of the N bits. Selectively enabled third switch circuitry generates a conditional third output state.