Patent ID: 11741877

Abstract:
A display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a driving module. The driving module includes a driving transistor. A time period of one frame of the display panel includes a non-light-emitting stage and a light-emitting stage. The non-light-emitting stage includes a bias adjustment stage. A source or a drain of the driving transistor is configured to receive a bias adjustment signal in the bias adjustment stage. In response to a frame refresh rate of the display panel being F1, a time length of the non-light-emitting stage is A1, and a time length of the bias adjustment stage is B1. In response to the frame refresh rate of the display panel being F2, the time length of the non-light-emitting stage is A2, and the time length of the bias adjustment stage is B2. F1<F2. B1/A1>B2/A2 or B1>B2.