Patent ID: 10388519

Abstract:
A semiconductor device includes a substrate having a working surface, and a plurality of field effect transistor (FET) devices provided on the substrate in a common plane along the working surface. Each FET device includes an active nanochannel structure having opposing end surfaces and a sidewall surface extending between the opposing end surfaces, and an active gate structure surrounding an intermediate portion of the nanochannel structure in contact with the sidewall surface. First and second gate spacers each surrounding a respective end portion of the nanochannel structure in contact with the side wall surface, and first and second source/drain (S/D) structures are in contact with the opposing end surfaces of the nanochannel structure respectively. A single diffusion break provided between first and second FET devices, the single diffusion break including a dummy nanochannel structure connected to an S/D structure of the first FET device and an S/D structure of the second FET device.