Patent ID: 11817852

Abstract:
The present disclosure discloses an anti-backflow output switch, a collector of the tertiary tube Q6 is connected to the source of the MOS tube Q4 through a resistor R24 and a diode ZD2, a resistor R30 is connected between the source and the gate of the MOS tube Q4, the drain of the MOS tube Q4 is connected to the drain of the MOS tube Q9, a resistor R25 and a diode D5 are connected to the gate of the MOS tube Q9, a resistor R28 is connected between the gate and the source of the MOS tube Q9, a resistor R33 is connected between the drain of the MOS tube Q10, a resistor R37 is connected between the gate and the source of the MOS tube Q10, the gate of the MOS tube Q10 is connected to a first pin of the chip U2 through a resistor R35, a resistor R34 and a resistor R38 are connected to the second pin and the third pin of the chip U2 respectively, a resistor R39 and a capacitor C35 are connected between the first pin and the second pin of the chip U2, the second pin of the chip U2 is connected to a fourth pin of the chip U2 through the capacitor C35 and the diode D7, and the resistor R25 is connected to the resistor R33. The advantage of the present disclosure is that the backflow problem is quickly detected and quickly blocked by using a common comparator circuit.