Patent ID: 10497718

Abstract:
Provided are a silicon-on-insulator structure having bipolar stress and a manufacturing method therefor. The manufacturing method comprises providing a composite substrate, wherein the composite substrate has a silicon substrate layer, a buried oxide layer and a silicon-on-insulator layer sequentially from bottom to top, epitaxially growing a silicon germanium layer on an upper surface of the silicon-on-insulator layer; depositing a hard mask layer to cover a portion of the silicon germanium layer corresponding to an N-type MOS transistor region; depositing a surface oxide layer to cover the silicon germanium layer and the hard mask layer; performing a high temperature annealing treatment so that a portion of the silicon-on-insulator layer corresponding to a P-type MOS transistor region is converted into a silicon-germanium-on-insulator layer, and the portion corresponding to the N-type MOS transistor region is converted into a tensile stress silicon-on-insulator layer.