Patent ID: 10163503

Abstract:
An RRAM circuit having a current limiting element configured to improve forming time of RRAM cells, and an associated method of formation, is disclosed. In some embodiments, the RRAM circuit has an RRAM array with a plurality of RRAM devices. A bit-line decoder is configured to concurrently apply a forming signal to a plurality of bit-lines coupled to two or more of the plurality of RRAM devices in a row of the RRAM array. A current limiting element is configured to concurrently limit a current on the plurality of bit-lines to below a forming value during a forming operation that forms conductive filaments within the RRAM devices. By limiting the current on the bit-lines during the forming operation, a forming signal can concurrently be applied to multiple RRAM devices while maintaining a relatively low overall power consumption, thereby allowing for the forming operation to be performed quickly.