Patent ID: 11088701

Abstract:
The present disclosure provides an analogue to digital converter (ADC) (100), which includes: a capacitive digital to analogue converter (DAC) (120) configured to sample and hold a received sampling input signal and a latched comparator (140) including a first metal oxide semiconductor field effect transistor (MOSFET) (202); a second MOSFET (204) connected in parallel to the first MOSFET; a third MOSFET (226), wherein a third source terminal of the third MOSFET (226) is coupled with first drain terminal and second drain terminal of the first and second MOSFET (202, 204), wherein a sampling switch (130) is configured to the third source terminal to selectively allow voltage to be supplied to the third MOSFET (226), and wherein the sampling switch is configured to disallow voltage to be supplied to the third MOSFET when the ADC is sampling the input signal.