Patent ID: 11126777

Abstract:
A layout routing structure and a layout routing method for improving an SI performance of a signal are provided. Each of two positive and negative differential traces on a PCB includes multiple segments D1, multiple segments D2 and multiple segments D3. In each of the two differential traces, the segment D1 and the segment D2 are staggered and parallel to each other, the segment D2 is routed between any two segments D1, and any two adjacent segments D1 and D2 are connected by the segment D3. In one of the two differential traces, all of the segments D1 are routed on the glass cloth, and all of the segments D2 are routed on the epoxy resin. In the other of the two differential traces, all of the segments D1 are routed on the epoxy resin, and all of the segments D2 are routed on the glass cloth.