Patent ID: 10487875

Abstract:
When a duration of current noise caused by a PWM control of each excitation amplifier is Td, a cycle of a PWM carrier signal is Tpwm, an on-duty upper limit of the PWM carrier signal under quiet environment without disturbance is Tonu, and an on-duty lower limit of the PWM carrier signal under the quiet environment without the disturbance is Tonl, the AD sampling period includes a first AD sampling period between a point after a lapse of the time Td after a start of the cycle Tpwm and a point after a lapse of a time (Tpwm−Tonu) from the start of the cycle Tpwm, and a second AD sampling period between a point after a lapse of a time (Tpwm−Tonl+Td) from the start of the cycle Tpwm and an end point of the cycle Tpwm.