Patent ID: 11955972

Abstract:
There is provided a field-programmable gate array, FPGA, device (100) comprising a configurable logic block, CLB, (110) comprising a logic inverter (120) comprising a high-electron-mobility transistor, HEMT, (130), wherein the HEMT comprises: a Si substrate (384); an AlyGay-1N layer structure (380), wherein 0<y≤1; a GaN layer structure (382); and a crystal transition layer structure (386) arranged on the Si substrate. The crystal transition layer comprises: a plurality of vertical nanowire structures (388) perpendicularly arranged on the Si substrate, and an AlxGax-1N layer structure (389), wherein 0≤x<1, wherein the AlxGax-1N layer structure is arranged to vertically and laterally enclose the vertical nanowire structures. There is also provided an AI processing system comprising said FPGA device (100).