Patent ID: 10991703

Abstract:
Provided is a semiconductor device that has a low interface resistance between a contact plug and a bottom electrode of a real ferroelectric capacitor. A real capacitor oxidation suppression structure ST including a dummy ferroelectric capacitor 312 and a second plug 311 is formed. The dummy ferroelectric capacitor 312 includes a second bottom electrode 51, a second ferroelectric film 52, and a second top electrode 53, and is not used as a nonvolatile memory element. The second bottom electrode 51 is formed on an interlayer insulating film 50. The second ferroelectric film 52 is formed on the second bottom electrode 51. The second top electrode 53 is formed on the second ferroelectric film 52. The second plug 311 penetrates the interlayer insulating film 50 and electrically connects the second bottom electrode 51 to a semiconductor substrate 40.