Patent ID: 11310921

Abstract:
A method may include forming a plurality of multilayer cores wherein each multilayer core comprises a sheet of cured dielectric material having a layer of metal on each side of the sheet of cured dielectric material, patterning each layer of metal in the plurality of multilayer cores to form wiring traces in each layer of metal, embedding a solder element in at least one sheet of a plurality of sheets of uncured dielectric material, wherein the solder element having a melting point temperature within a temperature range of a curing temperature of the uncured dielectric material, forming a printed circuit board by alternately stacking the plurality of multilayer cores with the plurality of sheets of uncured dielectric material between each multilayer core, laminating the stack of multilayer cores and sheets of uncured dielectric material to cause curing of the sheets of uncured dielectric material and melting of the solder element.