Patent ID: 10650752

Abstract:
A pixel circuit for a display device is operable in a compensation phase, a data programming phase, and an emission phase, whereby the one horizontal time is minimized while maintaining accurate compensation of the threshold voltage of the drive transistor. The pixel circuit includes: a storage capacitor having a first plate connected to a third terminal of the drive transistor that receives a voltage input, and a second plate connected to the gate of the drive transistor; and a programming capacitor having a first plate connected to second and third transistors, and a second plate of the programming capacitor is electrically connected to a data voltage input during the data programming phase, wherein the first plate of the programming capacitor is electrically connected to the second plate of the storage capacitor when the second transistor is in an on state. The second plate of the programming capacitor further is electrically connected to a reference voltage input to perform the compensation phase, and the programming capacitor further is electrically isolated from the storage capacitor and the drive transistor by the second and third transistors during the emission phase.