Article 1 
1. A definitive anti-dumping duty is hereby imposed on imports of certain types of electronic microcircuits known as DRAMs (dynamic random access memories) falling within CN code ex 8473 30 00, ex 8542 11 10, ex 8542 11 30, 8542 11 41, 8542 11 43, 8542 11 45 or ex 8548 00 00 (for Taric and additional codes see Annex II), originating in Japan. 2. For the purpose of this Regulation, DRAMs comprise all types and densities including unfinished forms such as wafers and dice (mounted or unmounted), VRAMs if based on DRAM technology and multi-combinational forms, such as 'stack' DRAMS, 'piggy-back' DRAMs and 'modules'. 3. The rate of the duty shall be 60 % of the net free-at-Community-frontier price before duty. 4. Products referred to in paragraph 1 shall be exempt from the duty, provided that: - they are produced and exported to the Community by the following companies, which have offered undertakings which have been accepted pursuant to Article 2 of Regulation (EEC) No 165/90: - Fujitsu Limited, - Hitachi Ltd, - Matsushita Electronics Corporation, - Mitsubishi Electric Corporation, - NEC Corporation, - NMB Semiconductor Co. Ltd, - Oki Electric Industry Co. Ltd, - Sanyo Electric Co. Ltd, - Sharp Corporation, - Texas Instruments (Japan) Ltd, and - Toshiba Corporation, or that - they are produced by one of the companies listed in the first indent and exported to the Community by one of its affiliated companies listed in Annex I, or that - they are produced, and sold for export to the Community, by one of the companies listed in the first indent: in this case, exemption from the duty shall be conditional upon presentation to the customs authorities of documentation from the producers confirming that it sold the products for which the exemption is sought for export to the Community; the documentation, the format of which is contained in Annex III, must contain a clear description of the device type(s) sold, the total quantity per device type, the unit price per device type or a statement that the price was not lower than the applicable reference price, the invoice number and the confirmation that these products were produced and sold for export to the Community by the said company under the undertakings referred to in Article 2 of Regulation (EEC) No 165/90. 5. The provisions in force concerning customs duties shall apply. Article 2 The amounts secured by way of a provisional anti-dumping duty pursuant to Regulation (EEC) No 165/90 shall be definitively collected. However, where the importer requests so and the following conditions are fulfilled: - the date of order confirmation to the first independent purchaser for the products in question is prior to 26 January 1990, - effective delivery of these goods to the first independent purchaser occurred not later than 30 June 1990, and - the products in question were produced by one of the companies listed in the first indent of Article 1 (4) of this Regulation, provisional duties collected or securities lodged shall be released. Article 3 This Regulation shall enter into force on the day following its publication in the Official Journal of the European Communities. This Regulation shall be binding in its entirety and directly applicable in all Member States. Done at Brussels, 23 July 1990. For the Council The President G. CARLI (1) OJ No L 209, 2. 8. 1988, p. 1. (2) OJ No L 20, 25. 1. 1990, p. 5. (3) OJ No L 22, 27. 1. 1990, p. 79 (English edition only). OJ No L 38, 10. 2. 1990, p. 44. (4) OJ No L 131, 23. 5. 1990, p. 6. (5) A DRAM is a monolithic integrated memory circuit containing thousands of memory storage cells (bits) each of which contains a transistor and capicitor. A stored programme can be created in the DRAM by charging selected capacitors. The storage cells in a DRAM are arranged in a rectangular array of columns and rows, which allows each cell to be accessed independently (random access). The electrical charge stored on the cells must be regenerated after being accessed, and periodically because of leakage. The required regeneration of the charge on the capacitors makes the device 'dynamic'. DRAMs vary, inter alia, in the speed at which the storage cells can be accessed (access time) and in the amount of information that can be stored (density) expressed as multiples of 1 024 capacitors, kilobits or K.
Article 2 
The amounts secured by way of a provisional anti-dumping duty pursuant to Regulation (EEC) No 165/90 shall be definitively collected. However, where the importer requests so and the following conditions are fulfilled: - the date of order confirmation to the first independent purchaser for the products in question is prior to 26 January 1990, - effective delivery of these goods to the first independent purchaser occurred not later than 30 June 1990, and - the products in question were produced by one of the companies listed in the first indent of Article 1 (4) of this Regulation, provisional duties collected or securities lodged shall be released. Article 3 This Regulation shall enter into force on the day following its publication in the Official Journal of the European Communities. This Regulation shall be binding in its entirety and directly applicable in all Member States. Done at Brussels, 23 July 1990. For the Council The President G. CARLI (1) OJ No L 209, 2. 8. 1988, p. 1. (2) OJ No L 20, 25. 1. 1990, p. 5. (3) OJ No L 22, 27. 1. 1990, p. 79 (English edition only). OJ No L 38, 10. 2. 1990, p. 44. (4) OJ No L 131, 23. 5. 1990, p. 6. (5) A DRAM is a monolithic integrated memory circuit containing thousands of memory storage cells (bits) each of which contains a transistor and capicitor. A stored programme can be created in the DRAM by charging selected capacitors. The storage cells in a DRAM are arranged in a rectangular array of columns and rows, which allows each cell to be accessed independently (random access). The electrical charge stored on the cells must be regenerated after being accessed, and periodically because of leakage. The required regeneration of the charge on the capacitors makes the device 'dynamic'. DRAMs vary, inter alia, in the speed at which the storage cells can be accessed (access time) and in the amount of information that can be stored (density) expressed as multiples of 1 024 capacitors, kilobits or K.
Article 3 
This Regulation shall enter into force on the day following its publication in the Official Journal of the European Communities. This Regulation shall be binding in its entirety and directly applicable in all Member States. Done at Brussels, 23 July 1990. For the Council The President G. CARLI (1) OJ No L 209, 2. 8. 1988, p. 1. (2) OJ No L 20, 25. 1. 1990, p. 5. (3) OJ No L 22, 27. 1. 1990, p. 79 (English edition only). OJ No L 38, 10. 2. 1990, p. 44. (4) OJ No L 131, 23. 5. 1990, p. 6. (5) A DRAM is a monolithic integrated memory circuit containing thousands of memory storage cells (bits) each of which contains a transistor and capicitor. A stored programme can be created in the DRAM by charging selected capacitors. The storage cells in a DRAM are arranged in a rectangular array of columns and rows, which allows each cell to be accessed independently (random access). The electrical charge stored on the cells must be regenerated after being accessed, and periodically because of leakage. The required regeneration of the charge on the capacitors makes the device 'dynamic'. DRAMs vary, inter alia, in the speed at which the storage cells can be accessed (access time) and in the amount of information that can be stored (density) expressed as multiples of 1 024 capacitors, kilobits or K.