システムソフトウェア
In October 2018, Intel disclosed a TSX/TSX-NI memory ordering issue found in Skylake processors. As a result of a microcode update, HLE support was disabled in the affected CPUs, and RTM transactions would always abort in SGX and SMM modes of operation. System software would have to implement a workaround for the RTM memory ordering issue. In June 2021, Intel published a microcode update that further disables TSX/TSX-NI on various Xeon and Core processor models from Skylake through Coffee Lake and Whiskey Lake as a mitigation for unreliable behavior of a performance counter in the Performance Monitoring Unit (PMU). By default, with the updated microcode, the processor would still indicate support for RTM but would always abort the transaction. System software is able to detect this mode of operation and mask support for TSX/TSX-NI from the instruction, preventing detection of TSX/TSX-NI by applications. System software may also enable the "Unsupported Software Development Mode", where RTM is fully active, but in this case RTM usage may be subject to the issues described earlier, and therefore this mode should not be enabled on production systems.