Function at 0x596b90
Capabilities:
Resolve function by parsing pe exports

Disassembly:
sub esp, 0xb8
mov ecx, dword [esp + 0xc4]
mov edx, dword [edx + 0x30]
push ebx
push esi
mov esi, dword [esp + 0xc4]
push edi
mov edi, eax
mov eax, dword [esp + 0xcc]
imul eax, ecx
mov ebx, dword [edx + eax*8]
mov dword [esp + 0x38], ebx
mov ebx, dword [edx + eax*8 + 4]
shl eax, 4
mov dword [esp + 0x3c], ebx
mov ebx, dword [eax + edx]
mov eax, dword [eax + edx + 4]
mov dword [esp + 0x24], edx
mov dword [esp + 0x1c], ebx
mov dword [esp + 0x20], eax
test edi, edi
jle 0x596f0d
mov edx, dword [esp + 0xd4]
fld dword [esp + 0x3c]
fld dword [esp + 0x38]
push ebp
add edx, edx
add edx, edx
add edx, edx
lea ebp, [ecx + ecx*2]
add ebp, ebp
mov eax, ecx
shl eax, 4
add ebp, ebp
mov dword [esp + 0x48], edx
lea edx, [eax + esi]
mov dword [esp + 0x1c], esi
add ebp, ebp
mov ebx, ecx
lea esi, [ecx*8]
sub esi, eax
sub ebp, eax
shl ebx, 5
sub ebx, eax
mov dword [esp + 0x38], edx
mov dword [esp + 0x44], esi
mov dword [esp + 0x54], ebp
mov dword [esp + 0x5c], ebx
mov dword [esp + 0x30], edi
jmp 0x596c3e
mov esi, dword [esp + 0x44]
cmp dword [esp + 0xd4], 0
mov eax, dword [esp + 0x1c]
lea ecx, [esi + edx]
lea esi, [edx + ebp]
lea edi, [ebx + edx]
jle 0x596eef
mov ebx, dword [esp + 0xd0]
mov ebp, ebx
shl ebp, 5
mov dword [esp + 0x4c], ebp
lea ebp, [ebx + ebx*2]
add ebp, ebp
add ebp, ebp
add ebp, ebp
mov dword [esp + 0x58], ebp
mov ebp, ebx
mov ebx, dword [esp + 0x28]
shl ebp, 4
mov dword [esp + 0x50], ebp
mov ebp, ebx
mov dword [esp + 0x10], ebp
mov dword [esp + 0x18], ebp
mov ebp, dword [esp + 0xd4]
mov dword [esp + 0x2c], ebx
mov dword [esp + 0x14], ebx
mov dword [esp + 0x34], ebp
mov ebp, dword [eax]
fld dword [ecx]
mov dword [esp + 0x60], ebp
mov ebp, dword [eax + 4]
mov dword [esp + 0x64], ebp
mov ebp, dword [esp + 0x18]
fmul dword [ebp]
fld dword [ebp + 4]
fmul dword [ecx + 4]
fsubp st(1)
fld dword [ecx]
fmul dword [ebp + 4]
fld dword [ebp]
mov ebp, dword [esp + 0x10]
fmul dword [ecx + 4]
faddp st(1)
fld dword [edx]
fmul dword [ebp]
fld dword [ebp + 4]
fmul dword [edx + 4]
fsubp st(1)
fld dword [edx + 4]
fmul dword [ebp]
fld dword [ebp + 4]
mov ebp, dword [esp + 0x14]
fmul dword [edx]
faddp st(1)
fstp dword [esp + 0x74]
fld dword [esi]
fmul dword [ebp]
fld dword [ebp + 4]
fmul dword [esi + 4]
fsubp st(1)
fstp dword [esp + 0x78]
fld dword [esi]
fmul dword [ebp + 4]
fld dword [ebp]
fmul dword [esi + 4]
faddp st(1)
fstp dword [esp + 0x7c]
fld dword [ebx]
fmul dword [edi]
fld dword [ebx + 4]
fmul dword [edi + 4]
fsubp st(1)
fld dword [ebx + 4]
fmul dword [edi]
fld dword [edi + 4]
fmul dword [ebx]
faddp st(1)
fst dword [esp + 0x84]
fld st(1)
fadd st(5)
fxch st(1)
fadd st(4)
fxch st(5)
fsubrp st(2)
fxch st(1)
fstp dword [esp + 0xb0]
fxch st(2)
fsub dword [esp + 0x84]
fstp dword [esp + 0xb4]
fld dword [esp + 0x78]
fadd st(1)
fld dword [esp + 0x7c]
fadd dword [esp + 0x74]
fxch st(2)
fsub dword [esp + 0x78]
fstp dword [esp + 0xa8]
fld dword [esp + 0x74]
fsub dword [esp + 0x7c]
fstp dword [esp + 0xac]
fld st(0)
fadd st(3)
fadd dword [eax]
fstp dword [eax]
fld st(1)
fadd st(4)
fadd dword [eax + 4]
fstp dword [eax + 4]
fld dword [esp + 0x20]
fmul st(1)
add eax, 8
fld st(5)
add ecx, 8
fmul st(4)
add edx, 8
add esi, 8
faddp st(1)
fadd dword [esp + 0x60]
fstp dword [esp + 0x88]
fld dword [esp + 0x20]
fmul st(2)
fxch st(5)
fmul st(4)
faddp st(5)
fxch st(4)
fadd dword [esp + 0x64]
fstp dword [esp + 0x8c]
fld dword [esp + 0x24]
fmul dword [esp + 0xac]
fld st(5)
fmul dword [esp + 0xb4]
faddp st(1)
fstp dword [esp + 0x90]
fld dword [esp + 0x24]
fmul dword [esp + 0xa8]
fld st(5)
fmul dword [esp + 0xb0]
faddp st(1)
fchs
fld dword [esp + 0x88]
fld dword [esp + 0x90]
fsub st(1), st(0)
fxch st(1)
fstp dword [ecx - 8]
fld dword [esp + 0x8c]
fsub st(2)
fstp dword [ecx - 4]
fadd dword [esp + 0x88]
fstp dword [edi]
fadd dword [esp + 0x8c]
fstp dword [edi + 4]
fld dword [esp + 0x3c]
fld st(0)
fmulp st(5)
fld dword [esp + 0x20]
fld st(0)
fmulp st(4)
fxch st(5)
faddp st(3)
fxch st(2)
fadd dword [esp + 0x60]
fld st(2)
fmulp st(2)
fxch st(4)
fmulp st(3)
faddp st(2)
fxch st(1)
fadd dword [esp + 0x64]
fld st(3)
fmul dword [esp + 0xac]
fld dword [esp + 0x24]
fld dword [esp + 0xb4]
fmul st(1)
fsubp st(2)
fmul dword [esp + 0xb0]
fld st(5)
fmul dword [esp + 0xa8]
fsubp st(1)
fld st(1)
fadd st(5)
fstp dword [edx - 8]
fld st(0)
fadd st(3)
fstp dword [edx - 4]
fxch st(4)
fsubrp st(1)
fstp dword [esi - 8]
fsubrp st(2)
fxch st(1)
fstp dword [esi - 4]
mov ebx, dword [esp + 0xd0]
add ebx, ebx
add ebx, ebx
add ebx, ebx
add dword [esp + 0x18], ebx
mov ebx, dword [esp + 0x50]
add dword [esp + 0x10], ebx
mov ebx, dword [esp + 0x58]
add dword [esp + 0x14], ebx
mov ebx, dword [esp + 0x2c]
add ebx, dword [esp + 0x4c]
add edi, 8
sub dword [esp + 0x34], 1
mov dword [esp + 0x2c], ebx
jne 0x596ca0
mov edx, dword [esp + 0x38]
mov ebx, dword [esp + 0x5c]
mov ebp, dword [esp + 0x54]
mov eax, dword [esp + 0x48]
add dword [esp + 0x1c], eax
add edx, eax
sub dword [esp + 0x30], 1
mov dword [esp + 0x38], edx
jne 0x596c3a
fstp st(1)
pop ebp
fstp st(0)
pop edi
pop esi
pop ebx
add esp, 0xb8
ret