Function at 0x5079d0
Capabilities:
Resolve function by parsing pe exports

Disassembly:
sub esp, 0x5c
push ebx
push ebp
push esi
mov esi, dword [esp + 0x6c]
cmp si, 1
push edi
mov di, word [esp + 0x74]
jne 0x507bc5
cmp dl, 1
jne 0x507adc
test di, di
jbe 0x507ff9
fld dword [0x64111c]
movzx edx, di
fld dword [str.__z7]
mov esi, edx
shl esi, 4
mov ebx, 1
add esi, ecx
lea edi, [ecx + edx*8]
mov ebp, edx
movzx edx, bx
fld dword [eax + edx*8]
lea edx, [eax + edx*8]
add ebx, 3
add ecx, 8
fadd dword [edx + 8]
add edi, 8
add esi, 8
sub ebp, 1
fstp dword [esp + 0x44]
fld dword [edx + 0xc]
fadd dword [edx + 4]
fstp dword [esp + 0x48]
fld st(1)
fld dword [esp + 0x44]
fld st(0)
fmulp st(2)
fld dword [edx - 8]
faddp st(2)
fxch st(1)
fstp dword [esp + 0x54]
fld st(2)
fld dword [esp + 0x48]
fld st(0)
fmulp st(2)
fld dword [edx - 4]
faddp st(2)
fxch st(1)
fstp dword [esp + 0x58]
fld dword [edx - 8]
faddp st(2)
fxch st(1)
fstp dword [ecx - 8]
fadd dword [edx - 4]
fstp dword [ecx - 4]
fld dword [edx]
fsub dword [edx + 8]
fmul st(1)
fstp dword [esp + 0x4c]
fld dword [edx + 4]
fsub dword [edx + 0xc]
fmul st(1)
fstp dword [esp + 0x50]
fld dword [esp + 0x54]
fld st(0)
fld dword [esp + 0x50]
fld st(0)
fsubp st(2)
fxch st(1)
fstp dword [edi - 8]
fld dword [esp + 0x4c]
fld st(0)
fld dword [esp + 0x58]
fld st(0)
faddp st(2)
fxch st(1)
fstp dword [edi - 4]
fxch st(2)
faddp st(3)
fxch st(2)
fstp dword [esi - 8]
fsubrp st(1)
fstp dword [esi - 4]
jne 0x507a1c
pop edi
fstp st(1)
pop esi
fstp st(0)
pop ebp
pop ebx
add esp, 0x5c
ret
test di, di
jbe 0x507ff9
fld dword [0x64111c]
movzx edx, di
fld dword [str.__z7]
mov esi, edx
shl esi, 4
mov ebx, 1
add esi, ecx
lea edi, [ecx + edx*8]
mov ebp, edx
movzx edx, bx
fld dword [eax + edx*8]
lea edx, [eax + edx*8]
add ebx, 3
add ecx, 8
fadd dword [edx + 8]
add edi, 8
add esi, 8
sub ebp, 1
fstp dword [esp + 0x44]
fld dword [edx + 0xc]
fadd dword [edx + 4]
fstp dword [esp + 0x48]
fld st(1)
fld dword [esp + 0x44]
fld st(0)
fmulp st(2)
fld dword [edx - 8]
faddp st(2)
fxch st(1)
fstp dword [esp + 0x54]
fld st(2)
fld dword [esp + 0x48]
fld st(0)
fmulp st(2)
fld dword [edx - 4]
faddp st(2)
fxch st(1)
fstp dword [esp + 0x58]
fld dword [edx - 8]
faddp st(2)
fxch st(1)
fstp dword [ecx - 8]
fadd dword [edx - 4]
fstp dword [ecx - 4]
fld dword [edx]
fsub dword [edx + 8]
fmul st(1)
fstp dword [esp + 0x4c]
fld dword [edx + 4]
fsub dword [edx + 0xc]
fmul st(1)
fstp dword [esp + 0x50]
fld dword [esp + 0x50]
fld st(0)
fld dword [esp + 0x54]
fld st(0)
faddp st(2)
fxch st(1)
fstp dword [edi - 8]
fld dword [esp + 0x58]
fld st(0)
fld dword [esp + 0x4c]
fld st(0)
fsubp st(2)
fxch st(1)
fstp dword [edi - 4]
fxch st(2)
fsubrp st(3)
fxch st(2)
fstp dword [esi - 8]
faddp st(1)
fstp dword [esi - 4]
jne 0x507b05
pop edi
fstp st(1)
pop esi
fstp st(0)
pop ebp
pop ebx
add esp, 0x5c
ret
cmp dl, 1
jne 0x507deb
test di, di
jbe 0x507ff9
fld dword [0x64111c]
movzx ebx, di
fld dword [str.__z7]
movzx ebp, si
lea edx, [esi + esi*2]
mov dword [esp + 0x18], 0
mov dword [esp + 0x28], edx
mov dword [esp + 0x34], ebp
mov dword [esp + 0x24], ebx
mov dword [esp + 0x38], ebx
test si, si
jbe 0x507dc4
movzx edi, si
mov esi, dword [esp + 0x78]
mov edx, edi
imul edx, ebx
mov dword [esp + 0x20], edx
movzx edx, word [esp + 0x18]
mov dword [esp + 0x14], edx
movzx edx, bp
mov dword [esp + 0x10], edx
mov edx, dword [esp + 0x7c]
mov dword [esp + 0x2c], esi
sub esi, edx
mov dword [esp + 0x3c], edi
lea ebp, [edx + 4]
mov dword [esp + 0x1c], esi
mov dword [esp + 0x30], edi
jmp 0x507c4c
mov edi, dword [esp + 0x3c]
movzx edx, word [esp + 0x10]
lea esi, [edi + edx]
lea esi, [eax + esi*8]
fld dword [eax + edx*8]
mov ebx, edx
sub ebx, edi
fadd dword [esi]
lea edi, [eax + ebx*8]
lea ebx, [eax + edx*8 + 4]
mov dword [esp + 0x40], ebx
fstp dword [esp + 0x44]
fld st(1)
fld dword [esp + 0x44]
fld st(0)
fmulp st(2)
fld dword [edi]
faddp st(2)
fxch st(1)
fstp dword [esp + 0x54]
fld dword [esi + 4]
fadd dword [ebx]
movzx ebx, word [esp + 0x14]
fstp dword [esp + 0x48]
fld st(2)
fld dword [esp + 0x48]
fld st(0)
fmulp st(2)
fld dword [edi + 4]
faddp st(2)
fxch st(1)
fstp dword [esp + 0x58]
fld dword [edi]
faddp st(2)
fxch st(1)
fstp dword [ecx + ebx*8]
fadd dword [edi + 4]
mov edi, dword [esp + 0x20]
fstp dword [ecx + ebx*8 + 4]
fld dword [eax + edx*8]
mov edx, dword [esp + 0x40]
fsub dword [esi]
fmul st(1)
fstp dword [esp + 0x4c]
fld dword [edx]
mov edx, dword [esp + 0x1c]
fsub dword [esi + 4]
mov esi, dword [esp + 0x2c]
fmulp st(1)
fstp dword [esp + 0x50]
fld dword [esp + 0x54]
fld st(0)
fld dword [esp + 0x50]
fld st(0)
fsubp st(2)
fxch st(1)
fstp dword [esp + 0x5c]
fld dword [esp + 0x58]
fld st(0)
fld dword [esp + 0x4c]
fld st(0)
fsubp st(2)
fxch st(1)
fstp dword [esp + 0x68]
fxch st(2)
faddp st(3)
fxch st(2)
fstp dword [esp + 0x64]
faddp st(1)
fstp dword [esp + 0x60]
fld dword [esi]
fstp dword [esp + 0x40]
fld dword [edx + ebp]
lea edx, [edi + ebx]
fstp dword [esp + 0x2c]
lea edx, [ecx + edx*8]
fld dword [esp + 0x40]
fld st(0)
fld dword [esp + 0x60]
fld st(0)
fmulp st(2)
fld dword [esp + 0x2c]
fld st(0)
add esi, 8
fld dword [esp + 0x5c]
add ebp, 8
fld st(0)
fmulp st(2)
fxch st(4)
faddp st(1)
fstp dword [edx + 4]
fxch st(3)
fmulp st(2)
fmulp st(2)
fsubrp st(1)
fstp dword [edx]
lea edx, [ebx + edi*2]
fld dword [ebp - 0xc]
lea edx, [ecx + edx*8]
fstp dword [esp + 0x2c]
fld dword [ebp - 8]
fstp dword [esp + 0x40]
fld dword [esp + 0x40]
fld st(0)
fld dword [esp + 0x64]
fld st(0)
fmulp st(2)
fld dword [esp + 0x2c]
mov dword [esp + 0x2c], esi
fld st(0)
fld dword [esp + 0x68]
fld st(0)
fmulp st(2)
fxch st(4)
faddp st(1)
fstp dword [edx + 4]
fmulp st(1)
fxch st(2)
fmulp st(1)
fsubp st(1)
fstp dword [edx]
mov edx, 1
add dword [esp + 0x10], edx
fld dword [str.__z7]
add dword [esp + 0x14], edx
sub dword [esp + 0x30], edx
jne 0x507c48
mov esi, dword [esp + 0x70]
mov ebx, dword [esp + 0x24]
mov ebp, dword [esp + 0x34]
add ebp, dword [esp + 0x28]
add dword [esp + 0x18], esi
sub dword [esp + 0x38], 1
mov dword [esp + 0x34], ebp
jne 0x507c04
pop edi
fstp st(0)
pop esi
fstp st(0)
pop ebp
pop ebx
add esp, 0x5c
ret
test di, di
jbe 0x507ff9
fld dword [0x64111c]
movzx ebx, di
fld dword [str.__z7]
movzx ebp, si
lea edx, [esi + esi*2]
mov dword [esp + 0x10], 0
mov dword [esp + 0x28], edx
mov dword [esp + 0x30], ebp
mov dword [esp + 0x24], ebx
mov dword [esp + 0x2c], ebx
test si, si
jbe 0x507fda
movzx edx, si
mov edi, edx
imul edi, ebx
mov ebx, dword [esp + 0x7c]
mov dword [esp + 0x20], edi
movzx edi, word [esp + 0x10]
mov dword [esp + 0x14], edi
movzx edi, bp
mov dword [esp + 0x18], edi
mov edi, dword [esp + 0x78]
mov dword [esp + 0x38], edi
sub edi, ebx
lea ebp, [ebx + 4]
mov dword [esp + 0x1c], edi
mov dword [esp + 0x34], edx
movzx edx, word [esp + 0x18]
movzx edi, si
fld dword [eax + edx*8]
lea esi, [edx + edi]
lea esi, [eax + esi*8]
mov ebx, edx
sub ebx, edi
fadd dword [esi]
lea edi, [eax + ebx*8]
lea ebx, [eax + edx*8 + 4]
mov dword [esp + 0x40], ebx
fstp dword [esp + 0x44]
fld st(1)
fld dword [esp + 0x44]
fld st(0)
fmulp st(2)
fld dword [edi]
faddp st(2)
fxch st(1)
fstp dword [esp + 0x54]
fld dword [esi + 4]
fadd dword [ebx]
movzx ebx, word [esp + 0x14]
fstp dword [esp + 0x48]
fld st(2)
fld dword [esp + 0x48]
fld st(0)
fmulp st(2)
fld dword [edi + 4]
faddp st(2)
fxch st(1)
fstp dword [esp + 0x58]
fld dword [edi]
faddp st(2)
fxch st(1)
fstp dword [ecx + ebx*8]
fadd dword [edi + 4]
mov edi, dword [esp + 0x20]
fstp dword [ecx + ebx*8 + 4]
fld dword [eax + edx*8]
mov edx, dword [esp + 0x40]
fsub dword [esi]
fmul st(1)
fstp dword [esp + 0x4c]
fld dword [edx]
mov edx, dword [esp + 0x1c]
fsub dword [esi + 4]
mov esi, dword [esp + 0x38]
fmulp st(1)
fstp dword [esp + 0x50]
fld dword [esp + 0x50]
fld st(0)
fld dword [esp + 0x54]
fld st(0)
faddp st(2)
fxch st(1)
fstp dword [esp + 0x5c]
fld dword [esp + 0x4c]
fld st(0)
fld dword [esp + 0x58]
fld st(0)
faddp st(2)
fxch st(1)
fstp dword [esp + 0x68]
fxch st(2)
fsubrp st(3)
fxch st(2)
fstp dword [esp + 0x64]
fsubrp st(1)
fstp dword [esp + 0x60]
fld dword [esi]
fstp dword [esp + 0x3c]
fld dword [edx + ebp]
lea edx, [ebx + edi]
fstp dword [esp + 0x40]
lea edx, [ecx + edx*8]
fld dword [esp + 0x40]
fld st(0)
fld dword [esp + 0x60]
fld st(0)
fmulp st(2)
fld dword [esp + 0x3c]
add esi, 8
fld st(0)
add ebp, 8
fld dword [esp + 0x5c]
mov dword [esp + 0x38], esi
fld st(0)
mov esi, dword [esp + 0x70]
fmulp st(2)
fxch st(4)
faddp st(1)
fstp dword [edx]
fmulp st(1)
fxch st(2)
fmulp st(1)
fsubp st(1)
fstp dword [edx + 4]
lea edx, [ebx + edi*2]
fld dword [ebp - 0xc]
lea edx, [ecx + edx*8]
fstp dword [esp + 0x40]
fld dword [ebp - 8]
fstp dword [esp + 0x3c]
fld dword [esp + 0x40]
fld st(0)
fld dword [esp + 0x64]
fld st(0)
fmulp st(2)
fld dword [esp + 0x3c]
fld st(0)
fld dword [esp + 0x68]
fld st(0)
fmulp st(2)
fxch st(4)
faddp st(1)
fstp dword [edx]
fxch st(3)
fmulp st(2)
fmulp st(2)
fsubrp st(1)
fstp dword [edx + 4]
mov edx, 1
add dword [esp + 0x18], edx
fld dword [str.__z7]
add dword [esp + 0x14], edx
sub dword [esp + 0x34], edx
jne 0x507e5f
mov ebx, dword [esp + 0x24]
mov ebp, dword [esp + 0x30]
add ebp, dword [esp + 0x28]
add dword [esp + 0x10], esi
sub dword [esp + 0x2c], 1
mov dword [esp + 0x30], ebp
jne 0x507e21
fstp st(0)
fstp st(0)
pop edi
pop esi
pop ebp
pop ebx
add esp, 0x5c
ret