Function at 0x550a60
Capabilities:
Resolve function by parsing pe exports

Disassembly:
mov edx, dword [esp + 4]
sub esp, 0x84
cmp dx, 1
push ebx
mov ebx, dword [esp + 0x90]
push ebp
push esi
push edi
jne 0x550b9a
test cx, cx
jbe 0x550e8a
movzx ecx, cx
lea edx, [ecx + ecx*2]
lea ebp, [ebx + edx*8]
mov edx, ecx
shl edx, 4
mov dword [esp + 0x14], 0
mov esi, ebx
lea edi, [ebx + ecx*8]
add edx, ebx
mov dword [esp + 0x1c], ecx
lea esp, [esp]
movzx ecx, word [esp + 0x14]
lea ebx, [eax + ecx*8 + 0x1c]
add dword [esp + 0x14], 4
fld dword [eax + ecx*8]
add esi, 8
fadd dword [eax + ecx*8 + 0x10]
add edx, 8
add edi, 8
add ebp, 8
sub dword [esp + 0x1c], 1
fstp dword [esp + 0x44]
fld dword [eax + ecx*8]
fsub dword [eax + ecx*8 + 0x10]
fstp dword [esp + 0x4c]
fld dword [eax + ecx*8 + 0x14]
fadd dword [eax + ecx*8 + 4]
fstp dword [esp + 0x48]
fld dword [eax + ecx*8 + 4]
fsub dword [eax + ecx*8 + 0x14]
fstp dword [esp + 0x50]
fld dword [eax + ecx*8 + 0x18]
fadd dword [eax + ecx*8 + 8]
fstp dword [esp + 0x54]
fld dword [eax + ecx*8 + 8]
fsub dword [eax + ecx*8 + 0x18]
lea ecx, [eax + ecx*8 + 0xc]
fstp dword [esp + 0x3c]
fld dword [ebx]
fadd dword [ecx]
fstp dword [esp + 0x58]
fld dword [ebx]
fsub dword [ecx]
fstp dword [esp + 0x38]
fld dword [esp + 0x54]
fld st(0)
fld dword [esp + 0x44]
fld st(0)
faddp st(2)
fxch st(1)
fstp dword [esi - 8]
fsubrp st(1)
fstp dword [edx - 8]
fld dword [esp + 0x58]
fld st(0)
fld dword [esp + 0x48]
fld st(0)
faddp st(2)
fxch st(1)
fstp dword [esi - 4]
fsubrp st(1)
fstp dword [edx - 4]
fld dword [esp + 0x38]
fld st(0)
fld dword [esp + 0x4c]
fld st(0)
faddp st(2)
fxch st(1)
fstp dword [edi - 8]
fsubrp st(1)
fstp dword [ebp - 8]
fld dword [esp + 0x3c]
fld st(0)
fld dword [esp + 0x50]
fld st(0)
faddp st(2)
fxch st(1)
fstp dword [edi - 4]
fsubrp st(1)
fstp dword [ebp - 4]
jne 0x550ab0
pop edi
pop esi
pop ebp
pop ebx
add esp, 0x84
ret
xor esi, esi
cmp cx, si
jbe 0x550e8a
movzx ebp, cx
mov dword [esp + 0x2c], esi
mov dword [esp + 0x1c], esi
mov dword [esp + 0x54], ebp
mov dword [esp + 0x40], ebp
jmp 0x550bc0
test dx, dx
jbe 0x550e70
mov ecx, dword [esp + 0xa8]
movzx esi, word [esp + 0x2c]
mov dword [esp + 0x14], ecx
mov ecx, dword [esp + 0xa4]
add ecx, 4
mov dword [esp + 0x10], ecx
lea ecx, [ebx + esi*8]
mov dword [esp + 0x20], ecx
movzx ecx, word [esp + 0x1c]
mov dword [esp + 0x24], ecx
lea edi, [eax + ecx*8]
movzx ecx, dx
mov edx, ecx
imul edx, ebp
lea ebp, [esi + edx*2]
add ebp, edx
lea ebp, [ebx + ebp*8]
mov dword [esp + 0x34], ebp
lea ebp, [esi + edx*2]
add edx, esi
lea ebp, [ebx + ebp*8]
lea edx, [ebx + edx*8]
mov ebx, dword [esp + 0xa0]
mov dword [esp + 0x28], ebp
mov ebp, dword [esp + 0xa4]
mov dword [esp + 0x30], edx
mov edx, dword [esp + 0x24]
sub ebx, ebp
lea esi, [edx + ecx]
lea esi, [eax + esi*8]
mov dword [esp + 0x38], ebx
mov ebx, dword [esp + 0xa8]
mov dword [esp + 0x18], esi
sub ebx, ebp
mov ebp, dword [esp + 0xa0]
lea esi, [edx + ecx*2]
add esi, ecx
sub ebp, dword [esp + 0xa8]
lea edx, [edx + ecx*2]
mov dword [esp + 0x44], ebx
mov ebx, dword [esp + 0x18]
lea esi, [eax + esi*8]
lea edx, [eax + edx*8]
mov dword [esp + 0x4c], ebp
mov dword [esp + 0x24], ecx
jmp 0x550c84
mov ebp, dword [esp + 0x4c]
fld dword [edi]
mov ecx, dword [esp + 0x20]
fadd dword [edx]
fstp dword [esp + 0x64]
fld dword [edi]
fsub dword [edx]
fstp dword [esp + 0x5c]
fld dword [edi + 4]
fadd dword [edx + 4]
fstp dword [esp + 0x68]
fld dword [edi + 4]
fsub dword [edx + 4]
fstp dword [esp + 0x60]
fld dword [esi]
fadd dword [ebx]
fstp dword [esp + 0x74]
fld dword [ebx]
fsub dword [esi]
fstp dword [esp + 0x88]
fld dword [esi + 4]
fadd dword [ebx + 4]
fstp dword [esp + 0x78]
fld dword [esi + 4]
fsub dword [ebx + 4]
fstp dword [esp + 0x84]
fld dword [esp + 0x84]
fld st(0)
fld dword [esp + 0x5c]
fld st(0)
faddp st(2)
fxch st(1)
fstp dword [esp + 0x6c]
fsubrp st(1)
fstp dword [esp + 0x8c]
fld dword [esp + 0x88]
fld st(0)
fld dword [esp + 0x60]
fld st(0)
faddp st(2)
fxch st(1)
fstp dword [esp + 0x70]
fsubrp st(1)
fstp dword [esp + 0x90]
fld dword [esp + 0x74]
fld st(0)
fld dword [esp + 0x64]
fld st(0)
faddp st(2)
fxch st(1)
fstp dword [ecx]
fsubrp st(1)
fstp dword [esp + 0x7c]
fld dword [esp + 0x78]
fld st(0)
fld dword [esp + 0x68]
fld st(0)
faddp st(2)
fxch st(1)
fstp dword [ecx + 4]
mov ecx, dword [esp + 0x14]
fsubrp st(1)
fstp dword [esp + 0x80]
fld dword [ecx + ebp]
mov ebp, dword [esp + 0x38]
mov ecx, dword [esp + 0x10]
fstp dword [esp + 0x18]
fld dword [ecx + ebp]
mov ebp, dword [esp + 0x30]
fstp dword [esp + 0x10]
fld dword [esp + 0x18]
fld st(0)
fld dword [esp + 0x70]
fld st(0)
fmulp st(2)
fld dword [esp + 0x10]
fld st(0)
fld dword [esp + 0x6c]
fld st(0)
fmulp st(2)
fxch st(4)
faddp st(1)
fstp dword [ebp + 4]
add dword [esp + 0x20], 8
fxch st(3)
add dword [esp + 0x30], 8
fmulp st(2)
add edx, 8
add esi, 8
add edi, 8
fmulp st(2)
add ebx, 8
fsubrp st(1)
fstp dword [ebp]
mov ebp, dword [esp + 0x28]
fld dword [ecx - 4]
fstp dword [esp + 0x18]
fld dword [ecx]
fstp dword [esp + 0x10]
fld dword [esp + 0x18]
fld st(0)
fld dword [esp + 0x80]
fld st(0)
fmulp st(2)
fld dword [esp + 0x10]
fld st(0)
fld dword [esp + 0x7c]
fld st(0)
fmulp st(2)
fxch st(4)
faddp st(1)
fstp dword [ebp + 4]
fxch st(3)
fmulp st(2)
fmulp st(2)
fsubrp st(1)
fstp dword [ebp]
mov ebp, dword [esp + 0x14]
fld dword [ebp]
mov ebp, dword [esp + 0x44]
fstp dword [esp + 0x18]
fld dword [ecx + ebp]
mov ebp, dword [esp + 0x34]
fstp dword [esp + 0x10]
fld dword [esp + 0x18]
fld st(0)
fld dword [esp + 0x90]
fld st(0)
fmulp st(2)
fld dword [esp + 0x10]
fld st(0)
fld dword [esp + 0x8c]
fld st(0)
fmulp st(2)
fxch st(4)
faddp st(1)
fstp dword [ebp + 4]
fxch st(3)
fmulp st(2)
fmulp st(2)
fsubrp st(1)
fstp dword [ebp]
mov ebp, 8
add dword [esp + 0x28], ebp
add dword [esp + 0x14], ebp
add dword [esp + 0x34], ebp
add ecx, ebp
sub dword [esp + 0x24], 1
mov dword [esp + 0x10], ecx
jne 0x550c80
mov ebp, dword [esp + 0x54]
mov edx, dword [esp + 0x98]
mov ebx, dword [esp + 0x9c]
add dword [esp + 0x2c], edx
lea ecx, [edx*4]
add dword [esp + 0x1c], ecx
sub dword [esp + 0x40], 1
jne 0x550bc0
pop edi
pop esi
pop ebp
pop ebx
add esp, 0x84
ret