Function at 0x4e64c0
Capabilities:
Resolve function by parsing pe exports

Disassembly:
push ebp
mov ebp, esp
and esp, 0xfffffff8
sub esp, 0xdc
push ebx
push esi
mov esi, dword [ebp + 8]
cmp dword [esi], 0
push edi
lea edi, [esi + 4]
mov dword [esp + 0x14], edi
mov dword [esp + 0x3c], 0
jbe 0x4e69ba
lea ebx, [edi + 0x10]
lea ecx, [ecx]
fld dword [ebx - 4]
fstp dword [esp + 0x10]
fld dword [edi]
fstp dword [esp + 0xc]
fld dword [esp + 0x10]
fld st(0)
fld dword [esp + 0xc]
fld st(0)
fsubp st(2)
fxch st(1)
fstp dword [esp + 0x28]
mov eax, dword [esp + 0x28]
fld dword [ebx]
mov dword [esp + 0xc4], eax
fstp dword [esp + 0x10]
fld dword [ebx - 0xc]
fstp dword [esp + 0xc]
fld dword [esp + 0x10]
fld st(0)
fld dword [esp + 0xc]
fld st(0)
fsubp st(2)
fxch st(1)
fstp dword [esp + 0x2c]
mov ecx, dword [esp + 0x2c]
fld dword [ebx + 4]
mov dword [esp + 0xc8], ecx
fstp dword [esp + 0x10]
fld dword [ebx - 8]
fstp dword [esp + 0xc]
fld dword [esp + 0x10]
fld st(0)
fld dword [esp + 0xc]
fld st(0)
fsubp st(2)
fxch st(1)
fstp dword [esp + 0x30]
mov edx, dword [esp + 0x30]
fld dword [ebx + 8]
mov dword [esp + 0xcc], edx
fstp dword [esp + 0xc]
fld dword [esp + 0xc]
fld st(0)
fsubrp st(7)
fxch st(6)
fstp dword [esp + 0x40]
mov eax, dword [esp + 0x40]
fld dword [ebx + 0xc]
mov dword [esp + 0xd0], eax
fstp dword [esp + 0xc]
lea eax, [esp + 0xc4]
fld dword [esp + 0xc]
push eax
fld st(0)
fsubrp st(5)
fxch st(4)
fstp dword [esp + 0x48]
mov ecx, dword [esp + 0x48]
fld dword [ebx + 0x10]
mov dword [esp + 0xd8], ecx
fstp dword [esp + 0x10]
lea ecx, [esp + 0xd4]
fld dword [esp + 0x10]
push ecx
fld st(0)
fsubrp st(3)
fxch st(2)
fstp dword [esp + 0x50]
mov edx, dword [esp + 0x50]
fxch st(4)
mov dword [esp + 0xe0], edx
fsubrp st(5)
lea edx, [esp + 0xe4]
fxch st(4)
push edx
fstp dword [esp + 0x7c]
fsubrp st(1)
fstp dword [esp + 0x80]
fsubrp st(1)
fstp dword [esp + 0x84]
call fcn.00407df0
add esp, 0xc
lea ecx, [esp + 0xdc]
lea eax, [ebx + 0x14]
push ecx
push eax
call fcn.00402020
fld dword [ebx + 0x18]
fmul dword [ebx]
add esp, 8
fld dword [ebx + 0x14]
fmul dword [ebx - 4]
faddp st(1)
fld dword [ebx + 4]
fmul dword [ebx + 0x1c]
faddp st(1)
fstp dword [ebx + 0x20]
fld dword [esp + 0x2c]
fld dword [esp + 0x28]
fld dword [esp + 0x30]
fld st(1)
fmulp st(2)
fld st(2)
fmulp st(3)
fxch st(1)
faddp st(2)
fmul st(0), st(0)
faddp st(1)
fstp dword [esp + 0x24]
fld dword [esp + 0x44]
fld dword [esp + 0x40]
fld dword [esp + 0x48]
fld st(1)
fmulp st(2)
fld st(2)
fmulp st(3)
fxch st(1)
faddp st(2)
fmul st(0), st(0)
faddp st(1)
fstp dword [esp + 0x10]
fld dword [esp + 0x74]
fld dword [esp + 0x70]
fld dword [esp + 0x78]
fld st(1)
fmulp st(2)
fld st(2)
fmulp st(3)
fxch st(1)
faddp st(2)
fmul st(0), st(0)
faddp st(1)
fstp dword [esp + 0xc]
fld dword [esp + 0x24]
fld st(0)
fldz
fxch st(1)
fucompi st(1)
fstp st(0)
lahf
test ah, 0x44
jnp 0x4e6989
movss xmm1, dword [esp + 0x10]
xorps xmm0, xmm0
ucomiss xmm1, xmm0
lahf
test ah, 0x44
jnp 0x4e6989
movss xmm1, dword [esp + 0xc]
ucomiss xmm1, xmm0
lahf
test ah, 0x44
jnp 0x4e6989
fld dword [esp + 0x10]
fld st(0)
fadd st(2)
fld dword [esp + 0xc]
fld st(0)
fadd st(2)
fadd st(0), st(0)
fld1
fdivrp st(1)
fstp dword [esp + 0x10]
fld st(0)
faddp st(4)
fxch st(3)
fstp dword [esp + 0x14]
fld dword [edi]
fstp dword [esp + 0xc]
fld dword [esp + 0xc]
fld st(0)
fld dword [esp + 0x14]
fld st(0)
fmulp st(2)
fxch st(1)
fstp dword [esp + 0x50]
mov edx, dword [esp + 0x50]
fld dword [ebx - 0xc]
mov dword [esp + 0x18], edx
fstp dword [esp + 0xc]
fld dword [esp + 0xc]
fld st(0)
fmul st(2)
fstp dword [esp + 0x54]
mov eax, dword [esp + 0x54]
fld dword [ebx - 8]
mov dword [esp + 0x1c], eax
fstp dword [esp + 0xc]
fld dword [esp + 0xc]
fld st(0)
fmulp st(3)
fxch st(2)
fstp dword [esp + 0x58]
mov ecx, dword [esp + 0x58]
fxch st(3)
mov dword [esp + 0x20], ecx
fstp dword [esp + 0x14]
fld dword [ebx - 4]
fld dword [esp + 0x14]
fld st(0)
fmulp st(2)
fxch st(1)
fstp dword [esp + 0xa0]
fld dword [ebx]
fmul st(1)
fstp dword [esp + 0xa4]
fmul dword [ebx + 4]
fstp dword [esp + 0xa8]
fld dword [esp + 0xa0]
fadd dword [esp + 0x50]
fstp dword [esp + 0x18]
fld dword [esp + 0x1c]
fadd dword [esp + 0xa4]
fstp dword [esp + 0x1c]
fld dword [esp + 0x20]
fadd dword [esp + 0xa8]
fstp dword [esp + 0x20]
fxch st(4)
faddp st(3)
fxch st(2)
fstp dword [esp + 0x14]
fld dword [ebx + 8]
fld dword [esp + 0x14]
fld st(0)
fmulp st(2)
fxch st(1)
fstp dword [esp + 0x90]
fld dword [ebx + 0xc]
fmul st(1)
fstp dword [esp + 0x94]
fmul dword [ebx + 0x10]
fstp dword [esp + 0x98]
fld dword [esp + 0x90]
fadd dword [esp + 0x18]
fstp dword [esp + 0x18]
fld dword [esp + 0x94]
fadd dword [esp + 0x1c]
fstp dword [esp + 0x1c]
fld dword [esp + 0x98]
fadd dword [esp + 0x20]
fstp dword [esp + 0x20]
fld dword [esp + 0x18]
fld dword [esp + 0x10]
fld st(0)
fmulp st(2)
fxch st(1)
fstp dword [esp + 0x18]
mov edx, dword [esp + 0x18]
fld dword [esp + 0x1c]
mov dword [ebx + 0x24], edx
fmul st(1)
fstp dword [esp + 0x1c]
mov eax, dword [esp + 0x1c]
mov dword [ebx + 0x28], eax
fmul dword [esp + 0x20]
fstp dword [esp + 0x20]
mov ecx, dword [esp + 0x20]
fld dword [esp + 0x18]
mov dword [ebx + 0x2c], ecx
fld st(0)
fsubrp st(3)
fxch st(2)
fstp dword [esp + 0xb0]
fld dword [esp + 0x1c]
fld st(0)
fsubrp st(2)
fxch st(1)
fstp dword [esp + 0xb4]
fld dword [esp + 0x20]
fld st(0)
fsubrp st(4)
fxch st(3)
fstp dword [esp + 0xb8]
fld st(1)
fsub dword [ebx - 4]
fstp dword [esp + 0x60]
fld st(0)
fsub dword [ebx]
fstp dword [esp + 0x64]
fld st(2)
fsub dword [ebx + 4]
fstp dword [esp + 0x68]
fld dword [ebx + 8]
fsubp st(2)
fxch st(1)
fstp dword [esp + 0x80]
fsub dword [ebx + 0xc]
fstp dword [esp + 0x84]
fsub dword [ebx + 0x10]
fstp dword [esp + 0x88]
fld dword [esp + 0xb4]
fld dword [esp + 0xb0]
fld dword [esp + 0xb8]
fld st(2)
fmulp st(3)
fld st(1)
fmulp st(2)
fxch st(2)
faddp st(1)
fld st(1)
fmulp st(2)
faddp st(1)
fstp dword [esp + 0x24]
fld dword [esp + 0x64]
fld dword [esp + 0x60]
fld dword [esp + 0x68]
fld st(1)
fmulp st(2)
fld st(2)
fmulp st(3)
fxch st(1)
faddp st(2)
fmul st(0), st(0)
faddp st(1)
fstp dword [esp + 0x10]
fld dword [esp + 0x84]
fld dword [esp + 0x80]
fld dword [esp + 0x88]
fld st(1)
fmulp st(2)
fld st(2)
fmulp st(3)
fxch st(1)
faddp st(2)
fmul st(0), st(0)
faddp st(1)
fstp dword [esp + 0xc]
fld dword [esp + 0x24]
fld dword [esp + 0x10]
fcompi st(1)
fstp st(0)
jbe 0x4e694f
movss xmm0, dword [esp + 0x10]
movss dword [esp + 0x24], xmm0
fld dword [esp + 0x24]
fld dword [esp + 0xc]
fcompi st(1)
fstp st(0)
jbe 0x4e6969
movss xmm0, dword [esp + 0xc]
movss dword [esp + 0x24], xmm0
fld dword [esp + 0x24]
call fcn.004ad260
fstp dword [esp + 0x14]
fld dword [esp + 0x14]
add edi, 0x48
fstp dword [ebx + 0x30]
mov dword [esp + 0x14], edi
add ebx, 0x48
jmp 0x4e69a7
mov eax, dword [esi]
fstp st(0)
lea edx, [eax + eax*8]
mov eax, dword [ebp + 8]
lea esi, [esi + edx*8 - 0x44]
mov ecx, 0x12
rep movsd dword es:[edi], dword [esi]
add dword [eax], 0xffffffff
mov edi, dword [esp + 0x14]
mov esi, eax
mov eax, dword [esp + 0x3c]
add eax, 1
cmp eax, dword [esi]
mov dword [esp + 0x3c], eax
jb 0x4e64f0
pop edi
pop esi
pop ebx
mov esp, ebp
pop ebp
ret