Function at 0x40c580
Capabilities:
Resolve function by parsing pe exports

Disassembly:
push ebx
push esi
push edi
push ebp
sub esp, 0xc8
mov esi, dword [esp + 0xe8]
lea eax, [esp + 0x74]
mov ecx, esi
push eax
mov ebx, dword [esp + 0xe0]
mov edi, dword [esp + 0xe8]
mov ebp, dword [esp + 0xe4]
call fcn.00412140
fldz
fld dword [ebx + 4]
fmul dword [esp + 0x78]
fld dword [ebx]
fmul dword [esp + 0x74]
faddp st(1)
fld dword [ebx + 8]
fmul dword [esp + 0x7c]
faddp st(1)
fsub dword [esi + 0xc]
fstp dword [esp + 0x38]
fld dword [esp + 0x38]
fcomp dword [0x5ec574]
fnstsw ax
and ah, 5
cmp ah, 1
jne 0x40c5f0
fld dword [esp + 0x38]
fchs
jmp 0x40c5f4
fld dword [esp + 0x38]
fstp st(1)
fcom dword [ebx + 0xc]
fnstsw ax
test ah, 0x45
jne 0x40c610
xor al, al
add esp, 0xc8
fstp st(0)
pop ebp
pop edi
pop esi
pop ebx
ret
movzx eax, word [edi]
lea eax, [eax*4]
lea eax, [eax + eax*2]
add eax, ebp
fld dword [eax]
fstp dword [esp + 0x40]
fld dword [eax + 4]
fstp dword [esp + 0x44]
fld dword [eax + 8]
fstp dword [esp + 0x48]
movzx eax, word [edi + 2]
lea eax, [eax*4]
lea eax, [eax + eax*2]
add eax, ebp
fld dword [eax]
fstp dword [esp + 0x4c]
fld dword [eax + 4]
fstp dword [esp + 0x50]
fld dword [eax + 8]
fstp dword [esp + 0x54]
movzx eax, word [edi + 4]
lea edi, [esp + 0x80]
lea eax, [eax*4]
lea eax, [eax + eax*2]
add eax, ebp
fld dword [eax]
fstp dword [esp + 0x58]
fld dword [eax + 4]
fstp dword [esp + 0x5c]
fld dword [eax + 8]
fstp dword [esp + 0x60]
fld dword [esp + 0x4c]
fsub dword [esp + 0x40]
fst st(1)
fstp dword [esp + 0xa4]
fld dword [esp + 0x50]
fsub dword [esp + 0x44]
lea esi, [esp + 0xa4]
fst st(1)
fstp dword [esp + 0xa8]
fld dword [esp + 0x54]
fsub dword [esp + 0x48]
fst st(1)
fstp dword [esp + 0xac]
movsd dword es:[edi], dword [esi]
movsd dword es:[edi], dword [esi]
movsd dword es:[edi], dword [esi]
fld dword [esp + 0x84]
fst st(1)
fmul st(0)
fld dword [esp + 0x80]
fmul st(0)
faddp st(1)
fld dword [esp + 0x88]
fstp st(2)
fld st(1)
fmul st(0)
faddp st(1)
fst st(1)
fsqrt
fstp dword [esp + 0x68]
mov eax, dword [esp + 0x68]
fld dword [0x5ec57c]
mov dword [esp + 0x64], eax
lea eax, [esp + 0x74]
fdiv dword [esp + 0x64]
push eax
lea eax, [esp + 0xb4]
fstp st(1)
fld dword [esp + 0x84]
fmul st(1)
fstp dword [esp + 0x84]
fld dword [esp + 0x88]
fmul st(1)
fstp dword [esp + 0x88]
fld dword [esp + 0x8c]
lea ecx, [esp + 0x84]
fmul st(1)
push ecx
push eax
fstp dword [esp + 0x94]
fstp st(0)
call fcn.004ba350
lea esi, [esp + 0xbc]
lea edi, [esp + 0x98]
movsd dword es:[edi], dword [esi]
fldz
fldz
fldz
fldz
xor dl, dl
add esp, 0xc
movsd dword es:[edi], dword [esi]
movsd dword es:[edi], dword [esi]
fld dword [esp + 0x58]
fsub dword [esp + 0x40]
lea edi, [esp + 0x98]
fstp st(4)
fld st(3)
fstp dword [esp + 0xbc]
fld dword [esp + 0x5c]
fsub dword [esp + 0x44]
lea esi, [esp + 0xbc]
fstp st(4)
fld st(3)
fstp dword [esp + 0xc0]
fld dword [esp + 0x60]
fsub dword [esp + 0x48]
fstp st(4)
fld st(3)
fstp dword [esp + 0xc4]
movsd dword es:[edi], dword [esi]
movsd dword es:[edi], dword [esi]
movsd dword es:[edi], dword [esi]
fld dword [esp + 0x9c]
fstp st(2)
fld dword [esp + 0x84]
fstp st(4)
mov eax, dword [esp + 0x90]
fld st(3)
fmul st(2)
fld dword [esp + 0x80]
fmul dword [esp + 0x98]
mov dword [esp + 0x28], eax
mov eax, dword [esp + 0x94]
xor cl, cl
xor esi, esi
faddp st(1)
fld dword [esp + 0xa0]
fstp st(2)
fld dword [esp + 0x88]
fstp st(4)
fld st(3)
fmul st(2)
faddp st(1)
fstp dword [esp + 0x24]
fld dword [esp + 0x28]
fmul st(2)
fld dword [esp + 0x8c]
fmul dword [esp + 0x98]
mov dword [esp + 0x14], eax
faddp st(1)
fld dword [esp + 0x14]
fmul st(2)
faddp st(1)
fstp dword [esp + 0x10]
fld dword [ebx + 8]
fstp dword [esp + 0x18]
fld dword [esp + 0x18]
fsub dword [esp + 0x48]
fstp dword [esp + 0x2c]
mov eax, dword [esp + 0x2c]
mov dword [esp + 8], eax
mov eax, dword [esp + 8]
fld dword [ebx + 4]
fstp dword [esp + 0x1c]
fld dword [esp + 0x1c]
fsub dword [esp + 0x44]
fstp dword [esp + 0x30]
fld dword [esp + 0x30]
fstp st(1)
fld dword [ebx]
fstp dword [esp + 0x20]
fld dword [esp + 0x20]
fsub dword [esp + 0x40]
mov dword [esp + 0xa0], eax
fstp dword [esp + 0x34]
fld dword [esp + 0x34]
fstp st(2)
fld st(1)
fstp dword [esp + 0x98]
fst dword [esp + 0x9c]
fld dword [esp + 0x9c]
fstp st(2)
fld st(3)
fmul st(2)
fld dword [esp + 0x80]
fmul dword [esp + 0x98]
faddp st(1)
fld dword [esp + 0xa0]
fstp st(2)
fld st(3)
fmul st(2)
faddp st(1)
fstp st(4)
fld dword [esp + 0x28]
fmul st(2)
fld dword [esp + 0x8c]
fmul dword [esp + 0x98]
faddp st(1)
fld dword [esp + 0x14]
fmul st(2)
faddp st(1)
fstp st(3)
fld dword [0x5ec574]
fmul st(4)
fld dword [esp + 0x64]
fmul st(4)
fsubrp st(1)
fcomp dword [0x5ec574]
fnstsw ax
test ah, 5
jne 0x40c907
inc esi
mov dl, 1
fld dword [esp + 0x24]
fmul st(3)
fld dword [esp + 0x10]
fmul st(5)
fsubrp st(1)
fcomp dword [0x5ec574]
fnstsw ax
test ah, 5
jne 0x40c925
inc esi
mov cl, 1
fld st(3)
fsub dword [esp + 0x64]
fstp st(1)
fld dword [esp + 0x10]
fsub dword [0x5ec574]
fmul st(1)
fld st(3)
fsub dword [0x5ec574]
fld dword [esp + 0x24]
fsub dword [esp + 0x64]
fstp st(4)
fmul st(3)
fsubrp st(1)
fcomp dword [0x5ec574]
fnstsw ax
test ah, 5
jne 0x40c95d
inc esi
mov eax, esi
dec esi
cmp esi, 2
ja case.default.0x40c969
jmp dword [esi*4 + 0x5ec590]
fld dword [esp + 0x38]
fcomp dword [0x5ec574]
fnstsw ax
and ah, 5
cmp ah, 1
jne 0x40c990
fld dword [esp + 0x38]
fchs
jmp 0x40c994
fld dword [esp + 0x38]
fstp st(4)
jmp 0x40cdee
test dl, dl
jne 0x40cab6
fld dword [esp + 0x64]
fmul st(0)
fadd dword [0x5ec574]
fstp st(2)
fld st(2)
fmul dword [0x5ec574]
fld st(4)
fmul dword [esp + 0x64]
faddp st(1)
fdiv st(2)
fst st(1)
fcomp dword [0x5ec574]
fnstsw ax
test ah, 4
jne 0x40ca13
and ah, 0x45
test ah, 0x41
je 0x40ca13
fld dword [esp + 0x30]
fstp st(4)
fld st(3)
fmul st(0)
fld dword [esp + 0x34]
fmul st(0)
faddp st(1)
fld dword [esp + 0x2c]
fstp st(5)
fld st(4)
fmul st(0)
faddp st(1)
fstp st(4)
fld st(3)
fsqrt
fstp dword [esp + 0x68]
fld dword [esp + 0x68]
fstp st(4)
fld st(3)
fstp dword [esp + 0x3c]
jmp case.default.0x40c969
fcom dword [0x5ec57c]
fnstsw ax
test ah, 5
jne 0x40ca71
fld dword [esp + 0x18]
fsub dword [esp + 0x54]
fstp st(2)
fld dword [esp + 0x1c]
fsub dword [esp + 0x50]
fstp st(3)
fld dword [esp + 0x20]
fsub dword [esp + 0x4c]
fstp st(4)
fld st(2)
fstp st(3)
fld st(2)
fmul st(0)
fld st(4)
fmul st(0)
faddp st(1)
fld st(2)
fstp st(5)
fld st(4)
fmul st(0)
faddp st(1)
fstp st(4)
fld st(3)
fsqrt
fstp dword [esp + 0x68]
fld dword [esp + 0x68]
fstp st(4)
fld st(3)
fstp dword [esp + 0x3c]
jmp case.default.0x40c969
fld st(1)
fsqrt
fstp dword [esp + 0x68]
fld dword [esp + 0x68]
fstp st(2)
fld st(3)
fmul dword [0x5ec574]
fld st(3)
fmul dword [esp + 0x64]
fsubrp st(1)
fdiv st(2)
fstp st(4)
fld dword [esp + 0x38]
fmul st(0)
fld st(4)
fmul st(0)
faddp st(1)
fsqrt
fstp dword [esp + 0x68]
fld dword [esp + 0x68]
fstp st(4)
fld st(3)
fstp dword [esp + 0x3c]
jmp case.default.0x40c969
test cl, cl
jne 0x40cbd3
fld dword [esp + 0x10]
fmul st(0)
fld dword [esp + 0x24]
fmul st(0)
faddp st(1)
fstp st(2)
fld st(2)
fmul dword [esp + 0x10]
fld st(4)
fmul dword [esp + 0x24]
faddp st(1)
fdiv st(2)
fst st(1)
fcomp dword [0x5ec574]
fnstsw ax
test ah, 4
jne 0x40cb30
and ah, 0x45
test ah, 0x41
je 0x40cb30
fld dword [esp + 0x30]
fstp st(4)
fld st(3)
fmul st(0)
fld dword [esp + 0x34]
fmul st(0)
faddp st(1)
fld dword [esp + 0x2c]
fstp st(5)
fld st(4)
fmul st(0)
faddp st(1)
fstp st(4)
fld st(3)
fsqrt
fstp dword [esp + 0x68]
fld dword [esp + 0x68]
fstp st(4)
fld st(3)
fstp dword [esp + 0x3c]
jmp case.default.0x40c969
fcom dword [0x5ec57c]
fnstsw ax
test ah, 5
jne 0x40cb90
fld dword [esp + 0x18]
fsub dword [esp + 0x60]
fstp st(2)
fld dword [esp + 0x1c]
fsub dword [esp + 0x5c]
fstp st(3)
fld dword [esp + 0x20]
fsub dword [esp + 0x58]
fstp st(4)
fld st(2)
fstp st(3)
fld st(2)
fmul st(0)
fld st(4)
fmul st(0)
faddp st(1)
fld st(2)
fstp st(5)
fld st(4)
fmul st(0)
faddp st(1)
fstp st(4)
fld st(3)
fsqrt
fstp dword [esp + 0x68]
fld dword [esp + 0x68]
fstp st(4)
fld st(3)
fstp dword [esp + 0x3c]
jmp case.default.0x40c969
fld st(1)
fsqrt
fstp dword [esp + 0x68]
fld dword [esp + 0x68]
fstp st(2)
fld st(3)
fmul dword [esp + 0x10]
fld st(3)
fmul dword [esp + 0x24]
fsubrp st(1)
fdiv st(2)
fstp st(4)
fld dword [esp + 0x38]
fmul st(0)
fld st(4)
fmul st(0)
faddp st(1)
fsqrt
fstp dword [esp + 0x68]
fld dword [esp + 0x68]
fstp st(4)
fld st(3)
fstp dword [esp + 0x3c]
jmp case.default.0x40c969
fld dword [esp + 0x10]
fsub dword [0x5ec574]
fstp st(4)
fld st(3)
fmul st(0)
fld st(2)
fmul st(0)
faddp st(1)
fstp dword [esp]
fld st(2)
fsub dword [0x5ec574]
fmul st(4)
fld st(2)
fmul st(2)
faddp st(1)
fdiv dword [esp]
fstp dword [esp + 4]
fld dword [esp + 4]
fcomp dword [0x5ec574]
fnstsw ax
test ah, 4
jne 0x40cc70
and ah, 0x45
test ah, 0x41
je 0x40cc70
fld dword [esp + 0x18]
fsub dword [esp + 0x54]
fstp st(2)
fld dword [esp + 0x1c]
fsub dword [esp + 0x50]
fstp st(3)
fld dword [esp + 0x20]
fsub dword [esp + 0x4c]
fstp st(4)
fld st(2)
fstp st(3)
fld st(2)
fmul st(0)
fld st(4)
fmul st(0)
faddp st(1)
fld st(2)
fstp st(5)
fld st(4)
fmul st(0)
faddp st(1)
fstp st(4)
fld st(3)
fsqrt
fstp dword [esp + 0x68]
fld dword [esp + 0x68]
fstp st(4)
fld st(3)
fstp dword [esp + 0x3c]
jmp case.default.0x40c969
fld dword [esp + 4]
fcomp dword [0x5ec57c]
fnstsw ax
test ah, 5
jne 0x40ccd2
fld dword [esp + 0x18]
fsub dword [esp + 0x60]
fstp st(2)
fld dword [esp + 0x1c]
fsub dword [esp + 0x5c]
fstp st(3)
fld dword [esp + 0x20]
fsub dword [esp + 0x58]
fstp st(4)
fld st(2)
fstp st(3)
fld st(2)
fmul st(0)
fld st(4)
fmul st(0)
faddp st(1)
fld st(2)
fstp st(5)
fld st(4)
fmul st(0)
faddp st(1)
fstp st(4)
fld st(3)
fsqrt
fstp dword [esp + 0x68]
fld dword [esp + 0x68]
fstp st(4)
fld st(3)
fstp dword [esp + 0x3c]
jmp case.default.0x40c969
fld dword [esp]
fsqrt
fstp dword [esp + 0x68]
mov eax, dword [esp + 0x68]
fld st(3)
fmul st(1)
fld st(3)
fsub dword [0x5ec574]
mov dword [esp + 0xc], eax
fmul st(3)
fsubrp st(1)
fdiv dword [esp + 0xc]
fstp st(4)
fld dword [esp + 0x38]
fmul st(0)
fld st(4)
fmul st(0)
faddp st(1)
fsqrt
fstp dword [esp + 0x68]
fld dword [esp + 0x68]
fstp st(4)
fld st(3)
fstp dword [esp + 0x3c]
jmp case.default.0x40c969
test dl, dl
je 0x40cd71
fld dword [esp + 0x18]
fsub dword [esp + 0x60]
fstp st(2)
fld dword [esp + 0x1c]
fsub dword [esp + 0x5c]
fstp st(3)
fld dword [esp + 0x20]
fsub dword [esp + 0x58]
fstp st(4)
fld st(2)
fstp st(3)
fld st(2)
fmul st(0)
fld st(4)
fmul st(0)
faddp st(1)
fld st(2)
fstp st(5)
fld st(4)
fmul st(0)
faddp st(1)
fstp st(4)
fld st(3)
fsqrt
fstp dword [esp + 0x68]
fld dword [esp + 0x68]
fstp st(4)
fld st(3)
fstp dword [esp + 0x3c]
jmp case.default.0x40c969
test cl, cl
je 0x40cdc0
fld dword [esp + 0x18]
fsub dword [esp + 0x54]
fstp st(2)
fld dword [esp + 0x1c]
fsub dword [esp + 0x50]
fstp st(3)
fld dword [esp + 0x20]
fsub dword [esp + 0x4c]
fstp st(4)
fld st(2)
fstp st(3)
fld st(2)
fmul st(0)
fld st(4)
fmul st(0)
faddp st(1)
fld st(2)
fstp st(5)
fld st(4)
fmul st(0)
faddp st(1)
fstp st(4)
fld st(3)
fsqrt
fstp dword [esp + 0x68]
fld dword [esp + 0x68]
fstp st(4)
jmp 0x40cdee
fld dword [esp + 0x30]
fstp st(4)
fld st(3)
fmul st(0)
fld dword [esp + 0x34]
fmul st(0)
faddp st(1)
fld dword [esp + 0x2c]
fstp st(5)
fld st(4)
fmul st(0)
faddp st(1)
fstp st(4)
fld st(3)
fsqrt
fstp dword [esp + 0x68]
fld dword [esp + 0x68]
fstp st(4)
fld st(3)
fstp dword [esp + 0x3c]
fld dword [esp + 0x3c]
fcomp dword [ebx + 0xc]
fnstsw ax
and ah, 5
cmp ah, 1
jne 0x40ce16
fcompp
fcompp
add esp, 0xc8
mov al, 1
pop ebp
pop edi
pop esi
pop ebx
ret
xor al, al
fcompp
fcompp
add esp, 0xc8
pop ebp
pop edi
pop esi
pop ebx
ret