Function at 0x5ee1e0
Capabilities:
Resolve function by parsing pe exports

Disassembly:
push ebp
mov ebp, esp
and esp, 0xfffffff0
sub esp, 0x2b4
mov eax, dword [ebp + 0xc]
push ebx
mov ebx, dword [ebp + 0x14]
push esi
add ebx, 0x18
add eax, 0x54
push edi
mov edi, dword [ebp + 0x10]
mov dword [esp + 0x3c], eax
lea ecx, [edi + 0x28]
lea eax, [esp + 0x1c4]
mov dword [esp + 0xc], 2
fld dword [ecx - 0x28]
mov esi, dword [ecx + 8]
fsub dword [edi + 0xf0]
mov edx, dword [ecx - 8]
mov dword [eax - 0x44], edx
mov edx, dword [ecx - 4]
fstp dword [esp + 0x150]
mov dword [eax - 0x40], edx
fld dword [ecx - 0x24]
mov edx, dword [ecx]
fsub dword [edi + 0xf4]
mov dword [eax - 0x3c], edx
mov edx, dword [ecx + 4]
mov dword [eax - 0x38], edx
fstp dword [esp + 0x154]
mov dl, byte [edi + 0xbc]
test dl, dl
fld dword [ecx - 0x20]
fsub dword [edi + 0xf8]
mov byte [esp + 0x5e], dl
fstp dword [esp + 0x158]
fld dword [ecx - 0x28]
fsub dword [esi + 0x40]
fstp dword [esp + 0x120]
fld dword [ecx - 0x24]
fsub dword [esi + 0x44]
fstp dword [esp + 0x124]
fld dword [ecx - 0x20]
fsub dword [esi + 0x48]
fstp dword [esp + 0x128]
fld dword [esp + 0x154]
fmul dword [ecx]
fld dword [esp + 0x158]
fmul dword [ecx - 4]
fsubp st(1)
fld dword [esp + 0x158]
fmul dword [ecx - 8]
fld dword [esp + 0x150]
fmul dword [ecx]
fsubp st(1)
fstp dword [esp + 0x44]
fld dword [esp + 0x150]
fmul dword [ecx - 4]
fld dword [esp + 0x154]
fmul dword [ecx - 8]
fsubp st(1)
fstp dword [esp + 0x48]
je 0x5ee2ee
mov edx, dword [esp + 0x44]
fstp dword [eax - 0x34]
mov dword [eax - 0x30], edx
mov edx, dword [esp + 0x48]
mov dword [eax - 0x2c], edx
jmp 0x5ee357
fld dword [esp + 0x48]
fmul dword [edi + 0x120]
fld dword [esp + 0x44]
fmul dword [edi + 0x110]
faddp st(1)
fld st(1)
fmul dword [edi + 0x100]
faddp st(1)
fstp dword [eax - 0x34]
fld dword [esp + 0x48]
fmul dword [edi + 0x124]
fld dword [esp + 0x44]
fmul dword [edi + 0x114]
faddp st(1)
fld st(1)
fmul dword [edi + 0x104]
faddp st(1)
fstp dword [eax - 0x30]
fld dword [esp + 0x48]
fmul dword [edi + 0x128]
fld dword [esp + 0x44]
fmul dword [edi + 0x118]
faddp st(1)
fxch st(1)
fmul dword [edi + 0x108]
faddp st(1)
fstp dword [eax - 0x2c]
fld dword [esp + 0x128]
mov dl, byte [esi + 0xc]
test dl, dl
fmul dword [ecx - 4]
fld dword [esp + 0x124]
mov dword [eax - 0x28], 0
fmul dword [ecx]
mov byte [esp + 0x5f], dl
fsubp st(1)
fld dword [esp + 0x120]
fmul dword [ecx]
fld dword [esp + 0x128]
fmul dword [ecx - 8]
fsubp st(1)
fstp dword [esp + 0x114]
fld dword [esp + 0x124]
fmul dword [ecx - 8]
fld dword [esp + 0x120]
fmul dword [ecx - 4]
fsubp st(1)
fstp dword [esp + 0x118]
je 0x5ee3d0
mov edx, dword [esp + 0x114]
fstp dword [eax - 0x24]
mov dword [eax - 0x20], edx
mov edx, dword [esp + 0x118]
mov dword [eax - 0x1c], edx
jmp 0x5ee430
fld dword [esp + 0x118]
fmul dword [esi + 0x70]
fld dword [esp + 0x114]
fmul dword [esi + 0x60]
faddp st(1)
fld st(1)
fmul dword [esi + 0x50]
faddp st(1)
fstp dword [eax - 0x24]
fld dword [esp + 0x118]
fmul dword [esi + 0x74]
fld dword [esp + 0x114]
fmul dword [esi + 0x64]
faddp st(1)
fld st(1)
fmul dword [esi + 0x54]
faddp st(1)
fstp dword [eax - 0x20]
fld dword [esp + 0x118]
fmul dword [esi + 0x78]
fld dword [esp + 0x114]
fmul dword [esi + 0x68]
faddp st(1)
fxch st(1)
fmul dword [esi + 0x58]
faddp st(1)
fstp dword [eax - 0x1c]
mov dword [eax - 0x18], 0
fld dword [eax - 0x34]
fmul dword [eax - 0x34]
mov edx, dword [esp + 0x3c]
fld dword [eax - 0x30]
fmul dword [eax - 0x30]
fld dword [eax - 0x2c]
fmul dword [eax - 0x2c]
fstp dword [esp + 0x168]
fld dword [eax - 0x24]
fmul dword [eax - 0x24]
fstp dword [esp + 0x170]
fld dword [eax - 0x20]
fmul dword [eax - 0x20]
fstp dword [esp + 0x174]
fld dword [eax - 0x1c]
fmul dword [eax - 0x1c]
fstp dword [esp + 0x178]
fxch st(1)
fmul dword [edi + 0xe0]
fstp dword [esp + 0x160]
fmul dword [edi + 0xe4]
fld dword [esp + 0x168]
fmul dword [edi + 0xe8]
fld dword [esp + 0x170]
fmul dword [esi + 0x30]
fld dword [esp + 0x174]
fmul dword [esi + 0x34]
fld dword [esp + 0x178]
fmul dword [esi + 0x38]
fstp dword [esp + 0x178]
fxch st(1)
fadd dword [esp + 0x160]
fstp dword [esp + 0x160]
fadd st(2)
fstp dword [esp + 0x164]
fld dword [esp + 0x178]
fadd st(1)
fstp st(2)
fstp st(0)
fld dword [esi + 0x3c]
fadd dword [edi + 0xec]
fadd dword [0x6719c4]
fstp dword [esp + 0x58]
fadd dword [esp + 0x164]
fadd dword [esp + 0x160]
fadd dword [esp + 0x58]
fst dword [eax - 0x18]
fld dword [0x6419bc]
fdiv st(1)
fstp dword [eax - 0x28]
fadd dword [edx]
mov edx, dword [ecx - 0x18]
fst dword [eax + 0x38]
fld dword [0x6419bc]
fdiv st(1)
fstp dword [eax + 0x34]
mov dword [eax - 0x14], edx
mov edx, dword [ecx - 0x14]
fstp st(0)
mov dword [eax - 0x10], edx
fld dword [ecx - 0x28]
mov edx, dword [ecx - 0x10]
fsub dword [edi + 0xf0]
mov dword [eax - 0xc], edx
mov edx, dword [ecx - 0xc]
mov dword [eax - 8], edx
fstp dword [esp + 0x130]
fld dword [ecx - 0x24]
fsub dword [edi + 0xf4]
fstp dword [esp + 0x134]
fld dword [ecx - 0x20]
fsub dword [edi + 0xf8]
fstp dword [esp + 0x138]
fld dword [ecx - 0x28]
fsub dword [esi + 0x40]
fstp dword [esp + 0x140]
fld dword [ecx - 0x24]
fsub dword [esi + 0x44]
fstp dword [esp + 0x144]
fld dword [ecx - 0x20]
mov dl, byte [esp + 0x5e]
test dl, dl
fsub dword [esi + 0x48]
fstp dword [esp + 0x148]
fld dword [esp + 0x134]
fmul dword [ecx - 0x10]
fld dword [esp + 0x138]
fmul dword [ecx - 0x14]
fsubp st(1)
fld dword [esp + 0x138]
fmul dword [ecx - 0x18]
fld dword [esp + 0x130]
fmul dword [ecx - 0x10]
fsubp st(1)
fstp dword [esp + 0x104]
fld dword [esp + 0x130]
fmul dword [ecx - 0x14]
fld dword [esp + 0x134]
fmul dword [ecx - 0x18]
fsubp st(1)
fstp dword [esp + 0x108]
je 0x5ee60c
mov edx, dword [esp + 0x104]
fstp dword [eax - 4]
mov dword [eax], edx
mov edx, dword [esp + 0x108]
mov dword [eax + 4], edx
jmp 0x5ee684
fld dword [esp + 0x108]
fmul dword [edi + 0x120]
fld dword [esp + 0x104]
fmul dword [edi + 0x110]
faddp st(1)
fld st(1)
fmul dword [edi + 0x100]
faddp st(1)
fstp dword [eax - 4]
fld st(0)
fmul dword [edi + 0x104]
fld dword [esp + 0x108]
fmul dword [edi + 0x124]
faddp st(1)
fld dword [esp + 0x104]
fmul dword [edi + 0x114]
faddp st(1)
fstp dword [eax]
fmul dword [edi + 0x108]
fld dword [esp + 0x108]
fmul dword [edi + 0x128]
faddp st(1)
fld dword [esp + 0x104]
fmul dword [edi + 0x118]
faddp st(1)
fstp dword [eax + 4]
fld dword [esp + 0x148]
mov dl, byte [esp + 0x5f]
test dl, dl
fmul dword [ecx - 0x14]
fld dword [esp + 0x144]
mov dword [eax + 8], 0
fmul dword [ecx - 0x10]
fsubp st(1)
fld dword [esp + 0x140]
fmul dword [ecx - 0x10]
fld dword [esp + 0x148]
fmul dword [ecx - 0x18]
fsubp st(1)
fstp dword [esp + 0x84]
fld dword [esp + 0x144]
fmul dword [ecx - 0x18]
fld dword [esp + 0x140]
fmul dword [ecx - 0x14]
fsubp st(1)
fstp dword [esp + 0x88]
je 0x5ee6fc
mov edx, dword [esp + 0x84]
fstp dword [eax + 0xc]
mov dword [eax + 0x10], edx
mov edx, dword [esp + 0x88]
mov dword [eax + 0x14], edx
jmp 0x5ee75c
fld dword [esp + 0x88]
fmul dword [esi + 0x70]
fld dword [esp + 0x84]
fmul dword [esi + 0x60]
faddp st(1)
fld st(1)
fmul dword [esi + 0x50]
faddp st(1)
fstp dword [eax + 0xc]
fld dword [esp + 0x88]
fmul dword [esi + 0x74]
fld dword [esp + 0x84]
fmul dword [esi + 0x64]
faddp st(1)
fld st(1)
fmul dword [esi + 0x54]
faddp st(1)
fstp dword [eax + 0x10]
fld dword [esp + 0x88]
fmul dword [esi + 0x78]
fld dword [esp + 0x84]
fmul dword [esi + 0x68]
faddp st(1)
fxch st(1)
fmul dword [esi + 0x58]
faddp st(1)
fstp dword [eax + 0x14]
mov dword [eax + 0x18], 0
fld dword [eax - 4]
fmul dword [eax - 4]
fld dword [eax]
fmul dword [eax]
fld dword [eax + 4]
fmul dword [eax + 4]
fstp dword [esp + 0x68]
fld dword [eax + 0xc]
fmul dword [eax + 0xc]
fstp dword [esp + 0xa0]
fld dword [eax + 0x10]
fmul dword [eax + 0x10]
fstp dword [esp + 0xa4]
fld dword [eax + 0x14]
fmul dword [eax + 0x14]
fstp dword [esp + 0xa8]
fxch st(1)
fmul dword [edi + 0xe0]
fstp dword [esp + 0x60]
fmul dword [edi + 0xe4]
fld dword [esp + 0x68]
fmul dword [edi + 0xe8]
fld dword [esp + 0xa0]
fmul dword [esi + 0x30]
fld dword [esp + 0xa4]
fmul dword [esi + 0x34]
fld dword [esp + 0xa8]
fmul dword [esi + 0x38]
fstp dword [esp + 0xa8]
fxch st(1)
fadd dword [esp + 0x60]
fstp dword [esp + 0x60]
fadd st(2)
fstp dword [esp + 0x64]
fld dword [esp + 0xa8]
fadd st(1)
fstp st(2)
fstp st(0)
fadd dword [esp + 0x60]
fadd dword [esp + 0x64]
fadd dword [esp + 0x58]
fst dword [eax + 0x18]
fld dword [0x6419bc]
fdiv st(1)
fstp dword [eax + 8]
mov edx, dword [eax + 8]
mov dword [eax + 0x2c], edx
mov edx, dword [eax + 0x18]
fstp st(0)
fld dword [edi + 0x140]
mov dword [eax + 0x30], edx
mov edx, dword [ecx + 0xc]
fsub dword [edx + 0x10]
fld dword [edi + 0x144]
fsub dword [edx + 0x14]
fld dword [edi + 0x148]
fsub dword [edx + 0x18]
fstp dword [esp + 0xf8]
fld dword [edi + 0x150]
fmul dword [eax - 0x34]
fstp dword [esp + 0x10]
fld dword [edi + 0x154]
fmul dword [eax - 0x30]
fstp dword [esp + 0x14]
fld dword [edi + 0x158]
fmul dword [eax - 0x2c]
fstp dword [esp + 0x18]
fld dword [edx + 0x20]
fmul dword [eax - 0x24]
fstp dword [esp + 0xc0]
fld dword [edx + 0x24]
fmul dword [eax - 0x20]
fstp dword [esp + 0xc4]
fld dword [edx + 0x28]
fmul dword [eax - 0x1c]
fstp dword [esp + 0xc8]
fxch st(1)
fmul dword [eax - 0x44]
fstp dword [esp + 0xf0]
fmul dword [eax - 0x40]
add ecx, 0x50
fld dword [esp + 0xf8]
fmul dword [eax - 0x3c]
fld dword [esp + 0xc0]
fadd dword [esp + 0x10]
fld dword [esp + 0xc4]
fadd dword [esp + 0x14]
fld dword [esp + 0xc8]
fadd dword [esp + 0x18]
fstp dword [esp + 0x18]
fxch st(1)
fadd dword [esp + 0xf0]
fstp dword [esp + 0x10]
fadd st(2)
fstp dword [esp + 0x14]
fld dword [esp + 0x18]
fadd st(1)
fstp st(2)
fstp st(0)
fld dword [edi + 0x140]
fsub dword [edx + 0x10]
fld dword [edi + 0x144]
fsub dword [edx + 0x14]
fld dword [edi + 0x148]
fsub dword [edx + 0x18]
fstp dword [esp + 0x98]
fld dword [edi + 0x150]
fmul dword [eax - 4]
fstp dword [esp + 0x20]
fld dword [edi + 0x154]
fmul dword [eax]
fstp dword [esp + 0x24]
fld dword [eax + 4]
fmul dword [edi + 0x158]
fstp dword [esp + 0x28]
fld dword [edx + 0x20]
fmul dword [eax + 0xc]
fstp dword [esp + 0xd0]
fld dword [edx + 0x24]
fmul dword [eax + 0x10]
fstp dword [esp + 0xd4]
fld dword [edx + 0x28]
fmul dword [eax + 0x14]
fstp dword [esp + 0xd8]
fxch st(1)
fmul dword [eax - 0x14]
fstp dword [esp + 0x90]
fmul dword [eax - 0x10]
fld dword [esp + 0x98]
fmul dword [eax - 0xc]
fld dword [esp + 0xd0]
fadd dword [esp + 0x20]
fld dword [esp + 0xd4]
fadd dword [esp + 0x24]
fld dword [esp + 0xd8]
fadd dword [esp + 0x28]
fstp dword [esp + 0x28]
fxch st(1)
fadd dword [esp + 0x90]
fstp dword [esp + 0x20]
fadd st(2)
fstp dword [esp + 0x24]
fld dword [esp + 0x28]
fadd st(1)
fstp st(2)
fstp st(0)
fld dword [esp + 0x20]
fadd st(1)
fadd dword [esp + 0x24]
fadd dword [ebx - 4]
fstp dword [ebx - 4]
fstp st(0)
fld dword [esp + 0x10]
fadd st(1)
fadd dword [esp + 0x14]
fadd dword [ebx]
fstp dword [ebx]
fstp st(0)
add dword [esp + 0x3c], 0x64
mov edx, dword [esp + 0xc]
add eax, 0xa0
add ebx, 0x1c
dec edx
mov dword [esp + 0xc], edx
jne 0x5ee214
fld dword [esp + 0x250]
mov ecx, dword [edi + 0x30]
fmul dword [esp + 0x1b0]
mov eax, dword [edi + 0x80]
cmp ecx, eax
fld dword [esp + 0x254]
fmul dword [esp + 0x1b4]
fld dword [esp + 0x258]
fmul dword [esp + 0x1b8]
fstp dword [esp + 0x98]
fld dword [esp + 0x1c0]
fmul dword [esp + 0x260]
jne 0x5eebc6
fstp dword [esp + 0x10]
mov eax, dword [ecx + 0x3c]
fld dword [esp + 0x1c4]
mov dword [esp + 0x3c], eax
fmul dword [esp + 0x264]
fstp dword [esp + 0x14]
fld dword [esp + 0x1c8]
fmul dword [esp + 0x268]
fstp dword [esp + 0x18]
fld dword [esp + 0x270]
fmul dword [esp + 0x1d0]
fstp dword [esp + 0x20]
fld dword [esp + 0x274]
fmul dword [esp + 0x1d4]
fstp dword [esp + 0x24]
fld dword [esp + 0x278]
fmul dword [esp + 0x1d8]
fstp dword [esp + 0x28]
fld dword [edi + 0xec]
fld st(0)
fmul st(3)
fstp dword [esp + 0x80]
fld st(0)
fmul st(2)
fstp dword [esp + 0x84]
fmul dword [esp + 0x98]
fstp dword [esp + 0x88]
fld dword [esp + 0x3c]
fmul st(2)
fstp dword [esp + 0xf0]
fld dword [esp + 0x3c]
fmul st(1)
fstp st(2)
fstp st(0)
fld dword [esp + 0x3c]
fmul dword [esp + 0x98]
fld dword [esp + 0x10]
fmul dword [edi + 0xe0]
fstp dword [esp + 0x10]
fld dword [esp + 0x14]
fmul dword [edi + 0xe4]
fstp dword [esp + 0x14]
fld dword [esp + 0x18]
fmul dword [edi + 0xe8]
fstp dword [esp + 0x18]
fld dword [esp + 0x20]
fmul dword [ecx + 0x30]
fstp dword [esp + 0x20]
fld dword [esp + 0x24]
fmul dword [ecx + 0x34]
fstp dword [esp + 0x24]
fld dword [esp + 0x28]
fmul dword [ecx + 0x38]
fstp dword [esp + 0x28]
fld dword [esp + 0xf0]
fadd dword [esp + 0x80]
fstp dword [esp + 0x80]
fxch st(1)
fadd dword [esp + 0x84]
fstp dword [esp + 0x84]
fadd dword [esp + 0x88]
fld dword [esp + 0x20]
fadd dword [esp + 0x10]
fld dword [esp + 0x24]
fadd dword [esp + 0x14]
fld dword [esp + 0x28]
fadd dword [esp + 0x18]
fstp dword [esp + 0x18]
fld dword [esp + 0x80]
fadd st(2)
fstp dword [esp + 0x10]
fld dword [esp + 0x84]
fadd st(1)
fstp st(2)
fstp st(0)
fxch st(1)
fadd dword [esp + 0x18]
fld dword [esp + 0x10]
fadd st(1)
fadd st(2)
fstp dword [esp + 0x3c]
fstp st(0)
fstp st(0)
jmp 0x5eec61
fstp dword [esp + 0x20]
mov edx, dword [edi + 0xec]
fld dword [esp + 0x1c4]
mov dword [esp + 0x3c], edx
fmul dword [esp + 0x264]
fstp dword [esp + 0x24]
fld dword [esp + 0x1c8]
fmul dword [esp + 0x268]
fstp dword [esp + 0x28]
fld dword [esp + 0x3c]
fmul st(2)
fstp dword [esp + 0xf0]
fmul dword [esp + 0x3c]
fstp st(1)
fld dword [esp + 0x98]
fmul dword [esp + 0x3c]
fld dword [esp + 0x20]
fmul dword [edi + 0xe0]
fld dword [esp + 0x24]
fmul dword [edi + 0xe4]
fld dword [esp + 0x28]
fmul dword [edi + 0xe8]
fstp dword [esp + 0x28]
fld dword [esp + 0xf0]
fadd st(2)
fstp dword [esp + 0x20]
fxch st(3)
fadd st(3)
fstp dword [esp + 0x24]
fstp st(2)
fstp st(1)
fadd dword [esp + 0x28]
fadd dword [esp + 0x24]
fadd dword [esp + 0x20]
fstp dword [esp + 0x3c]
fld dword [esp + 0x294]
fmul dword [esp + 0x1f4]
fld dword [esp + 0x3c]
fmul dword [esp + 0x3c]
fsubp st(1)
fld st(0)
fmul st(1)
fcomp dword [0x641de0]
fnstsw ax
test ah, 5
jnp 0x5eecbf
fdivr dword [0x6419bc]
fld dword [esp + 0x294]
fmul st(1)
fstp dword [esp + 0xa0]
fld dword [esp + 0x3c]
fmul st(1)
fchs
fst dword [esp + 0xa8]
fstp dword [esp + 0xa4]
fmul dword [esp + 0x1f4]
jmp 0x5eecc8
fstp st(0)
fld dword [esp + 0xac]
mov ebx, dword [ebp + 0x14]
fld dword [0x641de0]
mov eax, dword [ebx + 0x10]
mov dword [esp + 0xc], eax
fld dword [esp + 0xc]
fucompp
fnstsw ax
test ah, 0x44
jnp 0x5eeee9
fld dword [esp + 0xc]
fmul dword [edi + 0xe0]
fld dword [esp + 0xc]
fmul dword [edi + 0xe4]
fld dword [esp + 0xc]
fmul dword [edi + 0xe8]
fstp dword [esp + 0x18]
fld dword [esp + 0xc]
fmul dword [edi + 0xec]
fstp dword [esp + 0x1c]
fld dword [esp + 0xc]
fmul dword [ecx + 0x30]
fstp dword [esp + 0x40]
fld dword [esp + 0xc]
fmul dword [ecx + 0x34]
fstp dword [esp + 0x44]
fld dword [esp + 0xc]
fmul dword [ecx + 0x38]
fstp dword [esp + 0x48]
fld dword [esp + 0xc]
fmul dword [ecx + 0x3c]
fstp dword [esp + 0x4c]
fld dword [esp + 0x180]
fmul dword [esp + 0x1c]
fld dword [esp + 0x184]
fmul dword [esp + 0x1c]
fld dword [esp + 0x188]
fmul dword [esp + 0x1c]
fstp dword [esp + 0x68]
fld dword [esp + 0x18c]
fmul dword [esp + 0x1c]
fstp dword [esp + 0x6c]
fld dword [esp + 0x180]
fmul dword [esp + 0x4c]
fstp dword [esp + 0x20]
fld dword [esp + 0x184]
fmul dword [esp + 0x4c]
fstp dword [esp + 0x24]
fld dword [esp + 0x188]
fmul dword [esp + 0x4c]
fstp dword [esp + 0x28]
fld dword [esp + 0x18c]
fmul dword [esp + 0x4c]
fstp dword [esp + 0x2c]
fxch st(1)
fadd dword [edi + 0xc0]
fstp dword [edi + 0xc0]
fadd dword [edi + 0xc4]
fstp dword [edi + 0xc4]
fld dword [esp + 0x68]
fadd dword [edi + 0xc8]
fstp dword [edi + 0xc8]
fld dword [esp + 0x6c]
fadd dword [edi + 0xcc]
fstp dword [edi + 0xcc]
fld dword [ecx + 0x10]
fsub dword [esp + 0x20]
fstp dword [ecx + 0x10]
fld dword [ecx + 0x14]
fsub dword [esp + 0x24]
fstp dword [ecx + 0x14]
fld dword [ecx + 0x18]
fsub dword [esp + 0x28]
fstp dword [ecx + 0x18]
fld dword [ecx + 0x1c]
fsub dword [esp + 0x2c]
fstp dword [ecx + 0x1c]
fld dword [esp + 0x190]
fmul st(2)
fstp dword [esp + 0x10]
fld dword [esp + 0x194]
fmul st(1)
fstp st(2)
fstp st(0)
fld dword [esp + 0x198]
fmul dword [esp + 0x18]
fld dword [esp + 0x19c]
fmul dword [esp + 0x1c]
fstp dword [esp + 0x1c]
fld dword [esp + 0x1a0]
fmul dword [esp + 0x40]
fstp dword [esp + 0x40]
fld dword [esp + 0x1a4]
fmul dword [esp + 0x44]
fstp dword [esp + 0x44]
fld dword [esp + 0x1a8]
fmul dword [esp + 0x48]
fstp dword [esp + 0x48]
fld dword [esp + 0x1ac]
fmul dword [esp + 0x4c]
fstp dword [esp + 0x4c]
fld dword [esp + 0x10]
fadd dword [edi + 0xd0]
fstp dword [edi + 0xd0]
fxch st(1)
fadd dword [edi + 0xd4]
fstp dword [edi + 0xd4]
fadd dword [edi + 0xd8]
fstp dword [edi + 0xd8]
fld dword [esp + 0x1c]
fadd dword [edi + 0xdc]
fstp dword [edi + 0xdc]
fld dword [esp + 0x40]
fadd dword [ecx + 0x20]
fstp dword [ecx + 0x20]
fld dword [esp + 0x44]
fadd dword [ecx + 0x24]
fstp dword [ecx + 0x24]
fld dword [esp + 0x48]
fadd dword [ecx + 0x28]
fstp dword [ecx + 0x28]
fld dword [esp + 0x4c]
fadd dword [ecx + 0x2c]
fstp dword [ecx + 0x2c]
mov ecx, dword [ebx + 0x2c]
fld dword [0x641de0]
mov dword [esp + 0xc], ecx
fld dword [esp + 0xc]
fucompp
fnstsw ax
test ah, 0x44
jnp 0x5ef109
fld dword [esp + 0xc]
mov eax, dword [edi + 0x80]
fmul dword [edi + 0xe0]
fld dword [esp + 0xc]
fmul dword [edi + 0xe4]
fld dword [esp + 0xc]
fmul dword [edi + 0xe8]
fstp dword [esp + 0x18]
fld dword [esp + 0xc]
fmul dword [edi + 0xec]
fstp dword [esp + 0x1c]
fld dword [esp + 0xc]
fmul dword [eax + 0x30]
fstp dword [esp + 0x40]
fld dword [esp + 0xc]
fmul dword [eax + 0x34]
fstp dword [esp + 0x44]
fld dword [esp + 0xc]
fmul dword [eax + 0x38]
fstp dword [esp + 0x48]
fld dword [esp + 0xc]
fmul dword [eax + 0x3c]
fstp dword [esp + 0x4c]
fld dword [esp + 0x220]
fmul dword [esp + 0x1c]
fld dword [esp + 0x224]
fmul dword [esp + 0x1c]
fld dword [esp + 0x228]
fmul dword [esp + 0x1c]
fstp dword [esp + 0x68]
fld dword [esp + 0x22c]
fmul dword [esp + 0x1c]
fstp dword [esp + 0x6c]
fld dword [esp + 0x220]
fmul dword [esp + 0x4c]
fstp dword [esp + 0x20]
fld dword [esp + 0x224]
fmul dword [esp + 0x4c]
fstp dword [esp + 0x24]
fld dword [esp + 0x228]
fmul dword [esp + 0x4c]
fstp dword [esp + 0x28]
fld dword [esp + 0x22c]
fmul dword [esp + 0x4c]
fstp dword [esp + 0x2c]
fxch st(1)
fadd dword [edi + 0xc0]
fstp dword [edi + 0xc0]
fadd dword [edi + 0xc4]
fstp dword [edi + 0xc4]
fld dword [esp + 0x68]
fadd dword [edi + 0xc8]
fstp dword [edi + 0xc8]
fld dword [esp + 0x6c]
fadd dword [edi + 0xcc]
fstp dword [edi + 0xcc]
fld dword [eax + 0x10]
fsub dword [esp + 0x20]
fstp dword [eax + 0x10]
fld dword [eax + 0x14]
fsub dword [esp + 0x24]
fstp dword [eax + 0x14]
fld dword [eax + 0x18]
fsub dword [esp + 0x28]
fstp dword [eax + 0x18]
fld dword [eax + 0x1c]
fsub dword [esp + 0x2c]
fstp dword [eax + 0x1c]
fld dword [esp + 0x230]
fmul st(2)
fstp dword [esp + 0x10]
fmul dword [esp + 0x234]
fstp st(1)
fld dword [esp + 0x18]
fmul dword [esp + 0x238]
fld dword [esp + 0x1c]
fmul dword [esp + 0x23c]
fstp dword [esp + 0x1c]
fld dword [esp + 0x40]
fmul dword [esp + 0x240]
fstp dword [esp + 0x40]
fld dword [esp + 0x44]
fmul dword [esp + 0x244]
fstp dword [esp + 0x44]
fld dword [esp + 0x48]
fmul dword [esp + 0x248]
fstp dword [esp + 0x48]
fld dword [esp + 0x4c]
fmul dword [esp + 0x24c]
fstp dword [esp + 0x4c]
fld dword [esp + 0x10]
fadd dword [edi + 0xd0]
fstp dword [edi + 0xd0]
fxch st(1)
fadd dword [edi + 0xd4]
fstp dword [edi + 0xd4]
fadd dword [edi + 0xd8]
fstp dword [edi + 0xd8]
fld dword [esp + 0x1c]
fadd dword [edi + 0xdc]
fstp dword [edi + 0xdc]
fld dword [esp + 0x40]
fadd dword [eax + 0x20]
fstp dword [eax + 0x20]
fld dword [esp + 0x44]
fadd dword [eax + 0x24]
fstp dword [eax + 0x24]
fld dword [esp + 0x48]
fadd dword [eax + 0x28]
fstp dword [eax + 0x28]
fld dword [esp + 0x4c]
fadd dword [eax + 0x2c]
fstp dword [eax + 0x2c]
fld dword [edi + 0x44]
mov eax, dword [ebp + 0xc]
fld dword [edi + 0x94]
lea esi, [ebx + 0x18]
fld st(0)
lea edx, [edi + 0x48]
fadd st(2)
lea ecx, [esp + 0x1c8]
mov dword [esp + 0x78], 2
fld st(0)
fmul dword [eax + 0x68]
fxch st(3)
fmul dword [eax + 0x64]
faddp st(3)
fxch st(2)
fstp dword [esp + 0x1ec]
fxch st(1)
fmul dword [eax + 0xcc]
fxch st(1)
fmul dword [eax + 0xc8]
xor eax, eax
mov dword [ebx + 8], eax
mov dword [ebx + 0x24], eax
faddp st(1)
fstp dword [esp + 0x28c]
mov eax, dword [edx - 0x18]
fld dword [edi + 0xc0]
fsub dword [eax + 0x10]
fld dword [edi + 0xc4]
fsub dword [eax + 0x14]
fld dword [edi + 0xc8]
fsub dword [eax + 0x18]
fstp dword [esp + 0x98]
fld dword [ecx - 0x38]
fmul dword [edi + 0xd0]
fstp dword [esp + 0x20]
fld dword [ecx - 0x34]
fmul dword [edi + 0xd4]
fstp dword [esp + 0x24]
fld dword [ecx - 0x30]
fmul dword [edi + 0xd8]
fstp dword [esp + 0x28]
fld dword [ecx - 0x28]
fmul dword [eax + 0x20]
fstp dword [esp + 0xd0]
fld dword [ecx - 0x24]
fmul dword [eax + 0x24]
fstp dword [esp + 0xd4]
fld dword [ecx - 0x20]
fmul dword [eax + 0x28]
fstp dword [esp + 0xd8]
fxch st(1)
fmul dword [ecx - 0x48]
fstp dword [esp + 0x90]
fmul dword [ecx - 0x44]
fld dword [esp + 0x98]
fmul dword [ecx - 0x40]
fld dword [esp + 0xd0]
fadd dword [esp + 0x20]
fld dword [esp + 0xd4]
fadd dword [esp + 0x24]
fld dword [esp + 0xd8]
fadd dword [esp + 0x28]
fstp dword [esp + 0x28]
fxch st(1)
fadd dword [esp + 0x90]
fstp dword [esp + 0x20]
fadd st(2)
fstp dword [esp + 0x24]
fld dword [esp + 0x28]
fadd st(1)
fstp st(2)
fstp st(0)
fadd dword [esp + 0x24]
fadd dword [esp + 0x20]
fst dword [esp + 0xc]
fstp dword [ecx + 0x18]
fld dword [edi + 0xc0]
fsub dword [eax + 0x10]
fld dword [edi + 0xc4]
fsub dword [eax + 0x14]
fld dword [edi + 0xc8]
fsub dword [eax + 0x18]
fstp dword [esp + 0xf8]
fld dword [ecx - 8]
fmul dword [edi + 0xd0]
fstp dword [esp + 0x10]
fld dword [ecx - 4]
fmul dword [edi + 0xd4]
fstp dword [esp + 0x14]
fld dword [edi + 0xd8]
fmul dword [ecx]
fstp dword [esp + 0x18]
fld dword [ecx + 8]
fmul dword [eax + 0x20]
fstp dword [esp + 0xc0]
fld dword [ecx + 0xc]
fmul dword [eax + 0x24]
fstp dword [esp + 0xc4]
fld dword [ecx + 0x10]
fmul dword [eax + 0x28]
fstp dword [esp + 0xc8]
fxch st(1)
fmul dword [ecx - 0x18]
fstp dword [esp + 0xf0]
fmul dword [ecx - 0x14]
fld dword [esp + 0xf8]
mov eax, dword [ebp + 8]
fmul dword [ecx - 0x10]
fld dword [esp + 0xc0]
fadd dword [esp + 0x10]
fld dword [esp + 0xc4]
fadd dword [esp + 0x14]
fld dword [esp + 0xc8]
fadd dword [esp + 0x18]
fstp dword [esp + 0x18]
fxch st(1)
fadd dword [esp + 0xf0]
fstp dword [esp + 0x10]
fadd st(2)
fstp dword [esp + 0x14]
fld dword [esp + 0x18]
fadd st(1)
fstp st(2)
fstp st(0)
fld dword [esi - 4]
fmul dword [0x64321c]
faddp st(1)
fadd dword [esp + 0x14]
fadd dword [esp + 0x10]
fst dword [esp + 0xec]
fstp dword [ecx + 0x20]
fld dword [ecx + 0x24]
fabs
fmul dword [eax]
mov al, byte [edx + 4]
test al, al
fstp dword [esp + 0x7c]
fld dword [edx]
je 0x5ef3a9
fstp st(0)
fld dword [esp + 0xc]
fchs
fst dword [ecx + 0x1c]
fst dword [esp + 0x58]
fld dword [ecx + 0x28]
fmul dword [ecx + 0x34]
fld dword [esi]
fmul dword [0x6431e4]
fadd dword [esp + 0xc]
fmulp st(1)
fmul dword [0x6431e4]
fld dword [edx - 0x10]
fmul dword [ecx + 0x34]
fmul dword [esp + 0x7c]
fstp dword [esp + 0xc]
fld st(0)
fabs
fcomp dword [esp + 0xc]
fnstsw ax
test ah, 0x41
jne 0x5ef398
fcomp dword [0x641de0]
fld dword [esp + 0xc]
fnstsw ax
test ah, 0x41
je 0x5ef398
fchs
fxch st(1)
fsub st(1)
fstp dword [ecx + 0x1c]
fstp st(0)
fld dword [0x641de0]
jmp 0x5ef3b9
mov dword [esi], 0
fld dword [esi - 0x18]
fst dword [ecx + 0x1c]
fstp dword [esp + 0x58]
fld dword [edx - 0x10]
fld dword [0x641de0]
fld dword [edx - 0xc]
fucompp
fnstsw ax
test ah, 0x44
jnp 0x5ef425
fld dword [esp + 0x58]
mov eax, dword [edx - 8]
fmul dword [esp + 0x58]
mov dword [esp + 0xbc], eax
fld dword [esp + 0xec]
fmul dword [esp + 0xec]
faddp st(1)
fsqrt
fmul dword [edx - 0xc]
faddp st(1)
fcom dword [esp + 0xbc]
fnstsw ax
test ah, 5
jnp 0x5ef40e
fstp st(0)
fld dword [esp + 0xbc]
fld dword [0x641de0]
fcomp st(1)
fnstsw ax
test ah, 0x41
jne 0x5ef425
fstp st(0)
fld dword [0x641de0]
fmul dword [esp + 0x7c]
mov eax, dword [ebp + 8]
add ecx, 0xa0
add edx, 0x50
fst dword [ecx - 0x60]
add esi, 0x1c
fst dword [ecx - 0x5c]
fadd dword [0x6719c4]
fdivr dword [0x6419bc]
fst dword [ecx - 0x58]
fstp dword [ecx - 0x54]
fld dword [ecx - 0x70]
fmul dword [ecx - 0x84]
fxch st(1)
fmul dword [eax]
dec dword [esp + 0x78]
faddp st(1)
fstp dword [ecx - 0x68]
jne 0x5ef164
fld dword [esp + 0x288]
xor ecx, ecx
fmul dword [esp + 0xa4]
fld dword [esp + 0x1e8]
fmul dword [esp + 0xa0]
faddp st(1)
fchs
fstp dword [esp + 0x204]
fmul dword [esp + 0x288]
fld dword [esp + 0xa8]
fmul dword [esp + 0x1e8]
faddp st(1)
fchs
fstp dword [esp + 0x2a4]
fld dword [esp + 0x200]
fmul dword [esp + 0x210]
fld dword [esp + 0x204]
fmul dword [esp + 0x214]
fld st(0)
fmul st(1)
fld st(2)
fmul st(3)
faddp st(1)
fstp st(2)
fstp st(0)
fld dword [esp + 0x2a0]
fmul dword [esp + 0x2b0]
fld dword [esp + 0x2a4]
fmul dword [esp + 0x2b4]
fld st(0)
fmul st(1)
fld st(2)
fmul st(3)
faddp st(1)
fstp st(2)
fstp st(0)
fld dword [esp + 0x1e0]
fabs
fcomp dword [edi + 0xa0]
fnstsw ax
test ah, 1
jne 0x5ef52b
mov dword [ebx + 0x14], ecx
mov dword [ebx + 0x18], ecx
mov dword [ebx + 0x30], ecx
mov dword [ebx + 0x34], ecx
fld st(1)
fcomp dword [0x6419bc]
fnstsw ax
test ah, 0x41
je 0x5ef558
fcom dword [0x6419bc]
fnstsw ax
test ah, 0x41
je 0x5ef558
fstp st(0)
mov dword [ebx], ecx
fstp st(0)
mov dword [ebx + 0x1c], ecx
mov dword [ebx + 4], ecx
jmp 0x5ef66b
fld st(1)
fcomp dword [0x6419bc]
fnstsw ax
test ah, 0x41
jne 0x5ef57d
fld dword [0x6419bc]
fdiv st(2)
fld st(0)
fmul dword [ebx + 0x14]
fstp dword [ebx + 0x14]
fmul dword [ebx + 0x18]
fstp dword [ebx + 0x18]
fcom dword [0x6419bc]
fnstsw ax
test ah, 0x41
jne 0x5ef5a0
fld dword [0x6419bc]
fdiv st(1)
fld st(0)
fmul dword [ebx + 0x30]
fstp dword [ebx + 0x30]
fmul dword [ebx + 0x34]
fstp dword [ebx + 0x34]
fxch st(1)
fcomp st(1)
fnstsw ax
fstp st(0)
test ah, 0x41
jne 0x5ef5ba
mov ecx, 1
xor eax, eax
mov dword [esp + 0x58], ecx
jmp 0x5ef5c3
mov eax, 1
mov dword [esp + 0x58], ecx
lea ecx, [ecx + ecx*4]
shl ecx, 5
lea edx, [esp + ecx + 0x1e8]
mov dword [esp + 0x7c], edx
mov dword [esp + 0x78], 2
lea esp, [esp]
mov edx, eax
imul edx, edx, 0x1c
lea ecx, [eax + eax*4]
imul eax, eax, 0x64
shl ecx, 5
lea ecx, [esp + ecx + 0x180]
add edx, ebx
push edx
fld dword [ecx + 0x70]
mov edx, dword [ebp + 0xc]
fmul dword [ecx + 0x68]
lea esi, [eax + edx + 8]
fchs
fstp dword [ecx + 0x84]
call fcn.005edd50
fld dword [esp + 0x40]
mov eax, dword [esp + 0x80]
fmul dword [ecx + 0x84]
mov ecx, dword [esp + 0x7c]
add esp, 4
dec ecx
fadd dword [eax]
mov dword [esp + 0x78], ecx
fstp dword [eax]
mov eax, dword [esp + 0x58]
jne 0x5ef5e0
fld dword [esp + 0x1fc]
mov eax, dword [esp + 0x1e8]
fmul dword [esp + 0x218]
mov ecx, dword [esp + 0x288]
mov dword [ebx + 4], eax
fstp dword [ebx]
fld dword [esp + 0x29c]
fmul dword [esp + 0x2b8]
fstp dword [ebx + 0x1c]
mov eax, dword [esp + 0x2a0]
fld dword [esp + 0x204]
mov edx, dword [esp + 0x200]
mov dword [ebx + 0x2c], eax
mov eax, dword [ebp + 8]
mov dword [ebx + 0x20], ecx
mov dword [ebx + 0x10], edx
fmul dword [eax + 4]
lea edx, [edi + 0x30]
lea ecx, [esp + 0x1c8]
fstp dword [ebx + 0xc]
mov esi, 2
fld dword [esp + 0x2a4]
fmul dword [eax + 4]
fstp dword [ebx + 0x28]
mov edi, edi
fld dword [ecx + 0x3c]
mov eax, dword [edx]
fld st(0)
fmul dword [edi + 0xe0]
fld st(1)
fmul dword [edi + 0xe4]
fstp dword [esp + 0x24]
fld st(1)
fmul dword [edi + 0xe8]
fstp dword [esp + 0x28]
fld st(1)
fmul dword [edi + 0xec]
fstp dword [esp + 0x2c]
fld st(1)
fmul dword [eax + 0x30]
fstp dword [esp + 0x10]
fld st(1)
fmul dword [eax + 0x34]
fstp dword [esp + 0x14]
fld st(1)
fmul dword [eax + 0x38]
fstp dword [esp + 0x18]
fxch st(1)
fmul dword [eax + 0x3c]
fstp dword [esp + 0x1c]
fld dword [esp + 0x2c]
fmul dword [ecx - 0x18]
fld dword [esp + 0x2c]
fmul dword [ecx - 0x14]
fld dword [esp + 0x2c]
fmul dword [ecx - 0x10]
fstp dword [esp + 0x98]
fld dword [esp + 0x2c]
fmul dword [ecx - 0xc]
fstp dword [esp + 0x9c]
fld dword [esp + 0x1c]
fmul dword [ecx - 0x18]
fstp dword [esp + 0x60]
fld dword [esp + 0x1c]
fmul dword [ecx - 0x14]
fstp dword [esp + 0x64]
fld dword [esp + 0x1c]
fmul dword [ecx - 0x10]
fstp dword [esp + 0x68]
fld dword [esp + 0x1c]
fmul dword [ecx - 0xc]
fstp dword [esp + 0x6c]
fxch st(1)
fadd dword [edi + 0xc0]
fstp dword [edi + 0xc0]
fadd dword [edi + 0xc4]
fstp dword [edi + 0xc4]
fld dword [esp + 0x98]
fadd dword [edi + 0xc8]
fstp dword [edi + 0xc8]
fld dword [esp + 0x9c]
fadd dword [edi + 0xcc]
fstp dword [edi + 0xcc]
fld dword [eax + 0x10]
fsub dword [esp + 0x60]
fstp dword [eax + 0x10]
fld dword [eax + 0x14]
fsub dword [esp + 0x64]
fstp dword [eax + 0x14]
fld dword [eax + 0x18]
fsub dword [esp + 0x68]
fstp dword [eax + 0x18]
fld dword [eax + 0x1c]
fsub dword [esp + 0x6c]
fstp dword [eax + 0x1c]
fmul dword [ecx - 8]
fld dword [esp + 0x24]
fmul dword [ecx - 4]
fld dword [esp + 0x28]
fmul dword [ecx]
fstp dword [esp + 0x28]
fld dword [esp + 0x2c]
fmul dword [ecx + 4]
fstp dword [esp + 0x2c]
fld dword [esp + 0x10]
fmul dword [ecx + 8]
fstp dword [esp + 0x10]
add ecx, 0xa0
fld dword [esp + 0x14]
add edx, 0x50
dec esi
fmul dword [ecx - 0x94]
fstp dword [esp + 0x14]
fld dword [esp + 0x18]
fmul dword [ecx - 0x90]
fstp dword [esp + 0x18]
fld dword [esp + 0x1c]
fmul dword [ecx - 0x8c]
fstp dword [esp + 0x1c]
fxch st(1)
fadd dword [edi + 0xd0]
fstp dword [edi + 0xd0]
fadd dword [edi + 0xd4]
fstp dword [edi + 0xd4]
fld dword [esp + 0x28]
fadd dword [edi + 0xd8]
fstp dword [edi + 0xd8]
fld dword [esp + 0x2c]
fadd dword [edi + 0xdc]
fstp dword [edi + 0xdc]
fld dword [esp + 0x10]
fadd dword [eax + 0x20]
fstp dword [eax + 0x20]
fld dword [esp + 0x14]
fadd dword [eax + 0x24]
fstp dword [eax + 0x24]
fld dword [esp + 0x18]
fadd dword [eax + 0x28]
fstp dword [eax + 0x28]
fld dword [esp + 0x1c]
fadd dword [eax + 0x2c]
fstp dword [eax + 0x2c]
jne 0x5ef6b0
pop edi
pop esi
pop ebx
mov esp, ebp
pop ebp
ret