Function at 0x423ba0
Capabilities:
Access peb ldr_data
Get kernel32 base address

Disassembly:
push 0xffffffffffffffff
push 0x61be18
mov eax, dword fs:[0]
push eax
mov dword fs:[0], esp
sub esp, 0x54
push esi
mov esi, ecx
push edi
mov ecx, dword [esi + 0x20]
mov eax, dword [esi + 0xc]
mov edx, dword [ecx]
mov eax, dword [eax + 0x20]
mov ecx, dword [edx + 0xc]
imul ecx, dword [eax + 0x24]
mov dword [esp + 0x1c], 0
mov dword [esp + 0x20], 0
lea edi, [ecx + eax + 0x4c]
mov dword [esp + 0x24], 0
mov ecx, esi
mov dword [esp + 0x64], 0
call fcn.00424450
fstp dword [esp + 0x1c]
mov ecx, esi
call fcn.00424210
fstp dword [esp + 0x20]
lea edx, [esp + 0x1c]
mov ecx, esi
push edx
call fcn.004250f0
mov eax, dword [esi + 0x20]
mov eax, dword [eax]
add eax, 0x18
fld dword [eax + 4]
fld st(0)
fmulp st(1)
fadd st(0), st(0)
fld dword [eax + 8]
fld st(0)
fmul st(1)
fadd st(0), st(0)
fstp dword [esp + 0x10]
fstp st(0)
fld dword [0x6222d4]
fsub st(1)
fsub dword [esp + 0x10]
fstp dword [esp + 0x38]
fld dword [eax + 0xc]
fmul dword [eax + 8]
fadd st(0), st(0)
fld dword [eax + 4]
fmul dword [eax]
fadd st(0), st(0)
faddp st(1)
fstp dword [esp + 0x44]
fld dword [eax + 8]
fmul dword [eax]
fadd st(0), st(0)
fld dword [eax + 0xc]
fmul dword [eax + 4]
fadd st(0), st(0)
fsubp st(1)
fld dword [eax + 4]
fmul dword [eax + 8]
fadd st(0), st(0)
fstp dword [esp + 0x14]
fld dword [eax + 0xc]
fmul dword [eax]
fadd st(0), st(0)
fst dword [esp + 0x18]
fadd dword [esp + 0x14]
fstp dword [esp + 0x54]
fld dword [eax]
fld st(0)
fmul st(1)
fadd st(0), st(0)
fsubr dword [0x6222d4]
fstp dword [esp + 0xc]
fstp st(0)
fld dword [esp + 0xc]
fsub st(2)
fstp dword [esp + 0x58]
fchs
fstp dword [esp + 8]
fstp st(0)
fld dword [esp + 8]
fcomp dword [0x623538]
fnstsw ax
test ah, 5
jp 0x423d2d
fld dword [esp + 8]
fcomp dword [0x623534]
fnstsw ax
and eax, 0x4100
jne 0x423d2d
fld dword [esp + 8]
fmul dword [esp + 8]
push ecx
fsubr dword [0x6222d4]
fstp dword [esp]
call fcn.005917c0
fld dword [esp + 0xc]
fld st(1)
fpatan
add esp, 4
fmul dword [0x623530]
fstp dword [esp + 0x2c]
fdivr dword [0x6222d4]
fld dword [esp + 0x54]
fmul st(1)
fld st(1)
fmul dword [esp + 0x58]
fpatan
fmul dword [0x623530]
fstp dword [esp + 0x28]
fld dword [esp + 0x44]
fmul st(1)
fxch st(1)
fmul dword [esp + 0x38]
fpatan
jmp 0x423d63
fld dword [esp + 0xc]
fsub dword [esp + 0x10]
fld dword [esp + 0x14]
fsub dword [esp + 0x18]
mov dword [esp + 0x2c], 0x42b40000
fchs
fxch st(1)
fpatan
fmul dword [0x623530]
fstp dword [esp + 0x28]
fld qword [0x623528]
fld qword [0x623520]
fpatan
fmul dword [0x623530]
push ecx
fstp dword [esp + 0x34]
fld dword [esp + 0x20]
fsub dword [esp + 0x2c]
fld dword [esp + 0x24]
fsub dword [esp + 0x30]
fld dword [esp + 0x28]
fsub dword [esp + 0x34]
fld st(0)
fmul st(1)
fld st(2)
fmul st(3)
faddp st(1)
fld st(3)
fmul st(4)
faddp st(1)
fstp dword [esp]
fstp st(0)
fstp st(0)
fstp st(0)
call fcn.005917c0
mov ecx, dword [esp + 0x70]
add esp, 4
fld dword [ecx + 0xc]
fmul dword [esi + 0x50]
fmul dword [0x622854]
fld st(1)
fcomp st(1)
fnstsw ax
and eax, 0x4100
jne 0x423dfe
fdivrp st(1)
fld dword [esp + 0x1c]
fsub dword [esp + 0x28]
fmul st(1)
fadd dword [esp + 0x28]
fstp dword [esp + 0x1c]
fld dword [esp + 0x20]
fsub dword [esp + 0x2c]
fmul st(1)
fadd dword [esp + 0x2c]
fstp dword [esp + 0x20]
fld dword [esp + 0x24]
fsub dword [esp + 0x30]
fmul st(1)
fadd dword [esp + 0x30]
fstp dword [esp + 0x24]
jmp 0x423e00
fstp st(0)
fstp st(0)
fld dword [esp + 0x1c]
fmul dword [0x622c24]
fmul dword [0x622c20]
fld dword [esp + 0x20]
fmul dword [0x622c24]
fmul dword [0x622c20]
fld dword [esp + 0x24]
fmul dword [0x622c24]
fmul dword [0x622c20]
fstp dword [esp + 0x18]
fld st(1)
fcos
fstp dword [esp + 0x14]
fld st(0)
fcos
fstp dword [esp + 0x6c]
fld dword [esp + 0x18]
fcos
fstp dword [esp + 0x10]
fxch st(1)
fsin
fstp dword [esp + 0xc]
fsin
fld dword [esp + 0x18]
fsin
fld dword [esp + 0x10]
fmul dword [esp + 0x14]
fstp dword [esp + 0x18]
fld dword [esp + 0x14]
fmul st(1)
fld dword [esp + 0x10]
fmul dword [esp + 0xc]
fxch st(2)
fmul dword [esp + 0xc]
fstp dword [esp + 0x14]
fld dword [esp + 0x6c]
fmul st(2)
fld st(1)
fmul st(4)
fsubp st(1)
fstp dword [esp + 0x28]
fld dword [esp + 0x14]
fmul dword [esp + 0x6c]
fld dword [esp + 0x18]
fmul st(4)
faddp st(1)
fstp dword [esp + 0x2c]
fmul dword [esp + 0x6c]
fxch st(1)
fmul st(2)
fsubp st(1)
fst dword [esp + 0x30]
fld dword [esp + 0x18]
fmul dword [esp + 0x6c]
fld dword [esp + 0x14]
fmul st(3)
mov edx, dword [esp + 0x28]
mov eax, dword [esp + 0x2c]
mov ecx, dword [esp + 0x30]
add edi, 8
mov dword [edi], edx
faddp st(1)
mov dword [edi + 4], eax
fstp dword [esp + 0x34]
mov edx, dword [esp + 0x34]
mov dword [edi + 8], ecx
mov ecx, dword [esp + 0x28]
mov dword [edi + 0xc], edx
mov eax, dword [esi + 0x20]
mov edx, dword [esp + 0x2c]
pop edi
mov eax, dword [eax]
mov dword [eax + 0x18], ecx
mov ecx, dword [esp + 0x30]
add eax, 0x18
pop esi
fstp dword [eax + 8]
mov dword [eax + 0xc], ecx
mov ecx, dword [esp + 0x54]
mov dword [eax + 4], edx
mov dword fs:[0], ecx
fstp st(0)
add esp, 0x60
ret 4