Function at 0x4fa8d0
Capabilities:
Resolve function by parsing pe exports

Disassembly:
push ebp
mov ebp, esp
and esp, 0xfffffff0
sub esp, 0xd4
mov ecx, dword [ebp + 0x20]
mov eax, dword [ebp + 0x14]
dec ecx
mov edx, ecx
shl edx, 4
fld dword [edx + eax]
push ebx
fcomp dword [ebp + 0x24]
mov ebx, dword [ebp + 0x1c]
push esi
mov esi, dword [ebp + 0x18]
push edi
mov edi, dword [ebp + 0x10]
fnstsw ax
test ah, 1
jne 0x4fa961
mov eax, dword [ebp + 0x14]
fld dword [edx + eax + 4]
mov edi, dword [edx + eax]
fld dword [edx + eax + 8]
mov eax, dword [ebp + 8]
mov dword [eax], edi
fxch st(1)
fstp dword [eax + 4]
mov dword [esp + 0x10], 1
mov byte [esp + 0xf], 1
fstp dword [eax + 8]
mov edi, dword [esi + ecx*8]
fld dword [esi + ecx*8 + 4]
mov eax, dword [ebp + 0xc]
fstp dword [eax + 4]
mov dword [eax], edi
fld dword [edx + ebx + 4]
mov eax, dword [edx + ebx]
fld dword [edx + ebx + 8]
mov edi, dword [ebp + 0x10]
fld dword [edx + ebx + 0xc]
mov dword [edi], eax
fstp dword [esp + 0x20]
mov eax, dword [esp + 0x20]
fxch st(1)
fstp dword [edi + 4]
mov dword [edi + 0xc], eax
fstp dword [edi + 8]
jmp 0x4fa96e
mov dword [esp + 0x10], 0
mov byte [esp + 0xf], 0
xor eax, eax
cmp dword [ebp + 0x20], 4
mov dword [esp + 0x1c], eax
jl 0x4fb5ab
mov eax, dword [esp + 0x10]
shl eax, 4
shl ecx, 3
mov dword [esp + 0x18], edx
mov edx, dword [ebp + 8]
add edi, eax
mov dword [esp + 0x34], ecx
lea ecx, [eax + edx]
mov eax, dword [ebp + 0x14]
lea edx, [ebx + 0x1c]
sub ebx, eax
mov dword [esp + 0x30], ebx
add esi, 0xc
mov ebx, 0x18
sub ebx, eax
mov dword [esp + 0x14], esi
mov esi, dword [ebp + 0x14]
mov dword [esp + 0xd8], ebx
mov ebx, dword [ebp + 0x18]
mov eax, 0xc
add esi, 0x18
sub eax, ebx
mov dword [esp + 0x20], 3
mov dword [esp + 0xdc], eax
fld dword [esi - 0x18]
fcomp dword [ebp + 0x24]
fnstsw ax
mov al, byte [esp + 0xf]
test ah, 1
jne 0x4faba0
test al, al
jne 0x4fab46
fld dword [esi - 0x18]
mov eax, dword [esp + 0x18]
mov ebx, dword [ebp + 0x14]
fsub dword [eax + ebx]
fld dword [esi - 0x14]
fsub dword [eax + ebx + 4]
fld dword [esi - 0x10]
fsub dword [eax + ebx + 8]
fstp dword [esp + 0xc8]
mov ebx, dword [esp + 0xc8]
fxch st(1)
fstp dword [ecx]
mov dword [ecx + 8], ebx
mov ebx, dword [ebp + 0x14]
fstp dword [ecx + 4]
fld dword [ebp + 0x24]
fsub dword [eax + ebx]
fdiv dword [ecx]
fld st(0)
fmul dword [ecx]
fstp dword [ecx]
fld st(0)
fmul dword [ecx + 4]
fstp dword [ecx + 4]
fld st(0)
fmul dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [eax + ebx + 4]
fld dword [eax + ebx + 8]
fld dword [ecx]
fadd dword [eax + ebx]
mov eax, dword [esp + 0x14]
mov ebx, dword [ebp + 0x18]
fstp dword [ecx]
fxch st(1)
fadd dword [ecx + 4]
fstp dword [ecx + 4]
fadd dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [eax - 0xc]
mov eax, dword [esp + 0x34]
fsub dword [eax + ebx]
mov ebx, dword [esp + 0x14]
fld dword [ebx - 8]
mov ebx, dword [ebp + 0x18]
fsub dword [eax + ebx + 4]
fxch st(1)
fmul st(2)
fstp dword [esp + 0x38]
fmul st(1)
fstp dword [esp + 0x3c]
fld dword [esp + 0x38]
fadd dword [eax + ebx]
fld dword [eax + ebx + 4]
mov ebx, dword [ebp + 0xc]
mov eax, dword [esp + 0x10]
fadd dword [esp + 0x3c]
fxch st(1)
fstp dword [ebx + eax*8]
fstp dword [ebx + eax*8 + 4]
mov eax, dword [esp + 0x18]
fld dword [edx - 0x1c]
mov ebx, dword [ebp + 0x1c]
fsub dword [eax + ebx]
fld dword [edx - 0x18]
add ecx, 0x10
fsub dword [eax + ebx + 4]
fld dword [edx - 0x14]
fsub dword [eax + ebx + 8]
fstp dword [esp + 0x68]
fld dword [edx - 0x10]
fsub dword [eax + ebx + 0xc]
mov byte [esp + 0xf], 1
fstp dword [esp + 0x6c]
fxch st(1)
fmul st(2)
fstp dword [esp + 0x40]
fmul st(1)
fstp dword [esp + 0x44]
fld dword [esp + 0x68]
fmul st(1)
fstp dword [esp + 0x48]
fmul dword [esp + 0x6c]
fld dword [esp + 0x40]
fadd dword [eax + ebx]
fld dword [eax + ebx + 4]
fadd dword [esp + 0x44]
fld dword [eax + ebx + 8]
fadd dword [esp + 0x48]
fstp dword [esp + 0x78]
fld dword [eax + ebx + 0xc]
mov eax, dword [esp + 0x78]
mov ebx, dword [esp + 0x10]
fadd st(3)
mov dword [edi + 8], eax
inc ebx
fstp dword [esp + 0x7c]
mov eax, dword [esp + 0x7c]
fxch st(1)
fstp dword [edi]
mov dword [edi + 0xc], eax
add edi, 0x10
fstp dword [edi - 0xc]
fstp st(0)
jmp 0x4fab4a
mov ebx, dword [esp + 0x10]
fld dword [esi - 0x14]
mov eax, dword [esi - 0x18]
fld dword [esi - 0x10]
mov dword [ecx], eax
mov eax, dword [esp + 0x14]
fxch st(1)
fstp dword [ecx + 4]
inc ebx
add ecx, 0x10
fstp dword [ecx - 8]
mov dword [esp + 0x10], ebx
fld dword [eax - 8]
add edi, 0x10
fld dword [eax - 0xc]
mov eax, dword [ebp + 0xc]
fstp dword [eax + ebx*8 - 8]
fstp dword [eax + ebx*8 - 4]
mov eax, dword [edx - 0x10]
fld dword [edx - 0x18]
mov dword [esp + 0x2c], eax
fld dword [edx - 0x14]
fld dword [edx - 0x1c]
mov dword [edi - 4], eax
fstp dword [edi - 0x10]
fxch st(1)
fstp dword [edi - 0xc]
fstp dword [edi - 8]
jmp 0x4fad19
test al, al
je 0x4fad15
fld dword [esi - 0x18]
mov eax, dword [esp + 0x18]
mov ebx, dword [ebp + 0x14]
fsub dword [eax + ebx]
fld dword [esi - 0x14]
fsub dword [eax + ebx + 4]
fld dword [esi - 0x10]
fsub dword [eax + ebx + 8]
fstp dword [esp + 0xb8]
mov ebx, dword [esp + 0xb8]
fxch st(1)
fstp dword [ecx]
mov dword [ecx + 8], ebx
mov ebx, dword [ebp + 0x14]
fstp dword [ecx + 4]
fld dword [ebp + 0x24]
fsub dword [eax + ebx]
fdiv dword [ecx]
fld st(0)
fmul dword [ecx]
fstp dword [ecx]
fld st(0)
fmul dword [ecx + 4]
fstp dword [ecx + 4]
fld st(0)
fmul dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [eax + ebx + 4]
fld dword [eax + ebx + 8]
fld dword [eax + ebx]
mov eax, dword [esp + 0x14]
fadd dword [ecx]
mov ebx, dword [ebp + 0x18]
fstp dword [ecx]
fxch st(1)
fadd dword [ecx + 4]
fstp dword [ecx + 4]
fadd dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [eax - 0xc]
mov eax, dword [esp + 0x34]
fsub dword [eax + ebx]
mov ebx, dword [esp + 0x14]
fld dword [ebx - 8]
mov ebx, dword [ebp + 0x18]
fsub dword [eax + ebx + 4]
fxch st(1)
fmul st(2)
fstp dword [esp + 0x24]
fmul st(1)
fstp dword [esp + 0x28]
fld dword [esp + 0x24]
fadd dword [eax + ebx]
fld dword [eax + ebx + 4]
mov ebx, dword [ebp + 0xc]
mov eax, dword [esp + 0x10]
fadd dword [esp + 0x28]
fxch st(1)
fstp dword [ebx + eax*8]
fstp dword [ebx + eax*8 + 4]
mov eax, dword [esp + 0x18]
fld dword [edx - 0x1c]
mov ebx, dword [ebp + 0x1c]
fsub dword [eax + ebx]
fld dword [edx - 0x18]
add ecx, 0x10
fsub dword [eax + ebx + 4]
fld dword [edx - 0x14]
fsub dword [eax + ebx + 8]
fstp dword [esp + 0x98]
fld dword [edx - 0x10]
fsub dword [eax + ebx + 0xc]
mov byte [esp + 0xf], 0
fstp dword [esp + 0x9c]
fxch st(1)
fmul st(2)
fstp dword [esp + 0x50]
fmul st(1)
fstp dword [esp + 0x54]
fld dword [esp + 0x98]
fmul st(1)
fstp dword [esp + 0x58]
fmul dword [esp + 0x9c]
fld dword [esp + 0x50]
fadd dword [eax + ebx]
fld dword [eax + ebx + 4]
fadd dword [esp + 0x54]
fld dword [eax + ebx + 8]
fadd dword [esp + 0x58]
fstp dword [esp + 0x88]
fld dword [eax + ebx + 0xc]
mov eax, dword [esp + 0x88]
mov ebx, dword [esp + 0x10]
fadd st(3)
mov dword [edi + 8], eax
inc ebx
fstp dword [esp + 0x8c]
mov eax, dword [esp + 0x8c]
fxch st(1)
fstp dword [edi]
mov dword [edi + 0xc], eax
mov dword [esp + 0x10], ebx
fstp dword [edi + 4]
add edi, 0x10
fstp st(0)
jmp 0x4fad19
mov ebx, dword [esp + 0x10]
fld dword [esi - 8]
fcomp dword [ebp + 0x24]
fnstsw ax
mov al, byte [esp + 0xf]
test ah, 1
jne 0x4fae97
test al, al
jne 0x4fae50
fld dword [esi - 8]
fsub dword [esi - 0x18]
fld dword [esi - 4]
fsub dword [esi - 0x14]
fld dword [esi]
fsub dword [esi - 0x10]
fstp dword [esp + 0xc8]
mov eax, dword [esp + 0xc8]
fxch st(1)
fstp dword [ecx]
mov dword [ecx + 8], eax
mov eax, dword [esp + 0x14]
fstp dword [ecx + 4]
fld dword [ebp + 0x24]
fsub dword [esi - 0x18]
fdiv dword [ecx]
fld st(0)
fmul dword [ecx]
fstp dword [ecx]
fld st(0)
fmul dword [ecx + 4]
fstp dword [ecx + 4]
fld st(0)
fmul dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [esi - 0x14]
fld dword [esi - 0x10]
fld dword [esi - 0x18]
fadd dword [ecx]
fstp dword [ecx]
fxch st(1)
fadd dword [ecx + 4]
fstp dword [ecx + 4]
fadd dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [eax - 4]
fsub dword [eax - 0xc]
fld dword [eax]
fsub dword [eax - 8]
fxch st(1)
fmul st(2)
fstp dword [esp + 0x38]
fmul st(1)
fstp dword [esp + 0x3c]
fld dword [esp + 0x38]
fadd dword [eax - 0xc]
fld dword [esp + 0x3c]
fadd dword [eax - 8]
mov eax, dword [ebp + 0xc]
fxch st(1)
fstp dword [eax + ebx*8]
fstp dword [eax + ebx*8 + 4]
mov eax, dword [esp + 0x30]
fld dword [edx - 0xc]
fsub dword [edx - 0x1c]
fld dword [edx - 8]
fsub dword [edx - 0x18]
fld dword [eax + esi]
fsub dword [edx - 0x14]
fstp dword [esp + 0x68]
fld dword [edx]
fsub dword [edx - 0x10]
fstp dword [esp + 0x6c]
fxch st(1)
fmul st(2)
inc ebx
add ecx, 0x10
add edi, 0x10
fstp dword [esp + 0x40]
mov byte [esp + 0xf], 1
fmul st(1)
fstp dword [esp + 0x44]
fld dword [esp + 0x68]
fmul st(1)
fstp dword [esp + 0x48]
fmul dword [esp + 0x6c]
fld dword [esp + 0x40]
fadd dword [edx - 0x1c]
fld dword [esp + 0x44]
fadd dword [edx - 0x18]
fld dword [esp + 0x48]
fadd dword [edx - 0x14]
fstp dword [esp + 0x78]
mov eax, dword [esp + 0x78]
fxch st(2)
fadd dword [edx - 0x10]
mov dword [edi - 8], eax
fstp dword [esp + 0x7c]
mov eax, dword [esp + 0x7c]
fstp dword [edi - 0x10]
mov dword [edi - 4], eax
fstp dword [edi - 0xc]
fld dword [esi - 4]
mov eax, dword [esi - 8]
fld dword [esi]
mov dword [ecx], eax
mov eax, dword [esp + 0x14]
fxch st(1)
fstp dword [ecx + 4]
fstp dword [ecx + 8]
fld dword [eax]
fld dword [eax - 4]
mov eax, dword [ebp + 0xc]
fstp dword [eax + ebx*8]
fstp dword [eax + ebx*8 + 4]
mov eax, dword [esp + 0x30]
fld dword [edx - 8]
fld dword [eax + esi]
mov eax, dword [edx]
fld dword [edx - 0xc]
mov dword [esp + 0x2c], eax
fstp dword [edi]
fxch st(1)
fstp dword [edi + 4]
fstp dword [edi + 8]
jmp 0x4fafc6
test al, al
je 0x4fafd4
fld dword [esi - 8]
fsub dword [esi - 0x18]
fld dword [esi - 4]
fsub dword [esi - 0x14]
fld dword [esi]
fsub dword [esi - 0x10]
fstp dword [esp + 0xb8]
mov eax, dword [esp + 0xb8]
fxch st(1)
fstp dword [ecx]
mov dword [ecx + 8], eax
mov eax, dword [esp + 0x14]
fstp dword [ecx + 4]
fld dword [ebp + 0x24]
fsub dword [esi - 0x18]
fdiv dword [ecx]
fld st(0)
fmul dword [ecx]
fstp dword [ecx]
fld st(0)
fmul dword [ecx + 4]
fstp dword [ecx + 4]
fld st(0)
fmul dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [esi - 0x14]
fld dword [esi - 0x10]
fld dword [esi - 0x18]
fadd dword [ecx]
fstp dword [ecx]
fxch st(1)
fadd dword [ecx + 4]
fstp dword [ecx + 4]
fadd dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [eax - 4]
fsub dword [eax - 0xc]
fld dword [eax]
fsub dword [eax - 8]
fxch st(1)
fmul st(2)
fstp dword [esp + 0x24]
fmul st(1)
fstp dword [esp + 0x28]
fld dword [esp + 0x24]
fadd dword [eax - 0xc]
fld dword [esp + 0x28]
fadd dword [eax - 8]
mov eax, dword [ebp + 0xc]
fxch st(1)
fstp dword [eax + ebx*8]
fstp dword [eax + ebx*8 + 4]
mov eax, dword [esp + 0x30]
fld dword [edx - 0xc]
fsub dword [edx - 0x1c]
fld dword [edx - 8]
fsub dword [edx - 0x18]
fld dword [eax + esi]
fsub dword [edx - 0x14]
fstp dword [esp + 0x98]
fld dword [edx]
fsub dword [edx - 0x10]
fstp dword [esp + 0x9c]
fxch st(1)
fmul st(2)
mov byte [esp + 0xf], 0
fstp dword [esp + 0x50]
fmul st(1)
fstp dword [esp + 0x54]
fld dword [esp + 0x98]
fmul st(1)
fstp dword [esp + 0x58]
fmul dword [esp + 0x9c]
fld dword [esp + 0x50]
fadd dword [edx - 0x1c]
fld dword [esp + 0x54]
fadd dword [edx - 0x18]
fld dword [esp + 0x58]
fadd dword [edx - 0x14]
fstp dword [esp + 0x88]
mov eax, dword [esp + 0x88]
fxch st(2)
fadd dword [edx - 0x10]
mov dword [edi + 8], eax
fstp dword [esp + 0x8c]
mov eax, dword [esp + 0x8c]
fstp dword [edi]
fstp dword [edi + 4]
inc ebx
mov dword [edi + 0xc], eax
add ecx, 0x10
mov dword [esp + 0x10], ebx
add edi, 0x10
fld dword [esi + 8]
fcomp dword [ebp + 0x24]
fnstsw ax
mov al, byte [esp + 0xf]
test ah, 1
jne 0x4fb14e
test al, al
jne 0x4fb108
fld dword [esi + 8]
fsub dword [esi - 8]
fld dword [esi + 0xc]
fsub dword [esi - 4]
fld dword [esi + 0x10]
fsub dword [esi]
fstp dword [esp + 0xc8]
mov eax, dword [esp + 0xc8]
fxch st(1)
fstp dword [ecx]
mov dword [ecx + 8], eax
mov eax, dword [esp + 0x14]
fstp dword [ecx + 4]
fld dword [ebp + 0x24]
fsub dword [esi - 8]
fdiv dword [ecx]
fld st(0)
fmul dword [ecx]
fstp dword [ecx]
fld st(0)
fmul dword [ecx + 4]
fstp dword [ecx + 4]
fld st(0)
fmul dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [esi - 4]
fld dword [esi]
fld dword [ecx]
fadd dword [esi - 8]
fstp dword [ecx]
fxch st(1)
fadd dword [ecx + 4]
fstp dword [ecx + 4]
fadd dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [eax + 4]
fsub dword [eax - 4]
fld dword [eax + 8]
fsub dword [eax]
fxch st(1)
fmul st(2)
fstp dword [esp + 0x38]
fmul st(1)
fstp dword [esp + 0x3c]
fld dword [esp + 0x38]
fadd dword [eax - 4]
fld dword [esp + 0x3c]
fadd dword [eax]
mov eax, dword [ebp + 0xc]
fxch st(1)
fstp dword [eax + ebx*8]
fstp dword [eax + ebx*8 + 4]
mov eax, dword [esp + 0x30]
fld dword [edx + 4]
fsub dword [edx - 0xc]
fld dword [edx + 8]
fsub dword [edx - 8]
fld dword [edx + 0xc]
fsub dword [eax + esi]
fstp dword [esp + 0x68]
fld dword [edx + 0x10]
fsub dword [edx]
fstp dword [esp + 0x6c]
fxch st(1)
inc ebx
fmul st(2)
add ecx, 0x10
add edi, 0x10
mov byte [esp + 0xf], 1
fstp dword [esp + 0x40]
fmul st(1)
fstp dword [esp + 0x44]
fld dword [esp + 0x68]
fmul st(1)
fstp dword [esp + 0x48]
fmul dword [esp + 0x6c]
fld dword [esp + 0x40]
fadd dword [edx - 0xc]
fld dword [esp + 0x44]
fadd dword [edx - 8]
fld dword [esp + 0x48]
fadd dword [eax + esi]
fstp dword [esp + 0x78]
mov eax, dword [esp + 0x78]
fxch st(2)
fadd dword [edx]
mov dword [edi - 8], eax
fstp dword [esp + 0x7c]
mov eax, dword [esp + 0x7c]
fstp dword [edi - 0x10]
mov dword [edi - 4], eax
fstp dword [edi - 0xc]
fld dword [esi + 0xc]
mov eax, dword [esi + 8]
fld dword [esi + 0x10]
mov dword [ecx], eax
mov eax, dword [esp + 0x14]
fxch st(1)
fstp dword [ecx + 4]
fstp dword [ecx + 8]
fld dword [eax + 8]
fld dword [eax + 4]
mov eax, dword [ebp + 0xc]
fstp dword [eax + ebx*8]
fstp dword [eax + ebx*8 + 4]
mov eax, dword [edx + 0x10]
fld dword [edx + 8]
mov dword [esp + 0x2c], eax
fld dword [edx + 0xc]
fld dword [edx + 4]
fstp dword [edi]
fxch st(1)
fstp dword [edi + 4]
fstp dword [edi + 8]
jmp 0x4fb27a
test al, al
je 0x4fb288
fld dword [esi + 8]
fsub dword [esi - 8]
fld dword [esi + 0xc]
fsub dword [esi - 4]
fld dword [esi + 0x10]
fsub dword [esi]
fstp dword [esp + 0xb8]
mov eax, dword [esp + 0xb8]
fxch st(1)
fstp dword [ecx]
mov dword [ecx + 8], eax
mov eax, dword [esp + 0x14]
fstp dword [ecx + 4]
fld dword [ebp + 0x24]
fsub dword [esi - 8]
fdiv dword [ecx]
fld st(0)
fmul dword [ecx]
fstp dword [ecx]
fld st(0)
fmul dword [ecx + 4]
fstp dword [ecx + 4]
fld st(0)
fmul dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [esi - 4]
fld dword [esi]
fld dword [ecx]
fadd dword [esi - 8]
fstp dword [ecx]
fxch st(1)
fadd dword [ecx + 4]
fstp dword [ecx + 4]
fadd dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [eax + 4]
fsub dword [eax - 4]
fld dword [eax + 8]
fsub dword [eax]
fxch st(1)
fmul st(2)
fstp dword [esp + 0x24]
fmul st(1)
fstp dword [esp + 0x28]
fld dword [esp + 0x24]
fadd dword [eax - 4]
fld dword [esp + 0x28]
fadd dword [eax]
mov eax, dword [ebp + 0xc]
fxch st(1)
fstp dword [eax + ebx*8]
fstp dword [eax + ebx*8 + 4]
mov eax, dword [esp + 0x30]
fld dword [edx + 4]
fsub dword [edx - 0xc]
fld dword [edx + 8]
fsub dword [edx - 8]
fld dword [edx + 0xc]
fsub dword [eax + esi]
fstp dword [esp + 0x98]
fld dword [edx + 0x10]
fsub dword [edx]
fstp dword [esp + 0x9c]
fxch st(1)
mov byte [esp + 0xf], 0
fmul st(2)
fstp dword [esp + 0x50]
fmul st(1)
fstp dword [esp + 0x54]
fld dword [esp + 0x98]
fmul st(1)
fstp dword [esp + 0x58]
fmul dword [esp + 0x9c]
fld dword [esp + 0x50]
fadd dword [edx - 0xc]
fld dword [esp + 0x54]
fadd dword [edx - 8]
fld dword [esp + 0x58]
fadd dword [eax + esi]
fstp dword [esp + 0x88]
mov eax, dword [esp + 0x88]
fxch st(2)
fadd dword [edx]
mov dword [edi + 8], eax
fstp dword [esp + 0x8c]
mov eax, dword [esp + 0x8c]
fstp dword [edi]
fstp dword [edi + 4]
inc ebx
mov dword [edi + 0xc], eax
add ecx, 0x10
mov dword [esp + 0x10], ebx
add edi, 0x10
fld dword [esi + 0x18]
fcomp dword [ebp + 0x24]
fnstsw ax
mov al, byte [esp + 0xf]
test ah, 1
jne 0x4fb404
test al, al
jne 0x4fb3be
fld dword [esi + 0x18]
fsub dword [esi + 8]
fld dword [esi + 0x1c]
fsub dword [esi + 0xc]
fld dword [esi + 0x20]
fsub dword [esi + 0x10]
fstp dword [esp + 0xc8]
mov eax, dword [esp + 0xc8]
fxch st(1)
fstp dword [ecx]
mov dword [ecx + 8], eax
mov eax, dword [esp + 0x14]
fstp dword [ecx + 4]
fld dword [ebp + 0x24]
fsub dword [esi + 8]
fdiv dword [ecx]
fld st(0)
fmul dword [ecx]
fstp dword [ecx]
fld st(0)
fmul dword [ecx + 4]
fstp dword [ecx + 4]
fld st(0)
fmul dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [esi + 0xc]
fld dword [esi + 0x10]
fld dword [esi + 8]
fadd dword [ecx]
fstp dword [ecx]
fxch st(1)
fadd dword [ecx + 4]
fstp dword [ecx + 4]
fadd dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [eax + 0xc]
fsub dword [eax + 4]
fld dword [eax + 0x10]
fsub dword [eax + 8]
fxch st(1)
fmul st(2)
fstp dword [esp + 0x38]
fmul st(1)
fstp dword [esp + 0x3c]
fld dword [esp + 0x38]
fadd dword [eax + 4]
fld dword [esp + 0x3c]
fadd dword [eax + 8]
mov eax, dword [ebp + 0xc]
fxch st(1)
fstp dword [eax + ebx*8]
fstp dword [eax + ebx*8 + 4]
fld dword [edx + 0x14]
fsub dword [edx + 4]
fld dword [edx + 0x18]
fsub dword [edx + 8]
fld dword [edx + 0x1c]
fsub dword [edx + 0xc]
fstp dword [esp + 0x68]
fld dword [edx + 0x20]
fsub dword [edx + 0x10]
fstp dword [esp + 0x6c]
inc ebx
fxch st(1)
add ecx, 0x10
fmul st(2)
add edi, 0x10
mov byte [esp + 0xf], 1
fstp dword [esp + 0x40]
fmul st(1)
fstp dword [esp + 0x44]
fld dword [esp + 0x68]
fmul st(1)
fstp dword [esp + 0x48]
fmul dword [esp + 0x6c]
fld dword [esp + 0x40]
fadd dword [edx + 4]
fld dword [esp + 0x44]
fadd dword [edx + 8]
fld dword [esp + 0x48]
fadd dword [edx + 0xc]
fstp dword [esp + 0x78]
mov eax, dword [esp + 0x78]
fxch st(2)
fadd dword [edx + 0x10]
mov dword [edi - 8], eax
fstp dword [esp + 0x7c]
mov eax, dword [esp + 0x7c]
fstp dword [edi - 0x10]
mov dword [edi - 4], eax
fstp dword [edi - 0xc]
fld dword [esi + 0x1c]
mov eax, dword [esi + 0x18]
fld dword [esi + 0x20]
mov dword [ecx], eax
mov eax, dword [esp + 0x14]
fxch st(1)
fstp dword [ecx + 4]
fstp dword [ecx + 8]
fld dword [eax + 0x10]
fld dword [eax + 0xc]
mov eax, dword [ebp + 0xc]
fstp dword [eax + ebx*8]
fstp dword [eax + ebx*8 + 4]
mov eax, dword [edx + 0x20]
fld dword [edx + 0x18]
mov dword [esp + 0x2c], eax
fld dword [edx + 0x1c]
fld dword [edx + 0x14]
fstp dword [edi]
fxch st(1)
fstp dword [edi + 4]
fstp dword [edi + 8]
jmp 0x4fb532
test al, al
je 0x4fb540
fld dword [esi + 0x18]
fsub dword [esi + 8]
fld dword [esi + 0x1c]
fsub dword [esi + 0xc]
fld dword [esi + 0x20]
fsub dword [esi + 0x10]
fstp dword [esp + 0xb8]
mov eax, dword [esp + 0xb8]
fxch st(1)
fstp dword [ecx]
mov dword [ecx + 8], eax
mov eax, dword [esp + 0x14]
fstp dword [ecx + 4]
fld dword [ebp + 0x24]
fsub dword [esi + 8]
fdiv dword [ecx]
fld st(0)
fmul dword [ecx]
fstp dword [ecx]
fld st(0)
fmul dword [ecx + 4]
fstp dword [ecx + 4]
fld st(0)
fmul dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [esi + 0xc]
fld dword [esi + 0x10]
fld dword [esi + 8]
fadd dword [ecx]
fstp dword [ecx]
fxch st(1)
fadd dword [ecx + 4]
fstp dword [ecx + 4]
fadd dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [eax + 0xc]
fsub dword [eax + 4]
fld dword [eax + 0x10]
fsub dword [eax + 8]
fxch st(1)
fmul st(2)
fstp dword [esp + 0x24]
fmul st(1)
fstp dword [esp + 0x28]
fld dword [esp + 0x24]
fadd dword [eax + 4]
fld dword [esp + 0x28]
fadd dword [eax + 8]
mov eax, dword [ebp + 0xc]
fxch st(1)
fstp dword [eax + ebx*8]
fstp dword [eax + ebx*8 + 4]
fld dword [edx + 0x14]
fsub dword [edx + 4]
fld dword [edx + 0x18]
fsub dword [edx + 8]
fld dword [edx + 0x1c]
fsub dword [edx + 0xc]
fstp dword [esp + 0x98]
fld dword [edx + 0x20]
fsub dword [edx + 0x10]
fstp dword [esp + 0x9c]
mov byte [esp + 0xf], 0
fxch st(1)
fmul st(2)
fstp dword [esp + 0x50]
fmul st(1)
fstp dword [esp + 0x54]
fld dword [esp + 0x98]
fmul st(1)
fstp dword [esp + 0x58]
fmul dword [esp + 0x9c]
fld dword [esp + 0x50]
fadd dword [edx + 4]
fld dword [esp + 0x54]
fadd dword [edx + 8]
fld dword [esp + 0x58]
fadd dword [edx + 0xc]
fstp dword [esp + 0x88]
mov eax, dword [esp + 0x88]
fxch st(2)
fadd dword [edx + 0x10]
mov dword [edi + 8], eax
fstp dword [esp + 0x8c]
mov eax, dword [esp + 0x8c]
fstp dword [edi]
fstp dword [edi + 4]
inc ebx
mov dword [edi + 0xc], eax
add ecx, 0x10
mov dword [esp + 0x10], ebx
add edi, 0x10
mov eax, dword [esp + 0x20]
mov ebx, dword [esp + 0xdc]
mov dword [esp + 0xac], eax
mov eax, dword [esp + 0x14]
add ebx, eax
mov dword [esp + 0x34], ebx
mov ebx, dword [esp + 0xd8]
add ebx, esi
mov dword [esp + 0x18], ebx
mov ebx, dword [esp + 0x1c]
add eax, 0x20
add ebx, 4
mov dword [esp + 0x14], eax
mov eax, dword [esp + 0x20]
mov dword [esp + 0x1c], ebx
mov ebx, dword [ebp + 0x20]
add eax, 4
add esi, 0x40
add edx, 0x40
cmp eax, ebx
mov dword [esp + 0x20], eax
jb 0x4fa9d8
mov eax, dword [esp + 0x1c]
mov ecx, dword [esp + 0xac]
mov edi, dword [ebp + 0x10]
mov ebx, dword [ebp + 0x1c]
mov esi, dword [ebp + 0x18]
cmp eax, dword [ebp + 0x20]
jae 0x4fb983
mov edx, ecx
shl ecx, 3
mov dword [esp + 0x20], ecx
mov ecx, dword [esp + 0x10]
shl ecx, 4
add edi, ecx
mov dword [esp + 0x34], edi
mov edi, dword [ebp + 8]
shl eax, 4
add ecx, edi
lea edi, [eax + ebx + 0xc]
mov dword [esp + 0x18], edi
mov edi, dword [ebp + 0x14]
lea eax, [eax + edi + 8]
mov dword [esp + 0x14], eax
mov eax, ebx
sub eax, edi
mov dword [esp + 0x30], eax
mov eax, 0xfffffff8
shl edx, 4
sub eax, edi
mov edi, dword [esp + 0x34]
mov dword [esp + 0xac], eax
mov eax, dword [esp + 0x14]
fld dword [eax - 8]
fcomp dword [ebp + 0x24]
fnstsw ax
mov al, byte [esp + 0xf]
test ah, 1
jne 0x4fb7d6
test al, al
jne 0x4fb777
mov eax, dword [ebp + 0x14]
mov edi, dword [esp + 0x14]
fld dword [edi - 8]
fsub dword [edx + eax]
fld dword [edi - 4]
fsub dword [edx + eax + 4]
fld dword [edx + eax + 8]
fsubr dword [edi]
fstp dword [esp + 0xc8]
mov edi, dword [esp + 0xc8]
fxch st(1)
fstp dword [ecx]
mov dword [ecx + 8], edi
mov edi, dword [esp + 0x1c]
fstp dword [ecx + 4]
fld dword [ebp + 0x24]
fsub dword [edx + eax]
fdiv dword [ecx]
fld st(0)
fmul dword [ecx]
fstp dword [ecx]
fld st(0)
fmul dword [ecx + 4]
fstp dword [ecx + 4]
fld st(0)
fmul dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [edx + eax + 4]
fld dword [edx + eax + 8]
fld dword [ecx]
fadd dword [edx + eax]
mov eax, dword [esp + 0x20]
fstp dword [ecx]
fxch st(1)
fadd dword [ecx + 4]
fstp dword [ecx + 4]
fadd dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [esi + edi*8]
fsub dword [eax + esi]
fld dword [esi + edi*8 + 4]
mov edi, dword [ebp + 0xc]
fsub dword [eax + esi + 4]
fxch st(1)
fmul st(2)
fstp dword [esp + 0x38]
fmul st(1)
fstp dword [esp + 0x3c]
fld dword [esp + 0x38]
fadd dword [eax + esi]
fld dword [eax + esi + 4]
mov eax, dword [esp + 0x10]
fadd dword [esp + 0x3c]
fxch st(1)
fstp dword [edi + eax*8]
fstp dword [edi + eax*8 + 4]
mov eax, dword [esp + 0x18]
fld dword [eax - 0xc]
fsub dword [edx + ebx]
fld dword [eax - 8]
fsub dword [edx + ebx + 4]
mov edi, dword [esp + 0x30]
mov eax, dword [esp + 0x14]
fld dword [eax + edi]
mov edi, dword [esp + 0x18]
fsub dword [edx + ebx + 8]
add ecx, 0x10
fstp dword [esp + 0x68]
fld dword [edx + ebx + 0xc]
mov byte [esp + 0xf], 1
fsubr dword [edi]
mov edi, dword [esp + 0x34]
fstp dword [esp + 0x6c]
fxch st(1)
fmul st(2)
fstp dword [esp + 0x40]
fmul st(1)
fstp dword [esp + 0x44]
fld dword [esp + 0x68]
fmul st(1)
fstp dword [esp + 0x48]
fmul dword [esp + 0x6c]
fld dword [esp + 0x40]
fadd dword [edx + ebx]
fld dword [edx + ebx + 4]
fadd dword [esp + 0x44]
fld dword [edx + ebx + 8]
fadd dword [esp + 0x48]
fstp dword [esp + 0x78]
fld dword [edx + ebx + 0xc]
mov edx, dword [esp + 0x78]
fadd st(3)
mov dword [edi + 8], edx
fstp dword [esp + 0x7c]
mov edx, dword [esp + 0x7c]
fxch st(1)
fstp dword [edi]
mov dword [edi + 0xc], edx
mov edx, dword [esp + 0x10]
fstp dword [edi + 4]
inc edx
mov dword [esp + 0x10], edx
fstp st(0)
add edi, 0x10
jmp 0x4fb77b
mov eax, dword [esp + 0x14]
fld dword [eax - 4]
mov edx, dword [ebp + 0xc]
fld dword [eax]
mov eax, dword [eax - 8]
mov dword [ecx], eax
fxch st(1)
mov eax, dword [esp + 0x1c]
fstp dword [ecx + 4]
fstp dword [ecx + 8]
fld dword [esi + eax*8 + 4]
fld dword [esi + eax*8]
mov eax, dword [esp + 0x10]
fstp dword [edx + eax*8]
fstp dword [edx + eax*8 + 4]
mov edx, dword [esp + 0x18]
fld dword [edx - 8]
mov eax, dword [esp + 0x30]
mov edx, dword [esp + 0x14]
fld dword [edx + eax]
mov eax, dword [esp + 0x18]
fld dword [eax - 0xc]
mov edx, dword [eax]
fstp dword [edi]
fxch st(1)
mov dword [esp + 0x2c], edx
fstp dword [edi + 4]
mov eax, edx
fstp dword [edi + 8]
jmp 0x4fb936
test al, al
je 0x4fb94c
mov eax, dword [ebp + 0x14]
mov edi, dword [esp + 0x14]
fld dword [edi - 8]
fsub dword [edx + eax]
fld dword [edi - 4]
fsub dword [edx + eax + 4]
fld dword [edx + eax + 8]
fsubr dword [edi]
fstp dword [esp + 0xb8]
mov edi, dword [esp + 0xb8]
fxch st(1)
fstp dword [ecx]
mov dword [ecx + 8], edi
mov edi, dword [esp + 0x1c]
fstp dword [ecx + 4]
fld dword [ebp + 0x24]
fsub dword [edx + eax]
fdiv dword [ecx]
fld st(0)
fmul dword [ecx]
fstp dword [ecx]
fld st(0)
fmul dword [ecx + 4]
fstp dword [ecx + 4]
fld st(0)
fmul dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [edx + eax + 4]
fld dword [edx + eax + 8]
fld dword [edx + eax]
mov eax, dword [esp + 0x20]
fadd dword [ecx]
fstp dword [ecx]
fxch st(1)
fadd dword [ecx + 4]
fstp dword [ecx + 4]
fadd dword [ecx + 8]
fstp dword [ecx + 8]
fld dword [esi + edi*8]
fsub dword [eax + esi]
fld dword [esi + edi*8 + 4]
mov edi, dword [ebp + 0xc]
fsub dword [eax + esi + 4]
fxch st(1)
fmul st(2)
fstp dword [esp + 0x24]
fmul st(1)
fstp dword [esp + 0x28]
fld dword [esp + 0x24]
fadd dword [eax + esi]
fld dword [eax + esi + 4]
mov eax, dword [esp + 0x10]
fadd dword [esp + 0x28]
fxch st(1)
fstp dword [edi + eax*8]
fstp dword [edi + eax*8 + 4]
mov eax, dword [esp + 0x18]
fld dword [eax - 0xc]
fsub dword [edx + ebx]
fld dword [eax - 8]
fsub dword [edx + ebx + 4]
mov eax, dword [esp + 0x30]
mov edi, dword [esp + 0x14]
fld dword [edi + eax]
mov eax, dword [esp + 0x18]
fsub dword [edx + ebx + 8]
mov edi, dword [esp + 0x34]
fstp dword [esp + 0x98]
fld dword [edx + ebx + 0xc]
mov byte [esp + 0xf], 0
fsubr dword [eax]
fstp dword [esp + 0x9c]
fxch st(1)
fmul st(2)
fstp dword [esp + 0x50]
fmul st(1)
fstp dword [esp + 0x54]
fld dword [esp + 0x98]
fmul st(1)
fstp dword [esp + 0x58]
fmul dword [esp + 0x9c]
fld dword [esp + 0x50]
fadd dword [edx + ebx]
fld dword [edx + ebx + 4]
fadd dword [esp + 0x54]
fld dword [edx + ebx + 8]
fadd dword [esp + 0x58]
fstp dword [esp + 0x88]
fld dword [edx + ebx + 0xc]
mov edx, dword [esp + 0x88]
fadd st(3)
mov dword [edi + 8], edx
fstp dword [esp + 0x8c]
mov eax, dword [esp + 0x8c]
fxch st(1)
fstp dword [edi]
fstp dword [edi + 4]
fstp st(0)
mov dword [edi + 0xc], eax
mov eax, dword [esp + 0x10]
add ecx, 0x10
inc eax
add edi, 0x10
mov dword [esp + 0x10], eax
mov dword [esp + 0x34], edi
mov edx, dword [esp + 0x1c]
lea eax, [edx*8]
mov edx, dword [esp + 0xac]
mov dword [esp + 0x20], eax
mov eax, dword [esp + 0x14]
add edx, eax
inc dword [esp + 0x1c]
add dword [esp + 0x14], 0x10
add dword [esp + 0x18], 0x10
mov eax, dword [esp + 0x1c]
cmp eax, dword [ebp + 0x20]
jb 0x4fb602
mov eax, dword [esp + 0x10]
pop edi
pop esi
pop ebx
mov esp, ebp
pop ebp
ret