Function at 0x567f20
Capabilities:
Resolve function by parsing pe exports

Disassembly:
sub esp, 0x1c
push ebx
push esi
push edi
lea edi, [ecx + 0x140]
lea esi, [ecx + 8]
mov ebx, 0x19
fldz
fld dword [esi]
fstp dword [esp + 0x24]
fld dword [esi - 8]
fsub st(1)
fstp dword [esp + 0x10]
fsubr dword [esi - 4]
fstp dword [esp + 0x14]
fld dword [esi]
fsub dword [esp + 0x24]
fstp dword [esp + 0x18]
fld dword [esp + 0x14]
fld dword [esp + 0x10]
fld dword [esp + 0x18]
fld st(1)
fmulp st(2)
fld st(2)
fmulp st(3)
fxch st(1)
faddp st(2)
fmul st(0), st(0)
faddp st(1)
fstp dword [esp + 0xc]
fld dword [esp + 0xc]
call fcn.0074c5a0
fstp dword [esp + 0xc]
fld dword [esp + 0xc]
fdiv dword [0x1afa838]
fsubr qword [0x7c1ef8]
fstp dword [esp + 0xc]
fld dword [esp + 0xc]
fst dword [edi]
fcom qword [0x7c1340]
fnstsw ax
test ah, 5
jp 0x5662a0
fstp st(0)
fldz
jmp 0x5662af
fcomp qword [0x7dd7a8]
fnstsw ax
test ah, 0x41
jne 0x5662b1
fld1
fstp dword [edi]
add edi, 4
add esi, 0xc
sub ebx, 1
jne 0x566224
pop edi
pop esi
pop ebx
add esp, 0x1c
ret
sub esp, 0x84
fld dword [0x1afa838]
push esi
fld st(0)
xor esi, esi
fld st(1)
lea edx, [esp + 0x28]
fchs
lea eax, [ecx + 0x14]
fsubp st(1)
fmul qword [0x795fb0]
fstp dword [esp + 4]
fld dword [ecx + 0x138]
fmul st(1)
fstp dword [esp + 0x20]
fld dword [ecx + 0x13c]
fmul st(1)
fstp dword [esp + 0x1c]
fld dword [esp + 0x1c]
mov dword [esp + 0x1c], esi
fst dword [esp + 0x24]
fst dword [esp + 0x28]
fst dword [esp + 0x2c]
fst dword [esp + 0x30]
fst dword [esp + 0x34]
fst dword [esp + 0x38]
fld dword [esp + 0x20]
fst dword [esp + 0x3c]
fst dword [esp + 0x40]
fst dword [esp + 0x44]
fst dword [esp + 0x50]
fxch st(1)
fst dword [esp + 0x48]
fst dword [esp + 0x4c]
fld dword [ecx + 0x134]
fmul st(3)
fstp dword [esp + 0x54]
fxch st(1)
fst dword [esp + 0x58]
fst dword [esp + 0x64]
fst dword [esp + 0x68]
fstp dword [esp + 0x6c]
fst dword [esp + 0x5c]
fst dword [esp + 0x60]
fst dword [esp + 0x70]
fst dword [esp + 0x74]
fst dword [esp + 0x78]
fst dword [esp + 0x7c]
fst dword [esp + 0x80]
fstp dword [esp + 0x84]
fld dword [esp + 4]
fld qword [0x795890]
fmul st(1)
fld st(1)
fld st(2)
fadd st(0), st(0)
fld st(3)
fmul qword [0x795860]
fld st(4)
fmul qword [0x795870]
fstp qword [esp + 4]
jmp 0x568012
fld dword [0x1afa838]
fxch st(5)
fild dword [esp + 0x1c]
add esi, 1
add eax, 0x3c
add edx, 0x14
cmp esi, 5
fmul st(5)
fld st(6)
fsub st(1)
fstp dword [esp + 0x1c]
fld st(4)
fsubrp st(7)
fxch st(6)
fstp dword [eax - 0x50]
fld dword [esp + 0x1c]
fstp dword [eax - 0x4c]
fld dword [edx - 0x18]
fstp dword [eax - 0x48]
fld dword [0x1afa838]
fld st(0)
fsub st(7)
fstp dword [esp + 0x1c]
fsubr st(3)
fstp dword [eax - 0x44]
fld dword [esp + 0x1c]
fstp dword [eax - 0x40]
fld dword [edx - 0x14]
fstp dword [eax - 0x3c]
fld dword [0x1afa838]
fld st(0)
fsub st(7)
fstp dword [esp + 0x1c]
fsubr st(2)
fstp dword [eax - 0x38]
fld dword [esp + 0x1c]
fstp dword [eax - 0x34]
fld dword [edx - 0x10]
fstp dword [eax - 0x30]
fld dword [0x1afa838]
fld st(0)
fsub st(7)
fstp dword [esp + 0x1c]
fsubr st(1)
fstp dword [eax - 0x2c]
fld dword [esp + 0x1c]
fstp dword [eax - 0x28]
fld dword [edx - 0xc]
fstp dword [eax - 0x24]
fld dword [0x1afa838]
fld st(0)
fsubrp st(7)
fxch st(6)
fstp dword [esp + 0x1c]
fld qword [esp + 4]
fsubrp st(6)
fxch st(5)
fstp dword [eax - 0x20]
fld dword [esp + 0x1c]
mov dword [esp + 0x1c], esi
fstp dword [eax - 0x1c]
fld dword [edx - 8]
fstp dword [eax - 0x18]
jl 0x56800a
fstp st(3)
fstp st(1)
fstp st(0)
fstp st(0)
fstp st(0)
fld dword [ecx + 0xc]
fsub dword [ecx + 0x3c]
fstp dword [esp + 4]
fld dword [ecx + 0x10]
fsub dword [ecx + 0x40]
fstp dword [esp + 8]
fld dword [ecx + 0x14]
fsub dword [ecx + 0x44]
fstp dword [esp + 0xc]
fld dword [esp + 4]
fld qword [0x795858]
fmul st(1), st(0)
fxch st(1)
fstp dword [esp + 0x10]
fld dword [esp + 8]
fmul st(1)
fstp dword [esp + 0x14]
fld dword [esp + 0xc]
fmul st(1)
fstp dword [esp + 0x18]
fld dword [esp + 0x10]
fadd dword [ecx + 0x3c]
fstp dword [esp + 4]
fld dword [ecx + 0x40]
fadd dword [esp + 0x14]
fstp dword [esp + 8]
fld dword [ecx + 0x44]
fadd dword [esp + 0x18]
fstp dword [esp + 0xc]
fld dword [esp + 4]
fsub dword [ecx + 0x48]
fstp dword [esp + 0x10]
fld dword [esp + 8]
fsub dword [ecx + 0x4c]
fstp dword [esp + 0x14]
fld dword [esp + 0xc]
fsub dword [ecx + 0x50]
fstp dword [esp + 0x18]
fld dword [esp + 0x10]
fld qword [0x795878]
fmul st(1), st(0)
fxch st(1)
fstp dword [esp + 4]
fld dword [esp + 0x14]
fmul st(1)
fstp dword [esp + 8]
fld dword [esp + 0x18]
fmul st(1)
fstp dword [esp + 0xc]
fld dword [ecx + 0x48]
fadd dword [esp + 4]
fstp dword [esp + 0x10]
mov eax, dword [esp + 0x10]
fld dword [ecx + 0x4c]
fadd dword [esp + 8]
fstp dword [esp + 0x14]
mov edx, dword [esp + 0x14]
fld dword [ecx + 0x50]
mov dword [ecx], eax
fadd dword [esp + 0xc]
mov dword [ecx + 4], edx
fstp dword [esp + 0x18]
mov eax, dword [esp + 0x18]
mov dword [ecx + 8], eax
fld dword [ecx + 0x24]
fsub dword [ecx + 0x6c]
fstp dword [esp + 0x10]
fld dword [ecx + 0x28]
fsub dword [ecx + 0x70]
fstp dword [esp + 0x14]
fld dword [ecx + 0x2c]
fsub dword [ecx + 0x74]
fstp dword [esp + 0x18]
fld dword [esp + 0x10]
fmul st(2)
fstp dword [esp + 4]
fld dword [esp + 0x14]
fmul st(2)
fstp dword [esp + 8]
fld dword [esp + 0x18]
fmul st(2)
fstp dword [esp + 0xc]
fld dword [ecx + 0x6c]
fadd dword [esp + 4]
fstp dword [esp + 0x10]
fld dword [ecx + 0x70]
fadd dword [esp + 8]
fstp dword [esp + 0x14]
fld dword [ecx + 0x74]
fadd dword [esp + 0xc]
fstp dword [esp + 0x18]
fld dword [esp + 0x10]
fsub dword [ecx + 0x60]
fstp dword [esp + 4]
fld dword [esp + 0x14]
fsub dword [ecx + 0x64]
fstp dword [esp + 8]
fld dword [esp + 0x18]
fsub dword [ecx + 0x68]
fstp dword [esp + 0xc]
fld dword [esp + 4]
fmul st(1)
fstp dword [esp + 0x10]
fld dword [esp + 8]
fmul st(1)
fstp dword [esp + 0x14]
fld dword [esp + 0xc]
fmul st(1)
fstp dword [esp + 0x18]
fld dword [ecx + 0x60]
fadd dword [esp + 0x10]
fstp dword [esp + 4]
mov edx, dword [esp + 4]
fld dword [ecx + 0x64]
fadd dword [esp + 0x14]
fstp dword [esp + 8]
mov eax, dword [esp + 8]
fld dword [ecx + 0x68]
mov dword [ecx + 0x30], edx
fadd dword [esp + 0x18]
mov dword [ecx + 0x34], eax
fstp dword [esp + 0xc]
mov edx, dword [esp + 0xc]
mov dword [ecx + 0x38], edx
fld dword [ecx + 0xb4]
fsub dword [ecx + 0xfc]
fstp dword [esp + 0x10]
fld dword [ecx + 0xb8]
fsub dword [ecx + 0x100]
fstp dword [esp + 0x14]
fld dword [ecx + 0xbc]
fsub dword [ecx + 0x104]
fstp dword [esp + 0x18]
fld dword [esp + 0x10]
fmul st(2)
fstp dword [esp + 4]
fld dword [esp + 0x14]
fmul st(2)
fstp dword [esp + 8]
fld dword [esp + 0x18]
fmul st(2)
fstp dword [esp + 0xc]
fld dword [ecx + 0xfc]
fadd dword [esp + 4]
fstp dword [esp + 0x10]
fld dword [ecx + 0x100]
fadd dword [esp + 8]
fstp dword [esp + 0x14]
fld dword [ecx + 0x104]
fadd dword [esp + 0xc]
fstp dword [esp + 0x18]
fld dword [esp + 0x10]
fsub dword [ecx + 0xc0]
fstp dword [esp + 4]
fld dword [esp + 0x14]
fsub dword [ecx + 0xc4]
fstp dword [esp + 8]
fld dword [esp + 0x18]
fsub dword [ecx + 0xc8]
fstp dword [esp + 0xc]
fld dword [esp + 4]
fmul st(1)
fstp dword [esp + 0x10]
fld dword [esp + 8]
fmul st(1)
fstp dword [esp + 0x14]
fld dword [esp + 0xc]
fmul st(1)
fstp dword [esp + 0x18]
fld dword [esp + 0x10]
fadd dword [ecx + 0xc0]
fstp dword [esp + 4]
mov eax, dword [esp + 4]
fld dword [ecx + 0xc4]
fadd dword [esp + 0x14]
fstp dword [esp + 8]
mov edx, dword [esp + 8]
fld dword [ecx + 0xc8]
mov dword [ecx + 0xf0], eax
fadd dword [esp + 0x18]
mov dword [ecx + 0xf4], edx
fstp dword [esp + 0xc]
mov eax, dword [esp + 0xc]
mov dword [ecx + 0xf8], eax
fld dword [ecx + 0xe4]
fsub dword [ecx + 0x114]
fstp dword [esp + 0x10]
fld dword [ecx + 0xe8]
fsub dword [ecx + 0x118]
fstp dword [esp + 0x14]
fld dword [ecx + 0xec]
fsub dword [ecx + 0x11c]
fstp dword [esp + 0x18]
fld dword [esp + 0x10]
fmul st(2)
fstp dword [esp + 4]
fld dword [esp + 0x14]
fmul st(2)
fstp dword [esp + 8]
fld dword [esp + 0x18]
fmulp st(2)
fxch st(1)
fstp dword [esp + 0xc]
fld dword [esp + 4]
fadd dword [ecx + 0x114]
fstp dword [esp + 0x10]
fld dword [ecx + 0x118]
fadd dword [esp + 8]
fstp dword [esp + 0x14]
fld dword [ecx + 0x11c]
fadd dword [esp + 0xc]
fstp dword [esp + 0x18]
fld dword [esp + 0x10]
fsub dword [ecx + 0xd8]
fstp dword [esp + 4]
fld dword [esp + 0x14]
fsub dword [ecx + 0xdc]
fstp dword [esp + 8]
fld dword [esp + 0x18]
fsub dword [ecx + 0xe0]
fstp dword [esp + 0xc]
fld dword [esp + 4]
fmul st(1)
fstp dword [esp + 0x10]
fld dword [esp + 8]
fmul st(1)
fstp dword [esp + 0x14]
fmul dword [esp + 0xc]
fstp dword [esp + 0x18]
fld dword [ecx + 0xd8]
fadd dword [esp + 0x10]
fstp dword [esp + 4]
fld dword [ecx + 0xdc]
fadd dword [esp + 0x14]
fstp dword [esp + 8]
fld dword [ecx + 0xe0]
fadd dword [esp + 0x18]
fstp dword [esp + 0xc]
mov edx, dword [esp + 4]
mov eax, dword [esp + 8]
mov dword [ecx + 0x120], edx
mov edx, dword [esp + 0xc]
mov dword [ecx + 0x124], eax
mov dword [ecx + 0x128], edx
pop esi
add esp, 0x84
jmp 0x566210