Function at 0x41a1d0
Capabilities:
Encode data using xor

Disassembly:
push r15
push r14
push r13
push r12
push rbp
push rdi
push rsi
push rbx
sub rsp, 0xc8
mov rdx, qword [rcx + 8]
mov rax, qword [rcx]
mov rdi, rax
mov qword [rsp + 0x48], rdx
mov rdx, qword [rcx + 0x18]
mov r12, rcx
mov qword [rsp + 0x40], rax
mov rax, qword [rcx + 0x10]
mov qword [rsp + 0x58], rdx
mov rdx, qword [rcx + 0x28]
mov r14, rax
mov qword [rsp + 0x50], rax
mov rax, qword [rcx + 0x20]
mov qword [rsp + 0x68], rdx
mov rdx, qword [r12 + 0x38]
mov qword [rsp + 0x60], rax
mov rcx, rax
mov rax, qword [r12 + 0x30]
mov qword [rsp + 0x78], rdx
mov rdx, qword [r12 + 0x48]
mov qword [rsp + 0x70], rax
mov r13, rax
mov rax, qword [r12 + 0x40]
mov qword [rsp + 0x88], rdx
mov rdx, qword [r12 + 0x58]
mov qword [rsp + 0x80], rax
mov r11, rax
mov rax, qword [r12 + 0x50]
mov qword [rsp + 0x98], rdx
mov rdx, qword [r12 + 0x68]
mov r9, qword [r12 + 0x78]
mov r10, rax
mov qword [rsp + 0x90], rax
mov qword [rsp + 0xa8], rdx
mov rax, qword [r12 + 0x60]
mov rdx, qword [r12 + 0x70]
mov qword [rsp + 0xb8], r9
mov qword [rsp + 0xa0], rax
mov r8, rax
mov qword [rsp + 0xb0], rdx
mov rbx, qword [rsp + 0x68]
mov rax, rdx
mov rsi, qword [rsp + 0x48]
mov qword [rsp + 0x110], r12
mov qword [rsp + 0x10], r14
mov rdx, qword [rsp + 0x88]
mov qword [rsp + 8], rsi
mov rsi, r10
mov r10, qword [rsp + 0x58]
mov r9, qword [rsp + 0xa8]
mov r15, qword [rsp + 0xb8]
mov qword [rsp + 0x38], 4
mov qword [rsp + 0x18], r10
mov r10, qword [rsp + 0x78]
mov r14, qword [rsp + 0x98]
mov qword [rsp + 0x20], r10
lea r10, [r8 + rdi]
mov r12, qword [rsp + 8]
rorx r10, r10, 0x20
xor rcx, r10
lea r10, [rcx + rdi]
rorx r10, r10, 0x33
xor r11, r10
lea r10, [rcx + r11]
rorx r10, r10, 0x19
xor r10, r8
lea r8, [r11 + r10]
mov qword [rsp + 0x28], r10
rorx r8, r8, 0x20
xor rdi, r8
lea r8, [r12 + rbx]
rorx r8, r8, 0x20
xor rdx, r8
lea r8, [rdx + rbx]
rorx r8, r8, 0x33
xor r8, r9
lea rbp, [rdx + r8]
mov qword [rsp + 0x30], r8
rorx rbp, rbp, 0x19
xor rbp, r12
lea r12, [r15 + r14]
lea r8, [r8 + rbp]
rorx r12, r12, 0x20
xor r12, qword [rsp + 0x18]
rorx r8, r8, 0x20
xor rbx, r8
lea r8, [r13 + rsi]
rorx r8, r8, 0x20
xor rax, r8
lea r9, [rax + rsi]
rorx r9, r9, 0x33
xor r9, qword [rsp + 0x10]
lea r8, [rax + r9]
rorx r8, r8, 0x19
xor r13, r8
lea r8, [r9 + r13]
rorx r8, r8, 0x20
xor rsi, r8
lea r8, [r12 + r15]
rorx r8, r8, 0x33
xor r8, qword [rsp + 0x20]
lea r10, [r12 + r8]
rorx r10, r10, 0x19
xor r10, r14
lea r14, [r8 + r10]
rorx r14, r14, 0x20
xor r15, r14
lea r14, [rdi + r12]
rorx r14, r14, 0x20
xor r14, rbp
lea rbp, [rdi + r14]
mov qword [rsp + 8], r14
rorx rbp, rbp, 0x33
xor rbp, r9
add r14, rbp
mov qword [rsp + 0x10], rbp
rorx r9, r14, 0x19
mov r14, r9
mov r9, rbp
xor r14, r12
add r9, r14
mov qword [rsp + 0x18], r14
lea r14, [rdx + rsi]
rorx r9, r9, 0x20
xor rdi, r9
lea r9, [rcx + rbx]
rorx r14, r14, 0x20
rorx r9, r9, 0x20
xor r13, r9
xor r14, r10
lea r9, [rbx + r13]
rorx r9, r9, 0x33
xor r9, r8
lea r8, [r13 + r9]
mov qword [rsp + 0x20], r9
rorx r8, r8, 0x19
xor rcx, r8
lea r8, [r9 + rcx]
rorx r8, r8, 0x20
xor rbx, r8
lea r8, [rsi + r14]
rorx r8, r8, 0x33
xor r11, r8
lea r8, [r14 + r11]
rorx r8, r8, 0x19
xor rdx, r8
lea r8, [r11 + rdx]
rorx r8, r8, 0x20
xor rsi, r8
lea r8, [rax + r15]
rorx r8, r8, 0x20
xor r8, qword [rsp + 0x28]
lea r9, [r15 + r8]
rorx r9, r9, 0x33
xor r9, qword [rsp + 0x30]
lea r10, [r8 + r9]
rorx r10, r10, 0x19
xor rax, r10
lea r10, [r9 + rax]
rorx r10, r10, 0x20
xor r15, r10
dec qword [rsp + 0x38]
jne 0x41a30b
vmovq xmm2, rbp
vmovq xmm3, rdi
vmovq xmm4, r13
mov r12, qword [rsp + 0x110]
vpinsrq xmm1, xmm2, qword [rsp + 0x18], 1
vmovq xmm5, rcx
vmovq xmm2, rsi
vpinsrq xmm0, xmm3, qword [rsp + 8], 1
vmovq xmm3, r11
vinserti128 ymm0, ymm0, xmm1, 1
vpaddq ymm0, ymm0, ymmword [r12]
vpinsrq xmm1, xmm5, rbx, 1
vmovq xmm5, r8
vmovdqu ymmword [r12], ymm0
vpinsrq xmm0, xmm4, qword [rsp + 0x20], 1
vmovq xmm4, rax
vinserti128 ymm0, ymm1, xmm0, 1
vpaddq ymm0, ymm0, ymmword [r12 + 0x20]
vpinsrq xmm1, xmm2, r14, 1
vmovdqu ymmword [r12 + 0x20], ymm0
vpinsrq xmm0, xmm3, rdx, 1
vinserti128 ymm0, ymm0, xmm1, 1
vpaddq ymm0, ymm0, ymmword [r12 + 0x40]
vpinsrq xmm1, xmm4, r15, 1
vmovdqu ymmword [r12 + 0x40], ymm0
vpinsrq xmm0, xmm5, r9, 1
vinserti128 ymm0, ymm0, xmm1, 1
vpaddq ymm0, ymm0, ymmword [r12 + 0x60]
vmovdqu ymmword [r12 + 0x60], ymm0
vzeroupper
add rsp, 0xc8
pop rbx
pop rsi
pop rdi
pop rbp
pop r12
pop r13
pop r14
pop r15
ret