Function at 0x1000a7e0
Capabilities:
Resolve function by parsing pe exports

Disassembly:
sub esp, 0x58
push ebx
push ebp
push esi
push edi
push 0xa0
mov ebx, eax
mov eax, dword [esp + 0x74]
push 0
push eax
mov edi, ecx
call fcn.100457d0
fld qword [0x100800a0]
mov eax, dword [esp + 0x88]
or ecx, 0xffffffff
mov dword [eax], ecx
mov dword [eax + 4], ecx
mov dword [eax + 8], ecx
mov dword [eax + 0xc], ecx
mov dword [ebx], ecx
mov dword [ebx + 4], ecx
mov dword [ebx + 8], ecx
mov dword [ebx + 0xc], ecx
mov eax, edi
lea ecx, [esp + 0x54]
add esp, 0xc
sub eax, ecx
mov dword [esp + 0x24], 0
mov dword [esp + 0x28], eax
jmp 0x1000a83f
mov eax, dword [esp + 0x28]
mov edx, dword [esp + 0x24]
mov ecx, dword [esp + 0x6c]
lea eax, [eax + edx*4]
mov ebp, dword [esp + eax + 0x48]
fld dword [ecx + ebp*4]
mov eax, ebp
sar eax, 2
mov esi, ebp
mov dword [esp + 0x20], eax
and esi, 3
call fcn.10047640
test eax, eax
mov eax, dword [esp + 0x70]
fld dword [eax + ebp*4]
jle 0x1000a884
mov edx, dword [esp + 0x24]
fadd st(1)
mov dword [esp + edx*4 + 0x48], 1
fstp dword [eax + ebp*4]
xor eax, eax
jmp 0x1000a89a
fsub st(1)
fstp dword [eax + ebp*4]
mov eax, dword [esp + 0x24]
mov dword [esp + eax*4 + 0x48], 0xffffffff
mov eax, 1
mov ebp, dword [ebx + esi*4]
test ebp, ebp
jge 0x1000a8b1
mov ecx, dword [esp + 0x20]
mov edx, dword [esp + 0x7c]
mov dword [ebx + esi*4], ecx
mov dword [edx + esi*4], eax
jmp 0x1000a8e7
mov ecx, dword [esp + 0x7c]
mov edx, dword [ecx + esi*4]
xor edx, eax
test dl, 1
mov edx, dword [esp + 0x20]
jne 0x1000a8d3
cmp ebp, edx
jle 0x1000a8e3
mov dword [ebx + esi*4 + 0x10], ebp
mov dword [ebx + esi*4], edx
mov dword [ecx + esi*4], eax
jmp 0x1000a8e7
cmp ebp, edx
jg 0x1000a8e3
mov dword [ebx + esi*4 + 0x10], ebp
mov dword [ebx + esi*4], edx
mov dword [ecx + esi*4], eax
jmp 0x1000a8e7
mov dword [ebx + esi*4 + 0x10], edx
mov eax, dword [esp + 0x24]
inc eax
cmp eax, 8
mov dword [esp + 0x24], eax
jl 0x1000a83b
mov eax, dword [edi + 0xc]
fstp st(0)
mov ecx, dword [edi + 0x10]
fild dword [esp + 0x48]
mov edx, dword [edi]
mov esi, dword [edi + 4]
mov ebx, dword [edi + 8]
fstp dword [esp + 0x34]
fild dword [esp + 0x4c]
mov dword [esp + 0x30], eax
mov eax, dword [edi + 0x14]
mov dword [esp + 0x2c], ecx
mov ecx, dword [edi + 0x18]
fstp dword [esp + 0x38]
mov edi, dword [edi + 0x1c]
fild dword [esp + 0x50]
mov dword [esp + 0x28], eax
lea eax, [ecx*4]
fstp dword [esp + 0x3c]
mov ebp, eax
mov eax, dword [esp + 0x74]
fild dword [esp + 0x54]
sub eax, ebp
mov ebp, ecx
sub ebp, edi
fstp dword [esp + 0x40]
fild dword [esp + 0x58]
lea edi, [eax + ebp*4 + 8]
mov dword [esp + 0x18], edi
mov edi, ecx
sub edi, dword [esp + 0x28]
fstp dword [esp + 0x44]
fild dword [esp + 0x5c]
mov dword [esp + 0x28], 4
lea edi, [eax + edi*4 + 8]
mov dword [esp + 0x14], edi
mov edi, ecx
fstp dword [esp + 0x1c]
sub edi, dword [esp + 0x2c]
fild dword [esp + 0x60]
lea edi, [eax + edi*4 + 8]
mov dword [esp + 0x74], edi
fstp dword [esp + 0x20]
fild dword [esp + 0x64]
mov edi, ecx
sub edi, dword [esp + 0x30]
lea ebp, [eax + edi*4 + 8]
fstp dword [esp + 0x24]
fld dword [esp + 0x34]
mov edi, ecx
fld dword [esp + 0x38]
sub edi, ebx
fld dword [esp + 0x3c]
mov ebx, ecx
fld dword [esp + 0x40]
sub ecx, edx
fld dword [esp + 0x44]
lea edx, [eax + ecx*4 + 8]
mov ecx, dword [esp + 0x78]
sub ebx, esi
lea edi, [eax + edi*4 + 8]
lea esi, [eax + ebx*4 + 8]
add ecx, 8
fld dword [edx - 8]
mov ebx, dword [esp + 0x74]
fmul st(5)
fld dword [esi - 8]
fmul st(5)
faddp st(1)
fld dword [edi - 8]
fmul st(4)
faddp st(1)
fld dword [ebp - 8]
fmul st(3)
faddp st(1)
fld dword [ebx - 8]
mov ebx, dword [esp + 0x14]
fmul st(2)
faddp st(1)
fld dword [ebx - 8]
mov ebx, dword [esp + 0x18]
fmul dword [esp + 0x1c]
faddp st(1)
fld dword [esp + 0x20]
fmul dword [eax]
faddp st(1)
fld dword [ebx - 8]
mov ebx, dword [esp + 0x74]
fmul dword [esp + 0x24]
faddp st(1)
fstp dword [ecx - 8]
fld dword [edx - 4]
fmul st(5)
fld dword [esi - 4]
fmul st(5)
faddp st(1)
fld dword [edi - 4]
fmul st(4)
faddp st(1)
fld dword [ebp - 4]
fmul st(3)
faddp st(1)
fld dword [ebx - 4]
mov ebx, dword [esp + 0x14]
fmul st(2)
faddp st(1)
fld dword [ebx - 4]
mov ebx, dword [esp + 0x18]
fmul dword [esp + 0x1c]
faddp st(1)
fld dword [eax + 4]
fmul dword [esp + 0x20]
faddp st(1)
fld dword [ebx - 4]
mov ebx, dword [esp + 0x74]
fmul dword [esp + 0x24]
faddp st(1)
fstp dword [ecx - 4]
fld dword [edx]
fmul st(5)
fld st(4)
fmul dword [esi]
faddp st(1)
fld dword [edi]
fmul st(4)
faddp st(1)
fld st(2)
fmul dword [ebp]
faddp st(1)
fld dword [ebx]
mov ebx, dword [esp + 0x14]
fmul st(2)
faddp st(1)
fld dword [esp + 0x1c]
fmul dword [ebx]
mov ebx, dword [esp + 0x18]
faddp st(1)
fld dword [eax + 8]
fmul dword [esp + 0x20]
faddp st(1)
fld dword [ebx]
fmul dword [esp + 0x24]
faddp st(1)
fstp dword [ecx]
fld dword [edx + 4]
mov ebx, dword [esp + 0x74]
fmul st(5)
fld dword [esi + 4]
fmul st(5)
faddp st(1)
fld dword [edi + 4]
fmul st(4)
faddp st(1)
fld dword [ebp + 4]
fmul st(3)
faddp st(1)
fld dword [ebx + 4]
mov ebx, dword [esp + 0x14]
fmul st(2)
faddp st(1)
fld dword [ebx + 4]
mov ebx, dword [esp + 0x18]
fmul dword [esp + 0x1c]
faddp st(1)
fld dword [eax + 0xc]
fmul dword [esp + 0x20]
faddp st(1)
fld dword [ebx + 4]
mov ebx, dword [esp + 0x74]
fmul dword [esp + 0x24]
faddp st(1)
fstp dword [ecx + 4]
fld dword [edx + 8]
fmul st(5)
fld dword [esi + 8]
fmul st(5)
faddp st(1)
fld dword [edi + 8]
fmul st(4)
faddp st(1)
fld dword [ebp + 8]
fmul st(3)
faddp st(1)
fld dword [ebx + 8]
mov ebx, dword [esp + 0x14]
fmul st(2)
faddp st(1)
fld dword [ebx + 8]
mov ebx, dword [esp + 0x18]
fmul dword [esp + 0x1c]
faddp st(1)
fld dword [eax + 0x10]
fmul dword [esp + 0x20]
faddp st(1)
fld dword [ebx + 8]
mov ebx, dword [esp + 0x74]
fmul dword [esp + 0x24]
faddp st(1)
fstp dword [ecx + 8]
fld dword [edx + 0xc]
fmul st(5)
fld dword [esi + 0xc]
fmul st(5)
faddp st(1)
fld dword [edi + 0xc]
fmul st(4)
faddp st(1)
fld dword [ebp + 0xc]
fmul st(3)
faddp st(1)
fld dword [ebx + 0xc]
mov ebx, dword [esp + 0x14]
fmul st(2)
faddp st(1)
fld dword [ebx + 0xc]
mov ebx, dword [esp + 0x18]
fmul dword [esp + 0x1c]
faddp st(1)
fld dword [eax + 0x14]
fmul dword [esp + 0x20]
faddp st(1)
fld dword [ebx + 0xc]
fmul dword [esp + 0x24]
faddp st(1)
fstp dword [ecx + 0xc]
fld dword [edx + 0x10]
mov ebx, dword [esp + 0x74]
fmul st(5)
fld dword [esi + 0x10]
fmul st(5)
faddp st(1)
fld dword [edi + 0x10]
fmul st(4)
faddp st(1)
fld dword [ebp + 0x10]
fmul st(3)
faddp st(1)
fld dword [ebx + 0x10]
mov ebx, dword [esp + 0x14]
fmul st(2)
faddp st(1)
fld dword [ebx + 0x10]
mov ebx, dword [esp + 0x18]
fmul dword [esp + 0x1c]
faddp st(1)
fld dword [eax + 0x18]
fmul dword [esp + 0x20]
faddp st(1)
fld dword [ebx + 0x10]
mov ebx, dword [esp + 0x74]
fmul dword [esp + 0x24]
faddp st(1)
fstp dword [ecx + 0x10]
fld dword [edx + 0x14]
fmul st(5)
fld dword [esi + 0x14]
fmul st(5)
faddp st(1)
fld dword [edi + 0x14]
fmul st(4)
faddp st(1)
fld dword [ebp + 0x14]
fmul st(3)
faddp st(1)
fld dword [ebx + 0x14]
mov ebx, dword [esp + 0x14]
fmul st(2)
faddp st(1)
fld dword [ebx + 0x14]
mov ebx, dword [esp + 0x18]
fmul dword [esp + 0x1c]
faddp st(1)
fld dword [eax + 0x1c]
fmul dword [esp + 0x20]
faddp st(1)
fld dword [ebx + 0x14]
mov ebx, dword [esp + 0x74]
fmul dword [esp + 0x24]
faddp st(1)
fstp dword [ecx + 0x14]
fld dword [edx + 0x18]
fmul st(5)
fld dword [esi + 0x18]
fmul st(5)
faddp st(1)
fld dword [edi + 0x18]
fmul st(4)
faddp st(1)
fld dword [ebp + 0x18]
fmul st(3)
faddp st(1)
fld dword [ebx + 0x18]
mov ebx, dword [esp + 0x14]
fmul st(2)
faddp st(1)
fld dword [ebx + 0x18]
mov ebx, dword [esp + 0x18]
fmul dword [esp + 0x1c]
faddp st(1)
fld dword [eax + 0x20]
fmul dword [esp + 0x20]
faddp st(1)
fld dword [ebx + 0x18]
fmul dword [esp + 0x24]
faddp st(1)
fstp dword [ecx + 0x18]
fld dword [edx + 0x1c]
mov ebx, dword [esp + 0x74]
fmul st(5)
add dword [esp + 0x74], 0x28
fld dword [esi + 0x1c]
add ecx, 0x28
fmul st(5)
add eax, 0x28
add edx, 0x28
add esi, 0x28
faddp st(1)
add edi, 0x28
fld dword [edi - 0xc]
add ebp, 0x28
fmul st(4)
faddp st(1)
fld dword [ebp - 0xc]
fmul st(3)
faddp st(1)
fld dword [ebx + 0x1c]
mov ebx, dword [esp + 0x14]
fmul st(2)
add dword [esp + 0x14], 0x28
faddp st(1)
fld dword [ebx + 0x1c]
mov ebx, dword [esp + 0x18]
fmul dword [esp + 0x1c]
add dword [esp + 0x18], 0x28
sub dword [esp + 0x28], 1
faddp st(1)
fld dword [eax - 4]
fmul dword [esp + 0x20]
faddp st(1)
fld dword [ebx + 0x1c]
fmul dword [esp + 0x24]
faddp st(1)
fstp dword [ecx - 0xc]
jne 0x1000a9d8
fstp st(4)
pop edi
fstp st(2)
pop esi
fstp st(0)
pop ebp
fstp st(0)
pop ebx
fstp st(0)
add esp, 0x58
ret