Function at 0x4e3480
Capabilities:
Resolve function by parsing pe exports

Disassembly:
sub esp, 0x58
mov eax, dword [esp + 0x64]
push ebx
push ebp
push esi
push edi
mov edi, dword [esp + 0x70]
test edi, edi
jle 0x4e3555
lea ecx, [edi + edi*2]
lea ebp, [edi + 1]
mov ebx, eax
lea esi, [eax + edi*4]
lea edx, [eax + edi*8]
lea ecx, [eax + ecx*4]
shr ebp, 1
fld dword [esi]
fadd dword [ebx]
fld dword [ebx + 4]
fadd dword [esi + 4]
add ecx, 8
add edx, 8
add esi, 8
add ebx, 8
dec ebp
fstp dword [esp + 0x24]
fld dword [ebx - 8]
fsub dword [esi - 8]
fstp dword [esp + 0x14]
fld dword [ebx - 4]
fsub dword [esi - 4]
fstp dword [esp + 0x18]
fld dword [ecx - 8]
fadd dword [edx - 8]
fld dword [edx - 4]
fadd dword [ecx - 4]
fstp dword [esp + 0x28]
fld dword [edx - 8]
fsub dword [ecx - 8]
fstp dword [esp + 0x1c]
fld dword [edx - 4]
fsub dword [ecx - 4]
fstp dword [esp + 0x10]
fld st(0)
fadd st(2)
fstp dword [ebx - 8]
fld dword [esp + 0x28]
fadd dword [esp + 0x24]
fstp dword [ebx - 4]
fxch st(1)
fsub st(1)
fstp dword [edx - 8]
fstp st(0)
fld dword [esp + 0x24]
fsub dword [esp + 0x28]
fstp dword [edx - 4]
fld dword [esp + 0x14]
fsub dword [esp + 0x10]
fstp dword [esi - 8]
fld dword [esp + 0x1c]
fadd dword [esp + 0x18]
fstp dword [esi - 4]
fld dword [esp + 0x10]
fadd dword [esp + 0x14]
fstp dword [ecx - 8]
fld dword [esp + 0x18]
fsub dword [esp + 0x1c]
fstp dword [ecx - 4]
jne 0x4e34aa
mov edx, dword [esp + 0x78]
mov ecx, dword [edx + 8]
mov dword [esp + 0x70], ecx
lea ecx, [edi*4]
mov dword [esp + 0x5c], ecx
lea edx, [ecx + edi]
cmp ecx, edx
mov dword [esp + 0x60], edx
jge 0x4e3658
lea esi, [eax + edx*4]
lea ebx, [eax + ecx*4]
lea edx, [ecx + edi*2]
lea ecx, [ecx + edi*2]
mov ebp, edi
add ebp, ecx
lea edx, [eax + edx*4]
lea ecx, [eax + ebp*4]
mov ebp, dword [esp + 0x60]
sub ebp, dword [esp + 0x5c]
inc ebp
shr ebp, 1
fld dword [esi]
fadd dword [ebx]
fld dword [ebx + 4]
fadd dword [esi + 4]
fld dword [ebx]
fsub dword [esi]
add ecx, 8
add edx, 8
add esi, 8
add ebx, 8
dec ebp
fstp dword [esp + 0x14]
fld dword [ebx - 4]
fsub dword [esi - 4]
fstp dword [esp + 0x18]
fld dword [ecx - 8]
fadd dword [edx - 8]
fstp dword [esp + 0x58]
fld dword [ecx - 4]
fadd dword [edx - 4]
fld dword [edx - 8]
fsub dword [ecx - 8]
fstp dword [esp + 0x1c]
fld dword [edx - 4]
fsub dword [ecx - 4]
fstp dword [esp + 0x10]
fld dword [esp + 0x58]
fadd st(3)
fstp dword [ebx - 8]
fld st(0)
fadd st(2)
fstp dword [ebx - 4]
fsub st(1)
fstp dword [edx - 8]
fstp st(0)
fsub dword [esp + 0x58]
fstp dword [edx - 4]
fld dword [esp + 0x14]
fsub dword [esp + 0x10]
fld dword [esp + 0x1c]
fadd dword [esp + 0x18]
fld st(1)
fsub st(1)
fmul dword [esp + 0x70]
fstp dword [esi - 8]
fadd st(1)
fmul dword [esp + 0x70]
fstp dword [esi - 4]
fstp st(0)
fld dword [esp + 0x10]
fadd dword [esp + 0x14]
fld dword [esp + 0x1c]
fsub dword [esp + 0x18]
fld st(0)
fsub st(2)
fmul dword [esp + 0x70]
fstp dword [ecx - 8]
fadd st(1)
fmul dword [esp + 0x70]
fstp dword [ecx - 4]
fstp st(0)
jne 0x4e359b
mov esi, dword [esp + 0x6c]
lea edx, [edi*4]
mov dword [esp + 0x40], 0
lea ecx, [edx + edx]
mov ebp, ecx
cmp ecx, esi
mov dword [esp + 0x60], ecx
mov dword [esp + 0x44], ebp
jge 0x4e3a2c
lea esi, [eax + ecx*4]
lea ebx, [ecx + edx]
mov dword [esp + 0x48], esi
mov esi, dword [esp + 0x78]
mov dword [esp + 0x3c], esi
lea esi, [eax + ebx*4]
mov dword [esp + 0x50], esi
lea esi, [ecx + edi]
mov dword [esp + 0x58], ebx
lea esi, [eax + esi*4]
mov dword [esp + 0x4c], esi
lea esi, [ebx + edi]
lea esi, [eax + esi*4]
mov dword [esp + 0x54], esi
mov esi, edi
sub esi, edx
mov dword [esp + 0x64], esi
mov edx, dword [esp + 0x40]
mov esi, dword [esp + 0x3c]
add edx, 2
add esi, 8
mov dword [esp + 0x3c], esi
mov dword [esp + 0x40], edx
lea esi, [edx + edx]
mov edx, dword [esp + 0x3c]
mov edx, dword [edx]
mov dword [esp + 0x2c], edx
mov edx, dword [esp + 0x3c]
mov edx, dword [edx + 4]
mov dword [esp + 0x30], edx
mov edx, dword [esp + 0x78]
fld dword [edx + esi*4]
fstp dword [esp + 0x70]
fld dword [edx + esi*4 + 4]
mov esi, dword [esp + 0x64]
fst dword [esp + 0x20]
fmul dword [esp + 0x30]
add esi, ebx
cmp ebp, esi
mov dword [esp + 0x5c], esi
fadd st(0), st(0)
fsubr dword [esp + 0x70]
fstp dword [esp + 0x34]
fld dword [esp + 0x30]
fmul dword [esp + 0x70]
fadd st(0), st(0)
fsub dword [esp + 0x20]
fstp dword [esp + 0x38]
jge 0x4e3866
lea ecx, [ebp + edi*2]
lea ebx, [ebp + edi*2]
mov ebp, edi
mov esi, dword [esp + 0x48]
add ebp, ebx
mov ebx, dword [esp + 0x5c]
mov edx, dword [esp + 0x4c]
lea ecx, [eax + ecx*4]
lea eax, [eax + ebp*4]
mov ebp, dword [esp + 0x44]
sub ebx, ebp
inc ebx
shr ebx, 1
fld dword [edx]
fadd dword [esi]
fld dword [esi + 4]
fadd dword [edx + 4]
fstp dword [esp + 0x24]
fld dword [esi]
fsub dword [edx]
fstp dword [esp + 0x14]
fld dword [esi + 4]
fsub dword [edx + 4]
fstp dword [esp + 0x18]
fld dword [eax]
fadd dword [ecx]
fld dword [ecx + 4]
fadd dword [eax + 4]
fstp dword [esp + 0x28]
fld dword [ecx]
fsub dword [eax]
fstp dword [esp + 0x1c]
fld dword [ecx + 4]
fsub dword [eax + 4]
fstp dword [esp + 0x10]
fld st(0)
fadd st(2)
fstp dword [esi]
fld dword [esp + 0x28]
fadd dword [esp + 0x24]
fstp dword [esi + 4]
fxch st(1)
fsub st(1)
fxch st(1)
fstp st(0)
fld dword [esp + 0x24]
fsub dword [esp + 0x28]
fld dword [esp + 0x2c]
fmul st(2)
fld dword [esp + 0x30]
fmul st(2)
fsubp st(1)
fstp dword [ecx]
fld dword [esp + 0x2c]
fmul st(1)
fld dword [esp + 0x30]
fmul st(3)
faddp st(1)
fstp dword [ecx + 4]
fstp st(0)
fstp st(0)
fld dword [esp + 0x14]
fsub dword [esp + 0x10]
fld dword [esp + 0x1c]
fadd dword [esp + 0x18]
fld dword [esp + 0x70]
fmul st(2)
fld dword [esp + 0x20]
fmul st(2)
fsubp st(1)
fstp dword [edx]
fld dword [esp + 0x20]
fmul st(2)
fld dword [esp + 0x70]
fmul st(2)
faddp st(1)
fstp dword [edx + 4]
fstp st(0)
fstp st(0)
fld dword [esp + 0x10]
fadd dword [esp + 0x14]
fld dword [esp + 0x18]
fsub dword [esp + 0x1c]
fld dword [esp + 0x34]
fmul st(2)
fld dword [esp + 0x38]
fmul st(2)
fsubp st(1)
fstp dword [eax]
fld dword [esp + 0x34]
fmul st(1)
fld dword [esp + 0x38]
fmul st(3)
faddp st(1)
fstp dword [eax + 4]
add eax, 8
add ecx, 8
fstp st(0)
add edx, 8
add esi, 8
dec ebx
fstp st(0)
jne 0x4e3753
mov ebx, dword [esp + 0x58]
mov ecx, dword [esp + 0x60]
mov eax, dword [esp + 0x74]
mov edx, dword [esp + 0x78]
mov esi, dword [esp + 0x40]
add esi, esi
fld dword [edx + esi*4 + 8]
fstp dword [esp + 0x70]
fld dword [edx + esi*4 + 0xc]
mov edx, dword [esp + 0x5c]
fst dword [esp + 0x20]
fmul dword [esp + 0x2c]
lea edx, [edx + edi*4]
cmp ebx, edx
mov dword [esp + 0x5c], edx
fadd st(0), st(0)
fsubr dword [esp + 0x70]
fstp dword [esp + 0x34]
fld dword [esp + 0x2c]
fmul dword [esp + 0x70]
fadd st(0), st(0)
fsub dword [esp + 0x20]
fstp dword [esp + 0x38]
jge 0x4e39e5
lea ecx, [ebx + edi*2]
lea ebx, [ebx + edi*2]
mov ebp, edi
mov esi, dword [esp + 0x50]
add ebp, ebx
mov ebx, dword [esp + 0x58]
mov edx, dword [esp + 0x54]
lea ecx, [eax + ecx*4]
lea eax, [eax + ebp*4]
mov ebp, dword [esp + 0x5c]
sub ebp, ebx
inc ebp
shr ebp, 1
fld dword [edx]
fadd dword [esi]
fld dword [esi + 4]
fadd dword [edx + 4]
fstp dword [esp + 0x24]
fld dword [esi]
fsub dword [edx]
fstp dword [esp + 0x14]
fld dword [esi + 4]
fsub dword [edx + 4]
fstp dword [esp + 0x18]
fld dword [eax]
fadd dword [ecx]
fld dword [eax + 4]
fadd dword [ecx + 4]
fstp dword [esp + 0x28]
fld dword [ecx]
fsub dword [eax]
fstp dword [esp + 0x1c]
fld dword [ecx + 4]
fsub dword [eax + 4]
fstp dword [esp + 0x10]
fld st(0)
fadd st(2)
fstp dword [esi]
fld dword [esp + 0x28]
fadd dword [esp + 0x24]
fstp dword [esi + 4]
fxch st(1)
fsub st(1)
fxch st(1)
fstp st(0)
fld dword [esp + 0x24]
fsub dword [esp + 0x28]
fld dword [esp + 0x30]
fmul st(2)
fchs
fld dword [esp + 0x2c]
fmul st(2)
fsubp st(1)
fstp dword [ecx]
fld dword [esp + 0x2c]
fmul st(2)
fld dword [esp + 0x30]
fmul st(2)
fsubp st(1)
fstp dword [ecx + 4]
fstp st(0)
fstp st(0)
fld dword [esp + 0x14]
fsub dword [esp + 0x10]
fld dword [esp + 0x1c]
fadd dword [esp + 0x18]
fld dword [esp + 0x70]
fmul st(2)
fld dword [esp + 0x20]
fmul st(2)
fsubp st(1)
fstp dword [edx]
fld dword [esp + 0x20]
fmul st(2)
fld dword [esp + 0x70]
fmul st(2)
faddp st(1)
fstp dword [edx + 4]
fstp st(0)
fstp st(0)
fld dword [esp + 0x10]
fadd dword [esp + 0x14]
fld dword [esp + 0x18]
fsub dword [esp + 0x1c]
fld dword [esp + 0x34]
fmul st(2)
fld dword [esp + 0x38]
fmul st(2)
fsubp st(1)
fstp dword [eax]
fld dword [esp + 0x34]
fmul st(1)
fld dword [esp + 0x38]
fmul st(3)
faddp st(1)
add eax, 8
add ecx, 8
add edx, 8
add esi, 8
fstp dword [eax - 4]
dec ebp
fstp st(0)
fstp st(0)
jne 0x4e38d4
mov ebp, dword [esp + 0x44]
mov ecx, dword [esp + 0x60]
mov eax, dword [esp + 0x74]
mov esi, dword [esp + 0x48]
lea edx, [ecx*4]
add esi, edx
add ebp, ecx
mov dword [esp + 0x48], esi
mov esi, dword [esp + 0x4c]
add esi, edx
add ebx, ecx
mov dword [esp + 0x4c], esi
mov esi, dword [esp + 0x50]
add esi, edx
mov dword [esp + 0x44], ebp
mov dword [esp + 0x50], esi
mov esi, dword [esp + 0x54]
add esi, edx
mov edx, dword [esp + 0x6c]
cmp ebp, edx
mov dword [esp + 0x54], esi
mov dword [esp + 0x58], ebx
jl 0x4e36b9
pop edi
pop esi
pop ebp
pop ebx
add esp, 0x58
ret 0x10