Function at 0x14001acf0
Capabilities:
Encode data using xor

Disassembly:
push r15
push r14
push r13
push r12
push rsi
push rdi
push rbp
push rbx
push rax
mov byte [rsp + 5], r9b
movzx ebx, byte [rsp + 0x78]
movzx r11d, byte [rsp + 0x70]
movsxd r10, dword [rcx]
shl r10, 0xb
lea r9, [rcx + r10]
add r9, 0x20
mov word [rsp + 6], 0x100
movzx edx, dl
shl edx, 6
add rcx, r10
add rcx, 0x420
xor r10d, r10d
movzx r11d, r11b
movzx esi, bl
lea ebx, [rdx + 0x180]
lea r14, [0x14032e7c0]
lea rax, [0x14010eec0]
nop word cs:[rax + rax]
movzx ebp, byte [rsp + r10 + 6]
imul r12d, ebp, 0x38
test bpl, bpl
mov r13d, esi
cmove r13d, r11d
mov r15, rcx
cmove r15, r9
mov edi, r13d
xor dil, r12b
movzx edi, dil
mov edi, dword [rax + rdi*4]
shl r13b, 5
sar r13b, 7
and r13b, 7
xor r12b, byte [rsp + 5]
xor r12b, r13b
lea edi, [rdi + rdi*2]
shl edi, 8
cmp bpl, r8b
mov ebp, edx
movzx r12d, r12b
cmove ebp, ebx
add ebp, r12d
add ebp, edi
shl ebp, 9
movsxd r12, ebp
vmovdqa ymm0, ymmword [r15]
vmovdqa ymm1, ymmword [r15 + 0x20]
vmovdqa ymm2, ymmword [r15 + 0x40]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2]
vmovdqa ymm3, ymmword [r15 + 0x60]
vmovdqa ymmword [r15], ymm0
vpsubw ymm0, ymm1, ymmword [r14 + r12*2 + 0x20]
vmovdqa ymmword [r15 + 0x20], ymm0
vpsubw ymm0, ymm2, ymmword [r14 + r12*2 + 0x40]
vmovdqa ymmword [r15 + 0x40], ymm0
vpsubw ymm0, ymm3, ymmword [r14 + r12*2 + 0x60]
vmovdqa ymmword [r15 + 0x60], ymm0
vmovdqa ymm0, ymmword [r15 + 0x80]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x80]
vmovdqa ymmword [r15 + 0x80], ymm0
vmovdqa ymm0, ymmword [r15 + 0xa0]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0xa0]
vmovdqa ymmword [r15 + 0xa0], ymm0
vmovdqa ymm0, ymmword [r15 + 0xc0]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0xc0]
vmovdqa ymmword [r15 + 0xc0], ymm0
vmovdqa ymm0, ymmword [r15 + 0xe0]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0xe0]
vmovdqa ymmword [r15 + 0xe0], ymm0
vmovdqa ymm0, ymmword [r15 + 0x100]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x100]
vmovdqa ymmword [r15 + 0x100], ymm0
vmovdqa ymm0, ymmword [r15 + 0x120]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x120]
vmovdqa ymmword [r15 + 0x120], ymm0
vmovdqa ymm0, ymmword [r15 + 0x140]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x140]
vmovdqa ymmword [r15 + 0x140], ymm0
vmovdqa ymm0, ymmword [r15 + 0x160]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x160]
vmovdqa ymmword [r15 + 0x160], ymm0
vmovdqa ymm0, ymmword [r15 + 0x180]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x180]
vmovdqa ymmword [r15 + 0x180], ymm0
vmovdqa ymm0, ymmword [r15 + 0x1a0]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x1a0]
vmovdqa ymmword [r15 + 0x1a0], ymm0
vmovdqa ymm0, ymmword [r15 + 0x1c0]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x1c0]
vmovdqa ymmword [r15 + 0x1c0], ymm0
vmovdqa ymm0, ymmword [r15 + 0x1e0]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x1e0]
vmovdqa ymmword [r15 + 0x1e0], ymm0
vmovdqa ymm0, ymmword [r15 + 0x200]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x200]
vmovdqa ymmword [r15 + 0x200], ymm0
vmovdqa ymm0, ymmword [r15 + 0x220]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x220]
vmovdqa ymmword [r15 + 0x220], ymm0
vmovdqa ymm0, ymmword [r15 + 0x240]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x240]
vmovdqa ymmword [r15 + 0x240], ymm0
vmovdqa ymm0, ymmword [r15 + 0x260]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x260]
vmovdqa ymmword [r15 + 0x260], ymm0
vmovdqa ymm0, ymmword [r15 + 0x280]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x280]
vmovdqa ymmword [r15 + 0x280], ymm0
vmovdqa ymm0, ymmword [r15 + 0x2a0]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x2a0]
vmovdqa ymmword [r15 + 0x2a0], ymm0
vmovdqa ymm0, ymmword [r15 + 0x2c0]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x2c0]
vmovdqa ymmword [r15 + 0x2c0], ymm0
vmovdqa ymm0, ymmword [r15 + 0x2e0]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x2e0]
vmovdqa ymmword [r15 + 0x2e0], ymm0
vmovdqa ymm0, ymmword [r15 + 0x300]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x300]
vmovdqa ymmword [r15 + 0x300], ymm0
vmovdqa ymm0, ymmword [r15 + 0x320]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x320]
vmovdqa ymmword [r15 + 0x320], ymm0
vmovdqa ymm0, ymmword [r15 + 0x340]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x340]
vmovdqa ymmword [r15 + 0x340], ymm0
vmovdqa ymm0, ymmword [r15 + 0x360]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x360]
vmovdqa ymmword [r15 + 0x360], ymm0
vmovdqa ymm0, ymmword [r15 + 0x380]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x380]
vmovdqa ymmword [r15 + 0x380], ymm0
vmovdqa ymm0, ymmword [r15 + 0x3a0]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x3a0]
vmovdqa ymmword [r15 + 0x3a0], ymm0
vmovdqa ymm0, ymmword [r15 + 0x3c0]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x3c0]
vmovdqa ymmword [r15 + 0x3c0], ymm0
vmovdqa ymm0, ymmword [r15 + 0x3e0]
vpsubw ymm0, ymm0, ymmword [r14 + r12*2 + 0x3e0]
vmovdqa ymmword [r15 + 0x3e0], ymm0
inc r10
cmp r10, 2
jne 0x14001ad60
add rsp, 8
pop rbx
pop rbp
pop rdi
pop rsi
pop r12
pop r13
pop r14
pop r15
vzeroupper
ret