Function at 0x40c820
Capabilities:
Resolve function by parsing pe exports

Disassembly:
push edi
push esi
push ebp
push ebx
sub esp, 0xb4
mov ebp, dword [esp + 0xc8]
mov ecx, dword [ebp]
mov eax, dword [esp + 0xcc]
mov edi, dword [esp + 0xd0]
mov dword [esp], ecx
mov ebx, ecx
sar ebx, 1
mov edx, ecx
and edx, 0xfffffffc
lea eax, [eax + ebx*4]
lea esi, [eax - 0x1c]
mov dword [esp + 0xc], esi
mov esi, dword [ebp + 8]
lea edi, [edi + ebx*4]
mov ecx, dword [esp + 0xc]
mov ebp, dword [esp + 0xcc]
mov dword [esp + 0xb0], edi
add edi, edx
add esi, edx
mov dword [esp + 8], edi
mov dword [esp + 4], edi
fld dword [ecx + 8]
fld dword [ecx]
fmul dword [esi + 8]
add edi, 0xfffffff0
fxch st(1)
fchs
fmul dword [esi + 0xc]
fsubrp st(1)
fstp dword [edi]
fld dword [ecx]
fmul dword [esi + 0xc]
fld dword [ecx + 8]
fmul dword [esi + 8]
fsubp st(1)
fstp dword [edi + 4]
fld dword [ecx + 0x18]
fchs
fmul dword [esi + 4]
fld dword [ecx + 0x10]
fmul dword [esi]
fsubp st(1)
fstp dword [edi + 8]
fld dword [ecx + 0x10]
fmul dword [esi + 4]
fld dword [ecx + 0x18]
fmul dword [esi]
fsubp st(1)
fstp dword [edi + 0xc]
add ecx, 0xffffffe0
add esi, 0x10
cmp ecx, ebp
jae 0x40c87c
mov ecx, dword [esp]
mov ebp, dword [esp + 0xc8]
mov edi, dword [esp + 4]
mov esi, dword [ebp + 8]
add eax, 0xffffffe0
add esi, edx
mov ebp, dword [esp + 0xcc]
jmp 0x40c8f0
fstp dword [edi - 4]
fld dword [eax + 0x10]
fld dword [eax + 0x18]
add esi, 0xfffffff0
fxch st(1)
fmul dword [esi + 0xc]
fxch st(1)
fmul dword [esi + 8]
faddp st(1)
fstp dword [edi]
fld dword [eax + 0x10]
fmul dword [esi + 8]
fld dword [eax + 0x18]
fmul dword [esi + 0xc]
fsubp st(1)
fstp dword [edi + 4]
fld dword [eax]
fmul dword [esi + 4]
fld dword [eax + 8]
fmul dword [esi]
faddp st(1)
fstp dword [edi + 8]
fld dword [eax]
fmul dword [esi]
fld dword [eax + 8]
fmul dword [esi + 4]
fsubp st(1)
add eax, 0xffffffe0
add edi, 0x10
cmp eax, ebp
jae 0x40c8ed
fstp dword [edi - 4]
mov ebp, dword [esp + 0xc8]
mov esi, dword [ebp + 8]
mov eax, dword [ebp + 4]
lea edi, [eax - 6]
test edi, edi
jle 0x40cac0
mov edi, dword [esp + 0xb0]
mov dword [esp + 0xc], edx
mov ebp, esi
mov dword [esp + 0x10], ebx
lea edx, [edi + ebx*4]
add edx, 0xffffffe0
and ecx, 0xfffffffc
mov dword [esp], edx
mov edx, dword [esp + 0xc]
mov ebx, dword [esp]
lea ecx, [ecx + edi - 0x20]
jmp 0x40c985
fstp dword [ecx + 0x24]
fld dword [ebx + 0x18]
fld dword [ebx + 0x18]
fld dword [ecx + 0x18]
fadd st(2), st(0)
fsubp st(1)
fld dword [ebx + 0x1c]
fld dword [ecx + 0x1c]
fxch st(3)
fstp dword [ebx + 0x18]
fsubr st(2), st(0)
fld dword [ecx + 0x1c]
faddp st(1)
fstp dword [ebx + 0x1c]
fld dword [ebp]
fmul st(1)
fld dword [ebp + 4]
fmul st(3)
faddp st(1)
fld dword [ecx + 0x14]
fxch st(1)
fstp dword [ecx + 0x18]
fld dword [ebp]
fmulp st(3)
fld dword [ebp + 4]
fmulp st(2)
fxch st(1)
fsubp st(2)
fxch st(1)
fstp dword [ecx + 0x1c]
fld dword [ecx + 0x10]
fld dword [ebx + 0x10]
fld dword [ebx + 0x10]
fxch st(1)
fadd st(2)
fld dword [ebx + 0x14]
fxch st(1)
fstp dword [ebx + 0x10]
fxch st(2)
fsubp st(1)
fxch st(1)
fsubr st(2), st(0)
fld dword [ecx + 0x14]
faddp st(1)
fstp dword [ebx + 0x14]
fld dword [ebp + 0x10]
fmul st(1)
fld dword [ebp + 0x14]
fmul st(3)
faddp st(1)
fld dword [ecx + 0xc]
fxch st(1)
fstp dword [ecx + 0x10]
fld dword [ebp + 0x10]
fmulp st(3)
fld dword [ebp + 0x14]
fmulp st(2)
fxch st(1)
fsubp st(2)
fxch st(1)
fstp dword [ecx + 0x14]
fld dword [ecx + 8]
fld dword [ebx + 8]
fld dword [ebx + 8]
fxch st(1)
fadd st(2)
fld dword [ebx + 0xc]
fxch st(1)
fstp dword [ebx + 8]
fxch st(2)
fsubp st(1)
fxch st(1)
fsubr st(2), st(0)
fld dword [ecx + 0xc]
faddp st(1)
fstp dword [ebx + 0xc]
fld dword [ebp + 0x20]
fmul st(1)
fld dword [ebp + 0x24]
fmul st(3)
faddp st(1)
fld dword [ecx + 4]
fxch st(1)
fstp dword [ecx + 8]
fld dword [ebp + 0x20]
fmulp st(3)
fld dword [ebp + 0x24]
fmulp st(2)
fxch st(1)
fsubp st(2)
fxch st(1)
fstp dword [ecx + 0xc]
fld dword [ecx]
fld dword [ebx]
fld dword [ebx]
fxch st(1)
fadd st(2)
fld dword [ebx + 4]
fxch st(1)
fstp dword [ebx]
fxch st(2)
fsubp st(1)
fxch st(1)
fsubr st(2), st(0)
fld dword [ecx + 4]
faddp st(1)
fstp dword [ebx + 4]
add ebx, 0xffffffe0
fld dword [ebp + 0x30]
fmul st(1)
fld dword [ebp + 0x34]
fmul st(3)
faddp st(1)
fstp dword [ecx]
fld dword [ebp + 0x30]
fmulp st(2)
fld dword [ebp + 0x34]
fmulp st(1)
fsubp st(1)
add ecx, 0xffffffe0
add ebp, 0x40
cmp ecx, edi
jae 0x40c982
fstp dword [ecx + 0x24]
mov ebx, dword [esp + 0x10]
mov ebp, dword [esp + 0xc8]
add eax, 0xfffffff9
test eax, eax
jle 0x40cca0
mov dword [esp + 0xc], edx
mov dword [esp + 0x1c], esi
mov dword [esp + 0x10], ebx
mov ecx, 1
mov esi, 1
shl esi, cl
test esi, esi
jle 0x40cc87
mov ebp, dword [esp + 0x10]
sar ebp, cl
mov dword [esp + 0x20], esi
mov dword [esp], ecx
mov edi, ebp
mov dword [esp + 0x14], eax
xor ebx, ebx
mov edx, 4
shl edx, cl
mov dword [esp + 0x28], edx
shr edi, 1
mov dword [esp + 0x24], edi
xor edx, edx
mov ecx, dword [esp + 0x1c]
mov esi, dword [esp + 0xb0]
mov eax, dword [esp + 0x24]
mov dword [esp + 0x18], ebx
lea esi, [esi + edx*4]
mov ebx, dword [esp + 0x28]
lea edi, [esi + ebp*4]
add edi, 0xffffffe0
lea eax, [esi + eax*4]
add eax, 0xffffffe0
jmp 0x40cb3e
fstp dword [eax + 0x24]
fld dword [edi + 0x18]
fld dword [edi + 0x18]
fld dword [eax + 0x18]
fadd st(2), st(0)
fsubp st(1)
fld dword [edi + 0x1c]
fld dword [eax + 0x1c]
fxch st(3)
fstp dword [edi + 0x18]
fsubr st(2), st(0)
fld dword [eax + 0x1c]
faddp st(1)
fstp dword [edi + 0x1c]
fld dword [ecx]
fmul st(1)
fld dword [ecx + 4]
fmul st(3)
faddp st(1)
fld dword [eax + 0x14]
fxch st(1)
fstp dword [eax + 0x18]
fld dword [ecx]
fmulp st(3)
fld dword [ecx + 4]
fmulp st(2)
fxch st(1)
fsubp st(2)
fxch st(1)
fstp dword [eax + 0x1c]
fld dword [eax + 0x10]
fld dword [edi + 0x10]
fld dword [edi + 0x10]
fxch st(1)
fadd st(2)
fld dword [edi + 0x14]
fxch st(1)
fstp dword [edi + 0x10]
fxch st(2)
fsubp st(1)
fxch st(1)
fsubr st(2), st(0)
fld dword [eax + 0x14]
faddp st(1)
fstp dword [edi + 0x14]
lea ecx, [ecx + ebx*4]
fld dword [ecx]
fmul st(1)
fld dword [ecx + 4]
fmul st(3)
faddp st(1)
fld dword [eax + 0xc]
fxch st(1)
fstp dword [eax + 0x10]
fld dword [ecx]
fmulp st(3)
fld dword [ecx + 4]
fmulp st(2)
fxch st(1)
fsubp st(2)
fxch st(1)
fstp dword [eax + 0x14]
fld dword [eax + 8]
lea ecx, [ecx + ebx*4]
fld dword [edi + 8]
fld dword [edi + 8]
fxch st(1)
fadd st(2)
fld dword [edi + 0xc]
fxch st(1)
fstp dword [edi + 8]
fxch st(2)
fsubp st(1)
fxch st(1)
fsubr st(2), st(0)
fld dword [eax + 0xc]
faddp st(1)
fstp dword [edi + 0xc]
fld dword [ecx]
fmul st(1)
fld dword [ecx + 4]
fmul st(3)
faddp st(1)
fld dword [eax + 4]
fxch st(1)
fstp dword [eax + 8]
fld dword [ecx]
fmulp st(3)
fld dword [ecx + 4]
fmulp st(2)
fxch st(1)
fsubp st(2)
fxch st(1)
fstp dword [eax + 0xc]
fld dword [eax]
fld dword [edi]
fld dword [edi]
fxch st(1)
fadd st(2)
fld dword [edi + 4]
fxch st(1)
fstp dword [edi]
fxch st(2)
fsubp st(1)
fxch st(1)
fsubr st(2), st(0)
fld dword [eax + 4]
faddp st(1)
fstp dword [edi + 4]
lea ecx, [ecx + ebx*4]
fld dword [ecx]
fmul st(1)
fld dword [ecx + 4]
fmul st(3)
faddp st(1)
fstp dword [eax]
add edi, 0xffffffe0
fld dword [ecx]
fmulp st(2)
fld dword [ecx + 4]
fmulp st(1)
fsubp st(1)
lea ecx, [ecx + ebx*4]
add eax, 0xffffffe0
cmp eax, esi
jae 0x40cb3b
fstp dword [eax + 0x24]
mov ebx, dword [esp + 0x18]
add edx, ebp
inc ebx
cmp ebx, dword [esp + 0x20]
jl 0x40cb13
mov ecx, dword [esp]
mov eax, dword [esp + 0x14]
inc ecx
dec eax
test eax, eax
jg 0x40cadc
mov edx, dword [esp + 0xc]
mov ebx, dword [esp + 0x10]
mov ebp, dword [esp + 0xc8]
test ebx, ebx
jle 0x40d40d
fld dword [0x43a960]
fstp st(0)
fld dword [0x43a964]
fstp st(0)
xor eax, eax
fld dword [0x43a968]
fstp st(0)
mov ecx, dword [esp + 0xb0]
jmp 0x40cccf
fstp dword [ecx + eax*4 - 0xc]
fld dword [ecx + eax*4 + 0x78]
fld dword [ecx + eax*4 + 0x78]
fld dword [ecx + eax*4 + 0x38]
fadd st(2), st(0)
fld dword [ecx + eax*4 + 0x7c]
fld dword [ecx + eax*4 + 0x3c]
fld dword [ecx + eax*4 + 0x70]
fld dword [ecx + eax*4 + 0x34]
fxch st(6)
fstp dword [esp + 0x18]
fld dword [ecx + eax*4 + 0x7c]
fxch st(4)
fsubp st(5)
fld dword [0x43a964]
fld dword [ecx + eax*4 + 0x74]
fxch st(6)
fstp dword [esp]
fxch st(2)
fsub st(4), st(0)
fld dword [0x43a960]
fxch st(5)
fstp dword [esp + 0x14]
faddp st(3)
fld dword [ecx + eax*4 + 0x30]
fxch st(3)
fstp dword [esp + 0x1c]
fld dword [ecx + eax*4 + 0x70]
fld dword [ecx + eax*4 + 0x74]
fxch st(2)
fadd st(4)
fstp dword [esp + 0x20]
fsubrp st(3)
fld dword [0x43a964]
fxch st(1)
fsub st(6)
fmul st(1), st(0)
fmul st(4)
fxch st(6)
faddp st(5)
fld dword [ecx + eax*4 + 0x6c]
fld dword [ecx + eax*4 + 0x2c]
fxch st(6)
fstp dword [esp + 0x24]
fld dword [0x43a960]
fmul st(4)
fxch st(3)
fmul st(4), st(0)
fxch st(2)
fsubp st(3)
fxch st(2)
fstp dword [esp + 0x28]
fld dword [ecx + eax*4 + 0x6c]
fxch st(6)
faddp st(3)
fld dword [ecx + eax*4 + 0x68]
fxch st(3)
fstp dword [esp + 0x2c]
fld dword [ecx + eax*4 + 0x68]
fxch st(5)
fsub st(6), st(0)
faddp st(2)
fld dword [ecx + eax*4 + 0x28]
fxch st(2)
fstp dword [esp + 0x34]
fxch st(1)
fsub st(4), st(0)
faddp st(2)
fxch st(1)
fstp dword [esp + 0x30]
fld st(2)
fxch st(3)
fadd st(4)
fxch st(4)
fsubp st(3)
fld dword [0x43a968]
fmul st(4), st(0)
fld dword [ecx + eax*4 + 0x20]
fxch st(1)
fmulp st(4)
fld dword [ecx + eax*4 + 0x64]
fxch st(5)
fstp dword [esp + 0x3c]
fld dword [ecx + eax*4 + 0x60]
fxch st(4)
fstp dword [esp + 0x38]
fld dword [ecx + eax*4 + 0x60]
fld dword [ecx + eax*4 + 0x64]
fxch st(1)
fsub st(2)
fxch st(5)
faddp st(2)
fld dword [ecx + eax*4 + 0x24]
fxch st(2)
fstp dword [esp + 0x40]
fld dword [0x43a964]
fmul st(5)
fxch st(4)
fmul st(5), st(0)
fld dword [0x43a960]
fxch st(2)
fsub st(3)
fmul st(2), st(0)
fmul st(4)
fxch st(3)
faddp st(7)
fld dword [ecx + eax*4 + 0x5c]
fxch st(7)
fstp dword [esp + 0x44]
fxch st(1)
fsubp st(4)
fld dword [ecx + eax*4 + 0x58]
fld dword [ecx + eax*4 + 0x1c]
fxch st(5)
fstp dword [esp + 0x48]
fxch st(2)
faddp st(5)
fld dword [ecx + eax*4 + 0x18]
fxch st(5)
fstp dword [esp + 0x4c]
fld dword [ecx + eax*4 + 0x58]
fld dword [ecx + eax*4 + 0x1c]
fxch st(5)
fadd st(7)
fstp dword [esp + 0x5c]
fsub st(5)
fld dword [ecx + eax*4 + 0x54]
fxch st(1)
fstp dword [esp + 0x50]
fxch st(6)
fsubp st(4)
fld dword [ecx + eax*4 + 0x50]
fxch st(4)
fstp dword [esp + 0x54]
fxch st(1)
faddp st(4)
fld dword [ecx + eax*4 + 0x10]
fld dword [ecx + eax*4 + 0x14]
fxch st(5)
fstp dword [esp + 0x58]
fld dword [ecx + eax*4 + 0x10]
fld dword [ecx + eax*4 + 0x14]
fxch st(2)
fadd st(5)
fstp dword [esp + 0x60]
fld dword [0x43a960]
fxch st(5)
fsubp st(1)
fxch st(1)
fsub st(6)
fmul st(4), st(0)
fmul st(3)
fxch st(6)
faddp st(5)
fld dword [ecx + eax*4 + 0x4c]
fxch st(5)
fstp dword [esp + 0x64]
fld dword [0x43a964]
fmul st(1)
fxch st(1)
fmul st(2)
fxch st(4)
faddp st(1)
fld dword [ecx + eax*4 + 0xc]
fxch st(1)
fstp dword [esp + 0x68]
fld dword [ecx + eax*4 + 0xc]
fxch st(4)
fsubp st(6)
fld dword [ecx + eax*4 + 8]
fxch st(6)
fstp dword [esp + 0x6c]
fld dword [ecx + eax*4 + 8]
fxch st(4)
fsub st(5)
fxch st(5)
faddp st(1)
fld dword [ecx + eax*4 + 0x48]
fld dword [ecx + eax*4 + 0x44]
fxch st(2)
fstp dword [esp + 0x74]
fsub st(4), st(0)
faddp st(6)
fld dword [ecx + eax*4 + 4]
fxch st(6)
fstp dword [esp + 0x70]
fld st(3)
fadd st(5)
fxch st(4)
fsubp st(5)
fld dword [0x43a968]
fmul st(4), st(0)
fld dword [ecx + eax*4]
fxch st(1)
fmulp st(6)
fxch st(4)
fstp dword [esp + 0x78]
fxch st(4)
fstp dword [esp + 0x7c]
fld dword [ecx + eax*4]
fld dword [ecx + eax*4 + 4]
fxch st(5)
fadd st(6), st(0)
fld dword [ecx + eax*4 + 0x40]
fxch st(7)
fstp dword [esp + 0x84]
fxch st(1)
fsub st(6)
fxch st(1)
fsubp st(5)
fxch st(3)
faddp st(5)
fld dword [esp + 0x78]
fxch st(5)
fstp dword [esp + 0x80]
fld dword [0x43a960]
fmul st(3)
fxch st(2)
fmul st(3), st(0)
fmul st(4)
fxch st(1)
fmulp st(4)
faddp st(1)
fxch st(1)
fsubp st(2)
fld st(0)
fld st(2)
fld dword [esp + 0x4c]
fsub st(1), st(0)
faddp st(4)
fld dword [esp + 0x48]
fxch st(4)
fstp dword [esp + 0x4c]
fxch st(1)
fsub st(3)
fxch st(2)
faddp st(3)
fld dword [esp + 0x7c]
fxch st(3)
fstp dword [esp + 0x48]
fld st(0)
fld dword [esp + 0x7c]
fxch st(2)
fsub st(3)
fxch st(3)
faddp st(1)
fld dword [0x43a968]
fmul st(3), st(0)
fld dword [esp + 0x3c]
fxch st(4)
fstp dword [esp + 0x8c]
fmul st(1), st(0)
fxch st(1)
fstp dword [esp + 0x88]
fxch st(1)
fsub st(2)
fxch st(3)
faddp st(2)
fld dword [esp + 0x38]
fld dword [esp + 0x6c]
fxch st(3)
fstp dword [esp + 0x3c]
fld dword [esp + 0x38]
fxch st(1)
fadd st(5)
fld dword [esp + 0x2c]
fxch st(1)
fstp dword [esp + 0x38]
fxch st(5)
fsubp st(1)
fld dword [esp + 0x68]
fxch st(1)
fstp dword [esp + 0x90]
fld dword [esp + 0x2c]
fxch st(3)
fadd st(5), st(0)
fld dword [esp + 0x28]
fxch st(6)
fstp dword [esp + 0x2c]
fld dword [esp + 0x28]
fxch st(1)
fsubp st(4)
fxch st(1)
fadd st(5), st(0)
fld dword [esp + 0x14]
fxch st(6)
fstp dword [esp + 0x28]
fld dword [esp + 0x14]
fxch st(1)
fsubp st(2)
fld st(1)
fxch st(2)
fadd st(4)
fmul st(3)
fstp dword [esp + 0x94]
fxch st(3)
fsubp st(1)
fmulp st(1)
fld dword [esp]
fld dword [esp]
fld dword [esp + 0x54]
fadd st(2), st(0)
fld dword [esp + 0x50]
fxch st(3)
fstp dword [esp]
fld st(3)
fxch st(1)
fsubp st(2)
fxch st(2)
fsub st(4), st(0)
faddp st(6)
fxch st(5)
fstp dword [esp + 0x14]
fld st(4)
fxch st(4)
fsub st(5), st(0)
faddp st(4)
fld dword [esp + 0x88]
fadd st(1), st(0)
fsubp st(2)
fld dword [esp + 0x94]
fxch st(2)
fstp dword [esp + 0x98]
fld st(3)
fld st(3)
fxch st(2)
fsub st(5), st(0)
fxch st(5)
fstp dword [ecx + eax*4 + 0x10]
faddp st(4)
fld dword [esp + 0x8c]
fld dword [esp + 0x90]
fxch st(5)
fstp dword [ecx + eax*4 + 0x18]
fld dword [esp + 0x94]
fxch st(2)
fsub st(5)
fxch st(1)
fadd st(3), st(0)
fsubp st(2)
fld st(2)
fld st(2)
fxch st(6)
faddp st(5)
fxch st(5)
fadd st(6)
fstp dword [ecx + eax*4]
fxch st(1)
fsubp st(5)
fld dword [esp + 0x98]
fld dword [esp + 0x4c]
fxch st(6)
fstp dword [ecx + eax*4 + 8]
fld st(1)
fxch st(1)
fsub st(2), st(0)
fxch st(2)
fstp dword [ecx + eax*4 + 4]
faddp st(1)
fld dword [esp + 0x48]
fxch st(1)
fstp dword [ecx + eax*4 + 0xc]
fxch st(2)
fadd st(3), st(0)
fxch st(3)
fstp dword [ecx + eax*4 + 0x1c]
fsubp st(2)
fld dword [esp]
fld dword [esp + 0x28]
fxch st(3)
fstp dword [ecx + eax*4 + 0x14]
fld dword [esp]
fld dword [esp + 0x38]
fsub st(2), st(0)
faddp st(1)
fld dword [esp + 0x28]
fld st(1)
fxch st(4)
fsub st(5), st(0)
fxch st(5)
fstp dword [esp + 0x28]
faddp st(4)
fxch st(2)
fadd st(3)
fld dword [esp + 0x3c]
fxch st(1)
fstp dword [ecx + eax*4 + 0x38]
fxch st(3)
fsubp st(2)
fld dword [esp + 0x2c]
fxch st(2)
fstp dword [ecx + eax*4 + 0x30]
fld dword [esp + 0x2c]
fxch st(2)
fadd st(4)
fxch st(4)
fsubp st(2)
fld st(1)
fadd st(1)
fld dword [esp + 0x14]
fxch st(1)
fstp dword [ecx + eax*4 + 0x20]
fld dword [esp + 0x14]
fxch st(3)
fsubp st(2)
fld dword [esp + 0x28]
fld dword [esp + 0x44]
fxch st(3)
fstp dword [ecx + eax*4 + 0x28]
fxch st(3)
fsub st(4)
fld st(0)
fxch st(5)
faddp st(2)
fsub st(3)
fstp dword [ecx + eax*4 + 0x24]
fld st(4)
fxch st(3)
faddp st(4)
fld dword [0x43a968]
fxch st(4)
fstp dword [ecx + eax*4 + 0x2c]
fadd st(2), st(0)
fld dword [esp + 0x84]
fxch st(3)
fstp dword [ecx + eax*4 + 0x3c]
fld dword [esp + 0x84]
fxch st(5)
fsubp st(1)
fld dword [esp + 0x80]
fxch st(1)
fstp dword [ecx + eax*4 + 0x34]
fld dword [esp + 0x80]
fxch st(2)
fsub st(5), st(0)
fld st(5)
fxch st(4)
faddp st(1)
fld dword [esp + 0x40]
fld dword [esp + 0x30]
fxch st(2)
fstp dword [esp + 0x44]
fsub st(3), st(0)
faddp st(2)
fld dword [esp + 0x74]
fxch st(2)
fstp dword [esp + 0x40]
fld dword [esp + 0x30]
fxch st(3)
fadd st(4), st(0)
fxch st(4)
fmul st(5)
fld dword [esp + 0x70]
fxch st(1)
fstp dword [esp + 0x9c]
fld dword [esp + 0x74]
fxch st(5)
fsubp st(7)
fxch st(5)
fmul st(6), st(0)
fxch st(6)
fstp dword [esp + 0xa0]
fxch st(2)
fsub st(4)
fld dword [esp + 0x34]
fxch st(1)
fstp dword [esp + 0xa4]
fsub st(3), st(0)
fxch st(4)
faddp st(2)
fld dword [esp + 0x20]
fld dword [esp + 0x60]
fxch st(3)
fstp dword [esp + 0x30]
fxch st(1)
faddp st(4)
fld dword [esp + 0x24]
fxch st(4)
fstp dword [esp + 0x34]
fld dword [esp + 0x20]
fld dword [esp + 0x24]
fxch st(1)
fsub st(3)
fxch st(2)
faddp st(3)
fld dword [esp + 0x64]
fxch st(3)
fstp dword [esp + 0x60]
fld st(1)
fxch st(1)
fsub st(3)
fxch st(5)
faddp st(3)
fxch st(2)
fstp dword [esp + 0x64]
fxch st(1)
fsub st(3)
fmul st(4)
fxch st(3)
faddp st(1)
fmulp st(3)
fld dword [esp + 0x18]
fld dword [esp + 0x58]
fld dword [esp + 0x1c]
fxch st(5)
fstp dword [esp + 0xa8]
fld dword [esp + 0x18]
fld dword [esp + 0x1c]
fxch st(1)
fsub st(2)
fxch st(3)
faddp st(2)
fld dword [esp + 0x5c]
fxch st(2)
fstp dword [esp + 0x58]
fld st(3)
fld st(5)
fxch st(2)
fsub st(3)
fxch st(7)
faddp st(3)
fxch st(2)
fstp dword [esp + 0x5c]
fld st(5)
fxch st(2)
fadd st(3)
fxch st(4)
fsubp st(3)
fld dword [esp + 0x9c]
fadd st(1), st(0)
fsubp st(5)
fld dword [esp + 0xa8]
fxch st(5)
fstp dword [esp + 0xac]
fld st(3)
fxch st(1)
fsub st(4), st(0)
fxch st(4)
fstp dword [ecx + eax*4 + 0x50]
faddp st(3)
fld dword [esp + 0xa0]
fld dword [esp + 0xa4]
fxch st(4)
fstp dword [ecx + eax*4 + 0x58]
fld dword [esp + 0xa8]
fxch st(2)
fsub st(4)
fxch st(6)
faddp st(4)
fsub st(1), st(0)
fld st(1)
fxch st(5)
faddp st(1)
fxch st(2)
fadd st(4), st(0)
fld dword [esp + 0xac]
fxch st(5)
fstp dword [ecx + eax*4 + 0x40]
fsubrp st(1)
fld dword [esp + 0x60]
fxch st(1)
fstp dword [ecx + eax*4 + 0x48]
fld st(4)
fld dword [esp + 0x60]
fxch st(5)
fsub st(6), st(0)
fxch st(6)
fstp dword [ecx + eax*4 + 0x44]
fld st(2)
fxch st(6)
faddp st(1)
fld dword [esp + 0x58]
fxch st(1)
fstp dword [ecx + eax*4 + 0x4c]
fxch st(3)
fadd st(5), st(0)
fld dword [esp + 0x40]
fxch st(6)
fstp dword [ecx + eax*4 + 0x5c]
fsubrp st(2)
fld dword [esp + 0x44]
fxch st(2)
fstp dword [ecx + eax*4 + 0x54]
fld dword [esp + 0x58]
fxch st(4)
fadd st(5)
fxch st(5)
fsubp st(1)
fld dword [esp + 0x30]
fld dword [esp + 0x5c]
fxch st(2)
fstp dword [esp + 0x60]
fld dword [esp + 0x5c]
fxch st(1)
fadd st(5), st(0)
fld st(5)
fxch st(1)
fsubp st(5)
fxch st(5)
fsub st(6)
fld dword [esp + 0x64]
fxch st(1)
fstp dword [ecx + eax*4 + 0x70]
fxch st(6)
faddp st(5)
fld dword [esp + 0x34]
fxch st(5)
fstp dword [ecx + eax*4 + 0x78]
fld dword [esp + 0x64]
fxch st(1)
fsub st(5)
fxch st(3)
fadd st(6), st(0)
fsubp st(1)
fld st(0)
fxch st(5)
faddp st(2)
fxch st(3)
fadd st(4), st(0)
fxch st(4)
fstp dword [ecx + eax*4 + 0x60]
fxch st(2)
fsubp st(3)
fld dword [esp + 0x60]
fxch st(3)
fstp dword [ecx + eax*4 + 0x68]
fld st(0)
fld st(4)
fxch st(2)
fsub st(4)
fstp dword [ecx + eax*4 + 0x64]
faddp st(3)
fxch st(2)
fstp dword [ecx + eax*4 + 0x6c]
fadd st(1), st(0)
fxch st(1)
fstp dword [ecx + eax*4 + 0x7c]
fsubrp st(1)
add eax, 0x20
cmp eax, ebx
jl 0x40cccb
fstp dword [ecx + eax*4 - 0xc]
fld dword [0x43a96c]
fstp st(0)
mov eax, dword [ebp]
mov ecx, dword [ebp + 0xc]
mov edi, dword [ebp + 8]
mov esi, eax
mov dword [esp], ecx
mov ecx, dword [esp + 0xd0]
mov dword [esp + 0xc], edx
mov dword [esp + 0x10], ebx
shr esi, 1
lea esi, [ecx + esi*4]
mov ebx, dword [esp]
mov edx, esi
lea eax, [edi + eax*4]
fld dword [eax + 4]
fld dword [eax + 4]
mov ebp, dword [ebx]
mov edi, dword [ebx + 4]
add edx, 0xfffffff0
fld dword [esi + ebp*4 + 4]
fld dword [esi + ebp*4 + 4]
fld dword [esi + edi*4 + 4]
fadd st(2), st(0)
fsubp st(1)
fmul st(2), st(0)
fld dword [esi + ebp*4]
fld dword [esi + edi*4]
fxch st(1)
fst dword [esp]
fxch st(1)
fst dword [esp + 0x14]
faddp st(1)
fld dword [eax]
fld dword [eax]
fxch st(3)
fmulp st(1)
fxch st(1)
fmul st(2), st(0)
fmulp st(5)
fxch st(1)
faddp st(3)
fld st(2)
fxch st(1)
fsubp st(4)
fld dword [0x43a96c]
fmul st(2), st(0)
fxch st(1)
fadd st(2)
fld dword [esp]
fsub dword [esp + 0x14]
fmulp st(2)
fstp dword [ecx]
fxch st(2)
fsubp st(1)
fstp dword [edx + 8]
fld st(1)
fxch st(1)
fsub st(2), st(0)
faddp st(1)
fstp dword [ecx + 4]
fstp dword [edx + 0xc]
fld dword [eax + 0xc]
fld dword [eax + 8]
fld dword [eax + 8]
mov ebp, dword [ebx + 8]
fld dword [esi + ebp*4 + 4]
fld dword [esi + ebp*4 + 4]
fld dword [esi + ebp*4]
mov edi, dword [ebx + 0xc]
fld dword [esi + edi*4 + 4]
fld dword [esi + edi*4]
fxch st(2)
fst dword [esp + 0x18]
fxch st(2)
fst dword [esp + 0x1c]
fxch st(1)
fsub st(3), st(0)
faddp st(4)
faddp st(1)
fmul st(3), st(0)
fmul st(5)
fxch st(1)
fmul st(5), st(0)
fmulp st(4)
fxch st(2)
faddp st(4)
fxch st(2)
fsubp st(1)
fld st(2)
fld dword [0x43a96c]
fmul st(3), st(0)
fxch st(1)
fadd st(3)
fld dword [esp + 0x18]
fsub dword [esp + 0x1c]
fmulp st(2)
fstp dword [ecx + 8]
fxch st(3)
fsubp st(2)
fxch st(1)
fstp dword [edx]
fld st(0)
fxch st(1)
fsub st(2)
fxch st(2)
faddp st(1)
fstp dword [ecx + 0xc]
fstp dword [edx + 4]
add eax, 0x10
add ebx, 0x10
add ecx, 0x10
cmp ecx, edx
jb 0x40d43f
mov edx, dword [esp + 0xc]
mov ebx, dword [esp + 0x10]
mov ebp, dword [esp + 0xc8]
mov ecx, dword [esp + 8]
mov ebp, dword [ebp + 8]
mov eax, ecx
mov esi, dword [esp + 0xd0]
lea ebx, [ebp + ebx*4]
mov ebp, dword [esp + 4]
jmp 0x40d56d
fstp dword [ecx - 4]
fld dword [esi]
fmul dword [ebx + 4]
add ebp, 0xfffffff0
fld dword [esi + 4]
fmul dword [ebx]
fsubp st(1)
fstp dword [ebp + 0xc]
fld dword [esi]
fmul dword [ebx]
fld dword [esi + 4]
fmul dword [ebx + 4]
faddp st(1)
fchs
fstp dword [ecx]
fld dword [esi + 8]
fmul dword [ebx + 0xc]
fld dword [esi + 0xc]
fmul dword [ebx + 8]
fsubp st(1)
fstp dword [ebp + 8]
fld dword [esi + 8]
fmul dword [ebx + 8]
fld dword [esi + 0xc]
fmul dword [ebx + 0xc]
faddp st(1)
fchs
fstp dword [ecx + 4]
fld dword [esi + 0x10]
fmul dword [ebx + 0x14]
fld dword [esi + 0x14]
fmul dword [ebx + 0x10]
fsubp st(1)
fstp dword [ebp + 4]
fld dword [esi + 0x10]
fmul dword [ebx + 0x10]
fld dword [esi + 0x14]
fmul dword [ebx + 0x14]
faddp st(1)
fchs
fstp dword [ecx + 8]
fld dword [esi + 0x18]
fmul dword [ebx + 0x1c]
fld dword [esi + 0x1c]
fmul dword [ebx + 0x18]
fsubp st(1)
fstp dword [ebp]
fld dword [esi + 0x18]
fmul dword [ebx + 0x18]
fld dword [esi + 0x1c]
fmul dword [ebx + 0x1c]
faddp st(1)
add esi, 0x20
add ebx, 0x20
fchs
add ecx, 0x10
cmp esi, ebp
jb 0x40d56a
fstp dword [ecx - 4]
add edx, dword [esp + 0xd0]
mov ecx, eax
mov ebx, edx
jmp 0x40d61c
fstp dword [ebx - 4]
add edx, 0xfffffff0
add ecx, 0xfffffff0
fld dword [ecx + 0xc]
mov ebp, dword [ecx + 0xc]
mov dword [edx + 0xc], ebp
fchs
fstp dword [ebx]
fld dword [ecx + 8]
mov esi, dword [ecx + 8]
mov dword [edx + 8], esi
fchs
fstp dword [ebx + 4]
mov edi, dword [ecx + 4]
fld dword [ecx + 4]
mov dword [edx + 4], edi
fchs
fstp dword [ebx + 8]
fld dword [ecx]
mov ebp, dword [ecx]
mov dword [edx], ebp
fchs
add ebx, 0x10
cmp ebx, ecx
jb 0x40d619
fstp dword [ebx - 4]
mov esi, dword [esp + 8]
mov edi, dword [esp + 0xb0]
mov edx, dword [esi + 0xc]
add eax, 0xfffffff0
mov dword [eax], edx
mov ecx, dword [esi + 8]
mov dword [eax + 4], ecx
mov ebx, dword [esi + 4]
mov dword [eax + 8], ebx
mov ebp, dword [esi]
mov dword [eax + 0xc], ebp
add esi, 0x10
cmp eax, edi
ja 0x40d668
add esp, 0xb4
pop ebx
pop ebp
pop esi
pop edi
ret