Function at 0x414470
Capabilities:
Resolve function by parsing pe exports

Disassembly:
push ebx
push esi
push edi
push ebp
sub esp, 0x118
mov edi, dword [esp + 0x138]
fldz
fld dword [edi]
mov ebp, dword [esp + 0x13c]
mov ebx, dword [esp + 0x12c]
mov edx, dword [esp + 0x130]
fstp dword [esp + 0xac]
fld dword [edi + 4]
fstp dword [esp + 0xb0]
fld dword [edi + 8]
fstp dword [esp + 0xb4]
fld dword [ebx + 4]
fmul dword [esp + 0xb0]
fld dword [ebx]
fmul dword [esp + 0xac]
faddp st(1)
fld dword [ebx + 8]
fmul dword [esp + 0xb4]
faddp st(1)
fsub dword [edi + 0xc]
fstp dword [esp + 0x50]
fld dword [esp + 0x50]
fabs
fstp dword [esp + 0xa0]
fld dword [esp + 0xa0]
fst st(1)
fcomp dword [ebx + 0xc]
fnstsw ax
test ah, 0x45
je 0x414521
fld dword [esp + 0x50]
mov eax, dword [esp + 0x140]
fmul st(0)
fstp dword [esp + 0x90]
fld dword [esp + 0x90]
fcomp dword [eax]
fnstsw ax
test ah, 0x45
jne 0x414530
xor al, al
add esp, 0x118
fstp st(0)
pop ebp
pop edi
pop esi
pop ebx
ret
mov eax, dword [esp + 0x134]
lea edi, [esp + 0xb8]
movzx eax, word [eax]
lea eax, [eax*4]
lea eax, [eax + eax*2]
add eax, edx
fld dword [eax]
fstp dword [esp + 0x58]
fld dword [eax + 4]
fstp dword [esp + 0x5c]
fld dword [eax + 8]
mov eax, dword [esp + 0x134]
fstp dword [esp + 0x60]
movzx eax, word [eax + 2]
lea eax, [eax*4]
lea eax, [eax + eax*2]
add eax, edx
fld dword [eax]
fstp dword [esp + 0x64]
fld dword [eax + 4]
fstp dword [esp + 0x68]
fld dword [eax + 8]
mov eax, dword [esp + 0x134]
fstp dword [esp + 0x6c]
movzx eax, word [eax + 4]
lea eax, [eax*4]
lea eax, [eax + eax*2]
add eax, edx
fld dword [eax]
fstp dword [esp + 0x70]
fld dword [eax + 4]
fstp dword [esp + 0x74]
fld dword [eax + 8]
fstp dword [esp + 0x78]
fld dword [esp + 0x64]
fsub dword [esp + 0x58]
fstp dword [esp + 0x9c]
fld dword [esp + 0x68]
fsub dword [esp + 0x5c]
mov eax, dword [esp + 0x9c]
mov dword [esp + 0xe8], eax
lea esi, [esp + 0xe8]
fstp dword [esp + 0x98]
fld dword [esp + 0x6c]
fsub dword [esp + 0x60]
mov eax, dword [esp + 0x98]
mov dword [esp + 0xec], eax
fstp dword [esp + 0x94]
mov eax, dword [esp + 0x94]
mov dword [esp + 0xf0], eax
movsd dword es:[edi], dword [esi]
movsd dword es:[edi], dword [esi]
movsd dword es:[edi], dword [esi]
fld dword [esp + 0xbc]
fst st(1)
fmul st(0)
fld dword [esp + 0xb8]
fmul st(0)
faddp st(1)
fld dword [esp + 0xc0]
fstp st(2)
fld st(1)
fmul st(0)
faddp st(1)
fst st(1)
fsqrt
fstp dword [esp + 0xa0]
mov eax, dword [esp + 0xa0]
fld dword [0x686d38]
mov dword [esp + 0x7c], eax
lea eax, [esp + 0xac]
fdiv dword [esp + 0x7c]
push eax
lea eax, [esp + 0xf8]
fstp st(1)
fld dword [esp + 0xbc]
fmul st(1)
fstp dword [esp + 0xbc]
fld dword [esp + 0xc0]
fmul st(1)
fstp dword [esp + 0xc0]
fld dword [esp + 0xc4]
lea esi, [esp + 0xbc]
fmul st(1)
push esi
push eax
fstp dword [esp + 0xcc]
fstp st(0)
call fcn.004e00b0
lea esi, [esp + 0x100]
lea edi, [esp + 0xd0]
movsd dword es:[edi], dword [esi]
fldz
fldz
fldz
fldz
xor dl, dl
add esp, 0xc
movsd dword es:[edi], dword [esi]
movsd dword es:[edi], dword [esi]
fld dword [esp + 0x70]
fsub dword [esp + 0x58]
lea edi, [esp + 0xd0]
fstp dword [esp + 0x4c]
fld dword [esp + 0x74]
fsub dword [esp + 0x5c]
mov eax, dword [esp + 0x4c]
mov dword [esp + 0x100], eax
lea esi, [esp + 0x100]
fstp dword [esp + 0x48]
fld dword [esp + 0x78]
fsub dword [esp + 0x60]
mov eax, dword [esp + 0x48]
mov dword [esp + 0x104], eax
fstp dword [esp + 0x44]
mov eax, dword [esp + 0x44]
mov dword [esp + 0x108], eax
movsd dword es:[edi], dword [esi]
movsd dword es:[edi], dword [esi]
movsd dword es:[edi], dword [esi]
fld dword [esp + 0xd4]
fstp st(2)
fld dword [esp + 0xbc]
fstp st(4)
mov eax, dword [esp + 0xc8]
fld st(3)
fmul st(2)
fld dword [esp + 0xb8]
fmul dword [esp + 0xd0]
mov dword [esp + 0x34], eax
mov eax, dword [esp + 0xcc]
xor cl, cl
xor edi, edi
faddp st(1)
fld dword [esp + 0xd8]
fstp st(2)
fld dword [esp + 0xc0]
fstp st(4)
fld st(3)
fmul st(2)
faddp st(1)
fstp dword [esp + 0x30]
fld dword [esp + 0x34]
fmul st(2)
fld dword [esp + 0xc4]
fmul dword [esp + 0xd0]
mov dword [esp + 0x1c], eax
faddp st(1)
fld dword [esp + 0x1c]
fmul st(2)
faddp st(1)
fstp dword [esp + 0x20]
fld dword [ebx + 8]
fstp dword [esp + 0x24]
fld dword [esp + 0x24]
fsub dword [esp + 0x60]
fstp dword [esp + 0x38]
mov eax, dword [esp + 0x38]
mov dword [esp + 0x14], eax
mov eax, dword [esp + 0x14]
fld dword [ebx + 4]
fstp dword [esp + 0x28]
fld dword [esp + 0x28]
fsub dword [esp + 0x5c]
fstp dword [esp + 0x3c]
fld dword [esp + 0x3c]
fstp st(1)
fld dword [ebx]
fstp dword [esp + 0x2c]
fld dword [esp + 0x2c]
fsub dword [esp + 0x58]
mov dword [esp + 0xd8], eax
fstp dword [esp + 0x40]
fld dword [esp + 0x40]
fstp st(2)
fld st(1)
fstp dword [esp + 0xd0]
fst dword [esp + 0xd4]
fld dword [esp + 0xd4]
fstp st(2)
fld st(3)
fmul st(2)
fld dword [esp + 0xb8]
fmul dword [esp + 0xd0]
faddp st(1)
fld dword [esp + 0xd8]
fstp st(2)
fld st(3)
fmul st(2)
faddp st(1)
fstp st(4)
fld dword [esp + 0x34]
fmul st(2)
fld dword [esp + 0xc4]
fmul dword [esp + 0xd0]
faddp st(1)
fld dword [esp + 0x1c]
fmul st(2)
faddp st(1)
fstp st(3)
fld dword [0x686d34]
fmul st(4)
fld dword [esp + 0x7c]
fmul st(4)
fsubrp st(1)
fcomp dword [0x686d34]
fnstsw ax
test ah, 5
jne 0x414875
inc edi
mov cl, 1
fld dword [esp + 0x30]
fmul st(3)
fld dword [esp + 0x20]
fmul st(5)
fsubrp st(1)
fcomp dword [0x686d34]
fnstsw ax
test ah, 5
jne 0x414893
inc edi
mov dl, 1
fld st(3)
fsub dword [esp + 0x7c]
fstp dword [esp + 0xc]
fld dword [esp + 0x20]
fsub dword [0x686d34]
fmul dword [esp + 0xc]
fld st(3)
fsub dword [0x686d34]
fld dword [esp + 0x30]
fsub dword [esp + 0x7c]
fstp st(4)
fmul st(3)
fsubrp st(1)
fcomp dword [0x686d34]
fnstsw ax
test ah, 5
jne 0x4148cf
inc edi
cmp edi, 3
mov eax, edi
ja case.default.0x4148da
jmp dword [edi*4 + 0x686d98]
fld dword [esp + 0x50]
fabs
fstp dword [esp + 0xa0]
fld dword [esp + 0xa0]
fstp st(4)
fld st(3)
fstp dword [esp + 0x54]
fld dword [esp + 0x50]
fmul dword [esp + 0xac]
fsubr dword [ebx]
fstp dword [esp + 0x84]
fld dword [esp + 0x50]
fmul dword [esp + 0xb0]
fsubr dword [ebx + 4]
fstp dword [esp + 0x88]
fld dword [esp + 0x50]
fmul dword [esp + 0xb4]
fsubr dword [ebx + 8]
fstp dword [esp + 0x8c]
jmp case.default.0x4148da
test cl, cl
jne 0x414af1
fld dword [esp + 0x7c]
fmul st(0)
fadd dword [0x686d34]
fstp st(2)
fld st(2)
fmul dword [0x686d34]
fld st(4)
fmul dword [esp + 0x7c]
faddp st(1)
fdiv st(2)
fst st(1)
fcomp dword [0x686d34]
fnstsw ax
test ah, 4
jne 0x4149e0
and ah, 0x45
test ah, 0x41
je 0x4149e0
fld dword [esp + 0x3c]
fstp st(4)
fld st(3)
fmul st(0)
fld dword [esp + 0x40]
fmul st(0)
faddp st(1)
fld dword [esp + 0x38]
fstp st(5)
fld st(4)
fmul st(0)
faddp st(1)
fstp st(4)
fld st(3)
fsqrt
fstp dword [esp + 0xa0]
fld dword [esp + 0xa0]
fstp st(4)
mov eax, dword [esp + 0x58]
mov esi, dword [esp + 0x5c]
fld st(3)
mov dword [esp + 0x84], eax
mov eax, dword [esp + 0x60]
fstp dword [esp + 0x54]
mov dword [esp + 0x8c], eax
mov dword [esp + 0x88], esi
jmp case.default.0x4148da
fcom dword [0x686d38]
fnstsw ax
test ah, 5
jne 0x414a65
fld dword [esp + 0x24]
fsub dword [esp + 0x6c]
fstp st(2)
fld dword [esp + 0x28]
fsub dword [esp + 0x68]
fstp st(3)
fld dword [esp + 0x2c]
fsub dword [esp + 0x64]
fstp st(4)
fld st(2)
fstp st(3)
fld st(2)
fmul st(0)
fld st(4)
fmul st(0)
faddp st(1)
fld st(2)
fstp st(5)
fld st(4)
fmul st(0)
faddp st(1)
fstp st(4)
fld st(3)
fsqrt
fstp dword [esp + 0xa0]
fld dword [esp + 0xa0]
fstp st(4)
mov eax, dword [esp + 0x64]
mov edx, dword [esp + 0x68]
fld st(3)
mov dword [esp + 0x84], eax
mov eax, dword [esp + 0x6c]
fstp dword [esp + 0x54]
mov dword [esp + 0x8c], eax
mov dword [esp + 0x88], edx
jmp case.default.0x4148da
fld st(1)
fsqrt
fstp dword [esp + 0xa0]
fld dword [esp + 0xa0]
fstp st(2)
fld st(3)
fmul dword [0x686d34]
fld st(3)
fmul dword [esp + 0x7c]
fsubrp st(1)
fdiv st(2)
fstp st(4)
fld st(3)
fmul st(0)
fadd dword [esp + 0x90]
fsqrt
fstp dword [esp + 0xa0]
fld dword [esp + 0xa0]
fstp st(4)
fld st(3)
fstp dword [esp + 0x54]
fld st(0)
fmul dword [esp + 0x9c]
fadd dword [esp + 0x58]
fstp dword [esp + 0x84]
fld st(0)
fmul dword [esp + 0x98]
fadd dword [esp + 0x5c]
fstp dword [esp + 0x88]
fld st(0)
fmul dword [esp + 0x94]
fadd dword [esp + 0x60]
fstp dword [esp + 0x8c]
jmp case.default.0x4148da
test dl, dl
jne 0x414c96
fld dword [esp + 0x20]
fmul st(0)
fld dword [esp + 0x30]
fmul st(0)
faddp st(1)
fstp st(2)
fld st(2)
fmul dword [esp + 0x20]
fld st(4)
fmul dword [esp + 0x30]
faddp st(1)
fdiv st(2)
fst st(1)
fcomp dword [0x686d34]
fnstsw ax
test ah, 4
jne 0x414b90
and ah, 0x45
test ah, 0x41
je 0x414b90
fld dword [esp + 0x3c]
fstp st(4)
fld st(3)
fmul st(0)
fld dword [esp + 0x40]
fmul st(0)
faddp st(1)
fld dword [esp + 0x38]
fstp st(5)
fld st(4)
fmul st(0)
faddp st(1)
fstp st(4)
fld st(3)
fsqrt
fstp dword [esp + 0xa0]
fld dword [esp + 0xa0]
fstp st(4)
mov eax, dword [esp + 0x58]
mov ecx, dword [esp + 0x5c]
fld st(3)
mov dword [esp + 0x84], eax
mov eax, dword [esp + 0x60]
fstp dword [esp + 0x54]
mov dword [esp + 0x8c], eax
mov dword [esp + 0x88], ecx
jmp case.default.0x4148da
fcom dword [0x686d38]
fnstsw ax
test ah, 5
jne 0x414c15
fld dword [esp + 0x24]
fsub dword [esp + 0x78]
fstp st(2)
fld dword [esp + 0x28]
fsub dword [esp + 0x74]
fstp st(3)
fld dword [esp + 0x2c]
fsub dword [esp + 0x70]
fstp st(4)
fld st(2)
fstp st(3)
fld st(2)
fmul st(0)
fld st(4)
fmul st(0)
faddp st(1)
fld st(2)
fstp st(5)
fld st(4)
fmul st(0)
faddp st(1)
fstp st(4)
fld st(3)
fsqrt
fstp dword [esp + 0xa0]
fld dword [esp + 0xa0]
fstp st(4)
mov eax, dword [esp + 0x70]
mov edi, dword [esp + 0x74]
fld st(3)
mov dword [esp + 0x84], eax
mov eax, dword [esp + 0x78]
fstp dword [esp + 0x54]
mov dword [esp + 0x8c], eax
mov dword [esp + 0x88], edi
jmp case.default.0x4148da
fld st(1)
fsqrt
fstp dword [esp + 0xa0]
fld dword [esp + 0xa0]
fstp st(2)
fld st(3)
fmul dword [esp + 0x20]
fld st(3)
fmul dword [esp + 0x30]
fsubrp st(1)
fdiv st(2)
fstp st(4)
fld st(3)
fmul st(0)
fadd dword [esp + 0x90]
fsqrt
fstp dword [esp + 0xa0]
fld dword [esp + 0xa0]
fstp st(4)
fld st(3)
fstp dword [esp + 0x54]
fld st(0)
fmul dword [esp + 0x4c]
fadd dword [esp + 0x58]
fstp dword [esp + 0x84]
fld st(0)
fmul dword [esp + 0x48]
fadd dword [esp + 0x5c]
fstp dword [esp + 0x88]
fld st(0)
fmul dword [esp + 0x44]
fadd dword [esp + 0x60]
fstp dword [esp + 0x8c]
jmp case.default.0x4148da
fld dword [esp + 0x20]
fsub dword [0x686d34]
fstp st(4)
fld st(3)
fmul st(0)
fld st(2)
fmul st(0)
faddp st(1)
fstp dword [esp + 0x10]
fld st(2)
fsub dword [0x686d34]
fmul st(4)
fld st(2)
fmul dword [esp + 0xc]
faddp st(1)
fdiv dword [esp + 0x10]
fst st(1)
fcomp dword [0x686d34]
fnstsw ax
test ah, 4
jne 0x414d60
and ah, 0x45
test ah, 0x41
je 0x414d60
fld dword [esp + 0x24]
fsub dword [esp + 0x6c]
fstp st(2)
fld dword [esp + 0x28]
fsub dword [esp + 0x68]
fstp st(3)
fld dword [esp + 0x2c]
fsub dword [esp + 0x64]
fstp st(4)
fld st(2)
fstp st(3)
fld st(2)
fmul st(0)
fld st(4)
fmul st(0)
faddp st(1)
fld st(2)
fstp st(5)
fld st(4)
fmul st(0)
faddp st(1)
fstp st(4)
fld st(3)
fsqrt
fstp dword [esp + 0xa0]
fld dword [esp + 0xa0]
fstp st(4)
mov eax, dword [esp + 0x64]
mov esi, dword [esp + 0x68]
fld st(3)
mov dword [esp + 0x84], eax
mov eax, dword [esp + 0x6c]
fstp dword [esp + 0x54]
mov dword [esp + 0x8c], eax
mov dword [esp + 0x88], esi
jmp case.default.0x4148da
fcom dword [0x686d38]
fnstsw ax
test ah, 5
jne 0x414de5
fld dword [esp + 0x24]
fsub dword [esp + 0x78]
fstp st(2)
fld dword [esp + 0x28]
fsub dword [esp + 0x74]
fstp st(3)
fld dword [esp + 0x2c]
fsub dword [esp + 0x70]
fstp st(4)
fld st(2)
fstp st(3)
fld st(2)
fmul st(0)
fld st(4)
fmul st(0)
faddp st(1)
fld st(2)
fstp st(5)
fld st(4)
fmul st(0)
faddp st(1)
fstp st(4)
fld st(3)
fsqrt
fstp dword [esp + 0xa0]
fld dword [esp + 0xa0]
fstp st(4)
mov eax, dword [esp + 0x70]
mov edx, dword [esp + 0x74]
fld st(3)
mov dword [esp + 0x84], eax
mov eax, dword [esp + 0x78]
fstp dword [esp + 0x54]
mov dword [esp + 0x8c], eax
mov dword [esp + 0x88], edx
jmp case.default.0x4148da
fld dword [esp + 0x10]
fsqrt
fstp dword [esp + 0xa0]
mov eax, dword [esp + 0xa0]
fld st(3)
fmul dword [esp + 0xc]
fld st(3)
fsub dword [0x686d34]
mov dword [esp + 0x18], eax
fmul st(3)
fsubrp st(1)
fdiv dword [esp + 0x18]
fstp st(4)
fld st(3)
fmul st(0)
fadd dword [esp + 0x90]
fsqrt
fstp dword [esp + 0xa0]
fld dword [esp + 0xa0]
fstp st(4)
fld st(3)
fstp dword [esp + 0x54]
fld dword [esp + 0x70]
fsub dword [esp + 0x64]
fmul st(1)
fadd dword [esp + 0x64]
fstp dword [esp + 0x84]
fld dword [esp + 0x74]
fsub dword [esp + 0x68]
fmul st(1)
fadd dword [esp + 0x68]
fstp dword [esp + 0x88]
fld dword [esp + 0x78]
fsub dword [esp + 0x6c]
fmul st(1)
fadd dword [esp + 0x6c]
fstp dword [esp + 0x8c]
jmp case.default.0x4148da
test cl, cl
je 0x414ef8
fld dword [esp + 0x24]
fsub dword [esp + 0x78]
fstp st(2)
fld dword [esp + 0x28]
fsub dword [esp + 0x74]
fstp st(3)
fld dword [esp + 0x2c]
fsub dword [esp + 0x70]
fstp st(4)
fld st(2)
fstp st(3)
fld st(2)
fmul st(0)
fld st(4)
fmul st(0)
faddp st(1)
fld st(2)
fstp st(5)
fld st(4)
fmul st(0)
faddp st(1)
fstp st(4)
fld st(3)
fsqrt
fstp dword [esp + 0xa0]
fld dword [esp + 0xa0]
fstp st(4)
mov eax, dword [esp + 0x70]
mov ecx, dword [esp + 0x74]
fld st(3)
mov dword [esp + 0x84], eax
mov eax, dword [esp + 0x78]
fstp dword [esp + 0x54]
mov dword [esp + 0x8c], eax
mov dword [esp + 0x88], ecx
jmp case.default.0x4148da
test dl, dl
je 0x414f71
fld dword [esp + 0x24]
fsub dword [esp + 0x6c]
fstp st(2)
fld dword [esp + 0x28]
fsub dword [esp + 0x68]
fstp st(3)
fld dword [esp + 0x2c]
fsub dword [esp + 0x64]
fstp st(4)
fld st(2)
fstp st(3)
fld st(2)
fmul st(0)
fld st(4)
fmul st(0)
faddp st(1)
fld st(2)
fstp st(5)
fld st(4)
fmul st(0)
faddp st(1)
fstp st(4)
fld st(3)
fsqrt
fstp dword [esp + 0xa0]
fld dword [esp + 0xa0]
fstp st(4)
mov eax, dword [esp + 0x64]
mov edi, dword [esp + 0x68]
fld st(3)
mov dword [esp + 0x84], eax
mov eax, dword [esp + 0x6c]
fstp dword [esp + 0x54]
mov dword [esp + 0x8c], eax
mov dword [esp + 0x88], edi
jmp case.default.0x4148da
fld dword [esp + 0x3c]
fstp st(4)
fld st(3)
fmul st(0)
fld dword [esp + 0x40]
fmul st(0)
faddp st(1)
fld dword [esp + 0x38]
fstp st(5)
fld st(4)
fmul st(0)
faddp st(1)
fstp st(4)
fld st(3)
fsqrt
fstp dword [esp + 0xa0]
fld dword [esp + 0xa0]
fstp st(4)
mov eax, dword [esp + 0x58]
mov esi, dword [esp + 0x5c]
fld st(3)
mov dword [esp + 0x84], eax
mov eax, dword [esp + 0x60]
fstp dword [esp + 0x54]
mov dword [esp + 0x8c], eax
mov dword [esp + 0x88], esi
jmp case.default.0x4148da
fcompp
fcompp
xor al, al
add esp, 0x118
pop ebp
pop edi
pop esi
pop ebx
ret
fld dword [esp + 0x54]
fmul st(0)
fstp dword [esp + 0x80]
fld dword [esp + 0x54]
fcomp dword [ebx + 0xc]
fnstsw ax
and ah, 5
cmp ah, 1
jne 0x4150f3
mov eax, dword [esp + 0x140]
fld dword [esp + 0x80]
fcomp dword [eax]
fnstsw ax
and ah, 5
cmp ah, 1
jne 0x4150f3
fld dword [ebx]
fsub dword [esp + 0x84]
lea edi, [esp + 0xdc]
fstp dword [esp + 0x10c]
fld dword [ebx + 4]
fsub dword [esp + 0x88]
lea esi, [esp + 0x10c]
fstp dword [esp + 0x110]
fld dword [ebx + 8]
fsub dword [esp + 0x8c]
fstp dword [esp + 0x114]
movsd dword es:[edi], dword [esi]
fcompp
fcompp
movsd dword es:[edi], dword [esi]
movsd dword es:[edi], dword [esi]
lea ecx, [esp + 0xdc]
call fcn.004dfea0
fld dword [esp + 0x84]
fstp dword [ebp]
fld dword [esp + 0x88]
fstp dword [ebp + 4]
fld dword [esp + 0x8c]
fstp dword [ebp + 8]
fld dword [esp + 0xdc]
fstp dword [ebp + 0x10]
fld dword [esp + 0xe0]
fstp dword [ebp + 0x14]
fld dword [esp + 0xe4]
fstp dword [ebp + 0x18]
mov dl, byte [ebx + 0x10]
mov byte [ebp + 0x20], dl
mov al, byte [ebx + 0x11]
mov byte [ebp + 0x21], al
mov eax, dword [esp + 0x134]
mov al, byte [eax + 6]
mov byte [ebp + 0x22], al
mov byte [ebp + 0x23], 0
fld dword [ebx + 0xc]
fsub dword [esp + 0x54]
fstp dword [ebp + 0x24]
mov eax, dword [esp + 0x140]
fld dword [esp + 0x80]
fstp dword [eax]
add esp, 0x118
mov al, 1
pop ebp
pop edi
pop esi
pop ebx
ret
xor al, al
fcompp
fcompp
add esp, 0x118
pop ebp
pop edi
pop esi
pop ebx
ret