Function at 0x44bec0
Capabilities:
Resolve function by parsing pe exports

Disassembly:
sub esp, 0xdc
fld dword [ecx + 0xb10]
mov eax, dword [esp + 0xe0]
fstp dword [esp + 0x1c]
push esi
fld dword [ecx + 0xb14]
fstp dword [esp + 0x24]
fld dword [ecx + 0xb18]
fstp dword [esp + 0x28]
fld dword [ecx + 0xb10]
fstp dword [esp + 0x2c]
fld dword [ecx + 0xb20]
fstp dword [esp + 0x30]
fld dword [ecx + 0xb18]
fstp dword [esp + 0x34]
fld dword [ecx + 0xb1c]
fstp dword [esp + 0x38]
fld dword [ecx + 0xb14]
fstp dword [esp + 0x3c]
fld dword [ecx + 0xb18]
fstp dword [esp + 0x40]
fld dword [ecx + 0xb1c]
fstp dword [esp + 0x44]
fld dword [ecx + 0xb20]
fstp dword [esp + 0x48]
fld dword [ecx + 0xb18]
fstp dword [esp + 0x4c]
fld dword [ecx + 0xb10]
fstp dword [esp + 0x50]
fld dword [ecx + 0xb14]
fstp dword [esp + 0x54]
fld dword [ecx + 0xb24]
fstp dword [esp + 0x58]
fld dword [ecx + 0xb10]
fstp dword [esp + 0x5c]
fld dword [ecx + 0xb20]
fstp dword [esp + 0x60]
fld dword [ecx + 0xb24]
fstp dword [esp + 0x64]
fld dword [ecx + 0xb1c]
fstp dword [esp + 0x68]
fld dword [ecx + 0xb14]
fstp dword [esp + 0x6c]
fld dword [ecx + 0xb24]
fstp dword [esp + 0x70]
fld dword [ecx + 0xb1c]
fstp dword [esp + 0x74]
fld dword [ecx + 0xb20]
fstp dword [esp + 0x78]
fld dword [ecx + 0xb24]
fstp dword [esp + 0x7c]
fld dword [eax]
fld dword [esp + 0x20]
fld st(0)
fmulp st(2)
fld dword [eax + 0xc]
fld dword [esp + 0x24]
fld st(0)
fmulp st(2)
fxch st(3)
faddp st(1)
fld dword [eax + 0x18]
fld dword [esp + 0x28]
fld st(0)
fmulp st(2)
fxch st(2)
faddp st(1)
fstp dword [esp + 0x14]
fld dword [eax + 4]
fmul st(2)
fld dword [eax + 0x10]
fmul st(4)
faddp st(1)
fld st(1)
fmul dword [eax + 0x1c]
faddp st(1)
fstp dword [esp + 0x18]
fld dword [eax + 0x14]
fmulp st(3)
fld dword [eax + 8]
fmulp st(2)
fxch st(2)
faddp st(1)
mov edx, dword [esp + 0xe8]
fld dword [eax + 0x20]
fmulp st(2)
faddp st(1)
fstp dword [esp + 0x1c]
fld dword [edx]
fadd dword [esp + 0x14]
fstp dword [esp + 8]
mov esi, dword [esp + 8]
fld dword [edx + 4]
mov dword [esp + 0x80], esi
fadd dword [esp + 0x18]
fstp dword [esp + 0xc]
mov esi, dword [esp + 0xc]
fld dword [edx + 8]
mov dword [esp + 0x84], esi
fadd dword [esp + 0x1c]
fstp dword [esp + 0x10]
mov esi, dword [esp + 0x10]
fld dword [eax]
mov dword [esp + 0x88], esi
fld dword [esp + 0x2c]
fld st(0)
fmulp st(2)
fld dword [eax + 0xc]
fld dword [esp + 0x30]
fld st(0)
fmulp st(2)
fxch st(3)
faddp st(1)
fld dword [eax + 0x18]
fld dword [esp + 0x34]
fld st(0)
fmulp st(2)
fxch st(2)
faddp st(1)
fstp dword [esp + 0x14]
fld dword [eax + 4]
fmul st(2)
fld dword [eax + 0x10]
fmul st(4)
faddp st(1)
fld st(1)
fmul dword [eax + 0x1c]
faddp st(1)
fstp dword [esp + 0x18]
fld dword [eax + 0x14]
fmulp st(3)
fld dword [eax + 8]
fmulp st(2)
fxch st(2)
faddp st(1)
fld dword [eax + 0x20]
fmulp st(2)
faddp st(1)
fstp dword [esp + 0x1c]
fld dword [edx]
fadd dword [esp + 0x14]
fstp dword [esp + 8]
mov esi, dword [esp + 8]
fld dword [edx + 4]
mov dword [esp + 0x8c], esi
fadd dword [esp + 0x18]
fstp dword [esp + 0xc]
mov esi, dword [esp + 0xc]
fld dword [edx + 8]
mov dword [esp + 0x90], esi
fadd dword [esp + 0x1c]
fstp dword [esp + 0x10]
mov esi, dword [esp + 0x10]
fld dword [eax]
mov dword [esp + 0x94], esi
fld dword [esp + 0x38]
fld st(0)
fmulp st(2)
fld dword [eax + 0xc]
fld dword [esp + 0x3c]
fld st(0)
fmulp st(2)
fxch st(3)
faddp st(1)
fld dword [eax + 0x18]
fld dword [esp + 0x40]
fld st(0)
fmulp st(2)
fxch st(2)
faddp st(1)
fstp dword [esp + 0x14]
fld dword [eax + 4]
fmul st(2)
fld dword [eax + 0x10]
fmul st(4)
faddp st(1)
fld st(1)
fmul dword [eax + 0x1c]
faddp st(1)
fstp dword [esp + 0x18]
fld dword [eax + 0x14]
fmulp st(3)
fld dword [eax + 8]
fmulp st(2)
fxch st(2)
faddp st(1)
fld dword [eax + 0x20]
fmulp st(2)
faddp st(1)
fstp dword [esp + 0x1c]
fld dword [edx]
fadd dword [esp + 0x14]
fstp dword [esp + 8]
mov esi, dword [esp + 8]
fld dword [edx + 4]
mov dword [esp + 0x98], esi
fadd dword [esp + 0x18]
fstp dword [esp + 0xc]
mov esi, dword [esp + 0xc]
fld dword [edx + 8]
mov dword [esp + 0x9c], esi
fadd dword [esp + 0x1c]
fstp dword [esp + 0x10]
mov esi, dword [esp + 0x10]
fld dword [eax]
mov dword [esp + 0xa0], esi
fld dword [esp + 0x44]
fld st(0)
fmulp st(2)
fld dword [eax + 0xc]
fld dword [esp + 0x48]
fld st(0)
fmulp st(2)
fxch st(3)
faddp st(1)
fld dword [eax + 0x18]
fld dword [esp + 0x4c]
fld st(0)
fmulp st(2)
fxch st(2)
faddp st(1)
fstp dword [esp + 0x14]
fld dword [eax + 4]
fmul st(2)
fld dword [eax + 0x10]
fmul st(4)
faddp st(1)
fld st(1)
fmul dword [eax + 0x1c]
faddp st(1)
fstp dword [esp + 0x18]
fld dword [eax + 0x14]
fmulp st(3)
fld dword [eax + 8]
fmulp st(2)
fxch st(2)
faddp st(1)
fld dword [eax + 0x20]
fmulp st(2)
faddp st(1)
fstp dword [esp + 0x1c]
fld dword [edx]
fadd dword [esp + 0x14]
fstp dword [esp + 8]
fld dword [edx + 4]
mov esi, dword [esp + 8]
fadd dword [esp + 0x18]
mov dword [esp + 0xa4], esi
fstp dword [esp + 0xc]
mov esi, dword [esp + 0xc]
fld dword [edx + 8]
mov dword [esp + 0xa8], esi
fadd dword [esp + 0x1c]
fstp dword [esp + 0x10]
mov esi, dword [esp + 0x10]
fld dword [eax]
mov dword [esp + 0xac], esi
fld dword [esp + 0x50]
fld st(0)
fmulp st(2)
fld dword [eax + 0xc]
fld dword [esp + 0x54]
fld st(0)
fmulp st(2)
fxch st(3)
faddp st(1)
fld dword [eax + 0x18]
fld dword [esp + 0x58]
fld st(0)
fmulp st(2)
fxch st(2)
faddp st(1)
fstp dword [esp + 0x14]
fld dword [eax + 4]
fmul st(2)
fld dword [eax + 0x10]
fmul st(4)
faddp st(1)
fld st(1)
fmul dword [eax + 0x1c]
faddp st(1)
fstp dword [esp + 0x18]
fld dword [eax + 0x14]
fmulp st(3)
fld dword [eax + 8]
fmulp st(2)
fxch st(2)
faddp st(1)
fld dword [eax + 0x20]
fmulp st(2)
faddp st(1)
fstp dword [esp + 0x1c]
fld dword [edx]
fadd dword [esp + 0x14]
fstp dword [esp + 8]
mov esi, dword [esp + 8]
fld dword [edx + 4]
mov dword [esp + 0xb0], esi
fadd dword [esp + 0x18]
fstp dword [esp + 0xc]
mov esi, dword [esp + 0xc]
fld dword [edx + 8]
mov dword [esp + 0xb4], esi
fadd dword [esp + 0x1c]
fstp dword [esp + 0x10]
mov esi, dword [esp + 0x10]
fld dword [eax]
mov dword [esp + 0xb8], esi
fld dword [esp + 0x5c]
fld st(0)
fmulp st(2)
fld dword [eax + 0xc]
fld dword [esp + 0x60]
fld st(0)
fmulp st(2)
fxch st(3)
faddp st(1)
fld dword [eax + 0x18]
fld dword [esp + 0x64]
fld st(0)
fmulp st(2)
fxch st(2)
faddp st(1)
fstp dword [esp + 0x14]
fld dword [eax + 4]
fmul st(2)
fld dword [eax + 0x10]
fmul st(4)
faddp st(1)
fld st(1)
fmul dword [eax + 0x1c]
faddp st(1)
fstp dword [esp + 0x18]
fld dword [eax + 0x14]
fmulp st(3)
fld dword [eax + 8]
fmulp st(2)
fxch st(2)
faddp st(1)
fld dword [eax + 0x20]
fmulp st(2)
faddp st(1)
fstp dword [esp + 0x1c]
fld dword [edx]
fadd dword [esp + 0x14]
fstp dword [esp + 8]
mov esi, dword [esp + 8]
fld dword [edx + 4]
mov dword [esp + 0xbc], esi
fadd dword [esp + 0x18]
fstp dword [esp + 0xc]
mov esi, dword [esp + 0xc]
fld dword [edx + 8]
mov dword [esp + 0xc0], esi
fadd dword [esp + 0x1c]
fstp dword [esp + 0x10]
mov esi, dword [esp + 0x10]
fld dword [eax]
mov dword [esp + 0xc4], esi
fld dword [esp + 0x68]
fld st(0)
fmulp st(2)
fld dword [eax + 0xc]
fld dword [esp + 0x6c]
fld st(0)
fmulp st(2)
fxch st(3)
faddp st(1)
fld dword [eax + 0x18]
fld dword [esp + 0x70]
fld st(0)
fmulp st(2)
fxch st(2)
faddp st(1)
fstp dword [esp + 0x14]
fld dword [eax + 4]
fmul st(2)
fld dword [eax + 0x10]
fmul st(4)
faddp st(1)
fld st(1)
fmul dword [eax + 0x1c]
faddp st(1)
fstp dword [esp + 0x18]
fld dword [eax + 0x14]
fmulp st(3)
fld dword [eax + 8]
fmulp st(2)
fxch st(2)
faddp st(1)
fld dword [eax + 0x20]
fmulp st(2)
faddp st(1)
fstp dword [esp + 0x1c]
fld dword [edx]
fadd dword [esp + 0x14]
fstp dword [esp + 8]
mov esi, dword [esp + 8]
fld dword [edx + 4]
mov dword [esp + 0xc8], esi
fadd dword [esp + 0x18]
fstp dword [esp + 0xc]
mov esi, dword [esp + 0xc]
fld dword [edx + 8]
fadd dword [esp + 0x1c]
fstp dword [esp + 0x10]
fld dword [eax]
mov dword [esp + 0xcc], esi
fld dword [esp + 0x74]
mov esi, dword [esp + 0x10]
fld st(0)
mov dword [esp + 0xd0], esi
fmulp st(2)
mov esi, 8
fld dword [eax + 0xc]
fld dword [esp + 0x78]
fld st(0)
fmulp st(2)
fxch st(3)
faddp st(1)
fld dword [eax + 0x18]
fld dword [esp + 0x7c]
fld st(0)
fmulp st(2)
fxch st(2)
faddp st(1)
fstp dword [esp + 0x14]
fld dword [eax + 4]
fmul st(2)
fld dword [eax + 0x10]
fmul st(4)
faddp st(1)
fld st(1)
fmul dword [eax + 0x1c]
faddp st(1)
fstp dword [esp + 0x18]
fld dword [eax + 0x14]
fmulp st(3)
fld dword [eax + 8]
fmulp st(2)
fxch st(2)
faddp st(1)
fld dword [eax + 0x20]
fmulp st(2)
faddp st(1)
fstp dword [esp + 0x1c]
fld dword [edx]
fadd dword [esp + 0x14]
fstp dword [esp + 8]
mov eax, dword [esp + 8]
fld dword [edx + 4]
mov dword [esp + 0xd4], eax
fadd dword [esp + 0x18]
fstp dword [esp + 0xc]
fld dword [edx + 8]
mov edx, dword [esp + 0xc]
fadd dword [esp + 0x1c]
mov dword [esp + 0xd8], edx
lea edx, [esp + 0x84]
fstp dword [esp + 0x10]
mov eax, dword [esp + 0x10]
fld dword [0x6f9ad4]
mov dword [esp + 0xdc], eax
fst dword [esp + 8]
fst dword [esp + 0xc]
fstp dword [esp + 0x10]
fld dword [0x6f9ad0]
fst dword [esp + 0x14]
fst dword [esp + 0x18]
fstp dword [esp + 0x1c]
fldz
fld dword [edx - 4]
fstp dword [esp + 4]
fld dword [esp + 8]
fld dword [esp + 4]
fld st(0)
fsubp st(2)
fxch st(1)
fstp dword [esp + 4]
fld dword [esp + 4]
fcomp st(2)
fnstsw ax
test ah, 1
jne 0x44c50b
fstp dword [esp + 8]
jmp 0x44c50d
fstp st(0)
fld dword [edx - 4]
fstp dword [esp + 4]
fld dword [esp + 0x14]
fld dword [esp + 4]
fld st(0)
fsubp st(2)
fxch st(1)
fstp dword [esp + 4]
fld dword [esp + 4]
fcomp st(2)
fnstsw ax
test ah, 1
je 0x44c539
fstp dword [esp + 0x14]
jmp 0x44c53b
fstp st(0)
fld dword [edx]
fstp dword [esp + 4]
fld dword [esp + 0xc]
fld dword [esp + 4]
fld st(0)
fsubp st(2)
fxch st(1)
fstp dword [esp + 4]
fld dword [esp + 4]
fcomp st(2)
fnstsw ax
test ah, 1
jne 0x44c566
fstp dword [esp + 0xc]
jmp 0x44c568
fstp st(0)
fld dword [edx]
fstp dword [esp + 4]
fld dword [esp + 0x18]
fld dword [esp + 4]
fld st(0)
fsubp st(2)
fxch st(1)
fstp dword [esp + 4]
fld dword [esp + 4]
fcomp st(2)
fnstsw ax
test ah, 1
je 0x44c593
fstp dword [esp + 0x18]
jmp 0x44c595
fstp st(0)
fld dword [edx + 4]
fstp dword [esp + 4]
fld dword [esp + 0x10]
fld dword [esp + 4]
fld st(0)
fsubp st(2)
fxch st(1)
fstp dword [esp + 4]
fld dword [esp + 4]
fcomp st(2)
fnstsw ax
test ah, 1
jne 0x44c5c1
fstp dword [esp + 0x10]
jmp 0x44c5c3
fstp st(0)
fld dword [edx + 4]
fstp dword [esp + 4]
fld dword [esp + 0x1c]
fld dword [esp + 4]
fld st(0)
fsubp st(2)
fxch st(1)
fstp dword [esp + 4]
fld dword [esp + 4]
fcomp st(2)
fnstsw ax
test ah, 1
je 0x44c5ef
fstp dword [esp + 0x1c]
jmp 0x44c5f1
fstp st(0)
add edx, 0xc
sub esi, 1
jne 0x44c4df
mov edx, dword [esp + 8]
fstp st(0)
mov eax, dword [esp + 0xc]
mov dword [ecx + 0xb28], edx
mov edx, dword [esp + 0x10]
mov dword [ecx + 0xb2c], eax
mov eax, dword [esp + 0x14]
mov dword [ecx + 0xb34], eax
mov eax, dword [esp + 0x1c]
mov dword [ecx + 0xb30], edx
mov edx, dword [esp + 0x18]
mov dword [ecx + 0xb38], edx
mov dword [ecx + 0xb3c], eax
pop esi
add esp, 0xdc
ret 8