Function at 0x40f06c
Capabilities:
Resolve function by parsing pe exports

Disassembly:
push edi
push esi
push ebp
push ebx
sub esp, 0x9c
mov dword [esp + 0x24], ecx
mov ebx, dword [eax]
mov esi, dword [ebx + 0x30]
mov eax, dword [eax + 8]
mov dword [esp], edx
mov ebp, esi
mov dword [esp + 0x28], esi
mov dword [esp + 8], eax
sar ebp, 1
mov edi, esi
sar edi, 2
mov dword [esp + 4], edi
sar esi, 3
lea eax, [eax + ebp*4]
lea edx, [ecx + ebp*4]
mov ecx, dword [ebx + 8]
lea edx, [edx + edi*4]
mov dword [esp + 0xc], edx
lea edx, [edx + 4]
lea ecx, [ecx + ebp*4]
test esi, esi
mov dword [esp + 0x30], ecx
jle 0x40fe5e
mov edi, dword [esp + 0xc]
mov dword [esp + 0x10], ebx
mov ebx, ecx
xor ecx, ecx
jmp 0x40f0d1
fstp dword [eax + ecx*4 - 4]
add edi, 0xfffffff0
fld dword [edi + 8]
fadd dword [edx]
add ebx, 0xfffffff8
fld dword [edi]
fadd dword [edx + 8]
add edx, 0x10
fld dword [ebx]
fmul st(2)
fld dword [ebx + 4]
fmul st(2)
faddp st(1)
fstp dword [eax + ecx*4]
fld dword [ebx]
fmulp st(1)
fld dword [ebx + 4]
fmulp st(2)
fsubrp st(1)
add ecx, 2
cmp ecx, esi
jl 0x40f0cd
fstp dword [eax + ecx*4 - 4]
mov dword [esp + 0x30], ebx
mov ebx, dword [esp + 0x10]
mov dword [esp + 0xc], edi
mov dword [esp + 0x1c], eax
mov eax, dword [esp + 0x24]
lea eax, [eax + 4]
neg esi
add esi, ebp
mov dword [esp + 0x34], eax
mov edi, esi
sub edi, ecx
add edi, 1
mov eax, 0x80000001
imul edi
add edx, edi
mov eax, dword [esp + 0x1c]
sar edi, 0x1f
sub edx, edi
mov dword [esp + 0x2c], edx
cmp ecx, esi
jge 0x40f1e8
mov dword [esp + 0x1c], eax
mov dword [esp + 0x18], ebp
mov dword [esp + 0x10], ebx
mov ebx, dword [esp + 0xc]
xor esi, esi
mov dword [esp + 0x14], esi
lea edx, [eax + ecx*4]
mov esi, dword [esp + 0x30]
mov ebp, dword [esp + 0x14]
mov dword [esp + 0x20], edx
mov edx, dword [esp + 0x24]
mov eax, dword [esp + 0x20]
jmp 0x40f17e
fstp dword [eax - 4]
fld dword [ebx - 8]
fsub dword [edx + 4]
lea edi, [esi - 8]
fld dword [ebx - 0x10]
fsub dword [edx + 0xc]
fld dword [esi - 4]
fld dword [esi - 8]
fxch st(1)
fmul st(2)
fxch st(1)
fmul st(3)
faddp st(1)
fstp dword [eax]
fmul dword [esi - 8]
fxch st(1)
fmul dword [esi - 4]
fsubp st(1)
mov dword [esp + 0x30], edi
lea edi, [edx + 0x14]
add esi, 0xfffffff8
mov dword [esp + 0x34], edi
lea edi, [ecx + 2]
mov dword [esp + 0xc], edi
add ebx, 0xfffffff0
mov edi, dword [esp + 0x2c]
add edx, 0x10
add eax, 8
add ecx, 2
add ebp, 1
cmp ebp, edi
jb 0x40f17b
fstp dword [eax - 4]
mov ecx, dword [esp + 0xc]
mov eax, dword [esp + 0x1c]
mov ebp, dword [esp + 0x18]
mov ebx, dword [esp + 0x10]
mov esi, dword [esp + 0x28]
mov edx, dword [esp + 0x24]
lea edx, [edx + esi*4]
cmp ecx, ebp
jge 0x40f248
mov esi, dword [esp + 0x34]
mov edi, dword [esp + 0x30]
jmp 0x40f205
fstp dword [eax + ecx*4 - 4]
add edi, 0xfffffff8
fld dword [edi + 4]
fld dword [edi]
add edx, 0xfffffff0
fld dword [edx + 8]
fld dword [edx]
fxch st(1)
fchs
fsub dword [esi]
fmul st(2), st(0)
fxch st(1)
fchs
fsub dword [esi + 8]
fmul st(3), st(0)
fxch st(2)
faddp st(3)
add esi, 0x10
fxch st(2)
fstp dword [eax + ecx*4]
fld dword [edi]
fmulp st(1)
fld dword [edi + 4]
fmulp st(2)
fsubrp st(1)
add ecx, 2
cmp ecx, ebp
jl 0x40f201
fstp dword [eax + ecx*4 - 4]
mov esi, dword [ebx + 8]
mov edx, dword [ebx + 0x34]
lea ecx, [edx - 6]
test ecx, ecx
jle 0x40f3ab
mov ecx, dword [esp + 0x28]
mov dword [esp + 0x14], esi
mov dword [esp + 0x10], ebx
lea edi, [eax + ebp*4]
mov ebx, esi
add edi, 0xffffffe0
and ecx, 0xfffffffc
lea ecx, [ecx + eax - 0x20]
jmp 0x40f279
fstp dword [ecx + 0x24]
fld dword [edi + 0x18]
fld dword [edi + 0x18]
fld dword [ecx + 0x18]
fadd st(2), st(0)
fsubp st(1)
fld dword [edi + 0x1c]
fld dword [ecx + 0x1c]
fxch st(3)
fstp dword [edi + 0x18]
fsubr st(2), st(0)
fld dword [ecx + 0x1c]
faddp st(1)
fstp dword [edi + 0x1c]
fld dword [ebx]
fmul st(1)
fld dword [ebx + 4]
fmul st(3)
faddp st(1)
fld dword [ecx + 0x14]
fxch st(1)
fstp dword [ecx + 0x18]
fld dword [ebx]
fmulp st(3)
fld dword [ebx + 4]
fmulp st(2)
fxch st(1)
fsubp st(2)
fld dword [ecx + 0x10]
fxch st(2)
fstp dword [ecx + 0x1c]
fld dword [edi + 0x10]
fld dword [edi + 0x10]
fxch st(1)
fadd st(3)
fld dword [edi + 0x14]
fxch st(1)
fstp dword [edi + 0x10]
fxch st(3)
fsubp st(1)
fxch st(1)
fsubr st(2)
fld dword [ecx + 0x14]
faddp st(3)
fxch st(2)
fstp dword [edi + 0x14]
fld dword [ebx + 0x10]
fmul st(1)
fld dword [ebx + 0x14]
fmul st(3)
faddp st(1)
fld dword [ecx + 0xc]
fxch st(1)
fstp dword [ecx + 0x10]
fld dword [ebx + 0x10]
fmulp st(3)
fld dword [ebx + 0x14]
fmulp st(2)
fxch st(1)
fsubp st(2)
fld dword [ecx + 8]
fxch st(2)
fstp dword [ecx + 0x14]
fld dword [edi + 8]
fld dword [edi + 8]
fxch st(1)
fadd st(3)
fld dword [edi + 0xc]
fxch st(1)
fstp dword [edi + 8]
fxch st(3)
fsubp st(1)
fxch st(1)
fsubr st(2)
fld dword [ecx + 0xc]
faddp st(3)
fxch st(2)
fstp dword [edi + 0xc]
fld dword [ebx + 0x20]
fmul st(1)
fld dword [ebx + 0x24]
fmul st(3)
faddp st(1)
fstp dword [ecx + 8]
fld dword [ebx + 0x20]
fmulp st(2)
fld dword [ebx + 0x24]
fmulp st(1)
fsubp st(1)
fld dword [ecx + 4]
fxch st(1)
fstp dword [ecx + 0xc]
fld dword [ecx]
fld dword [edi]
fld dword [edi]
fxch st(1)
fadd st(2)
fld dword [edi + 4]
fxch st(1)
fstp dword [edi]
fxch st(2)
fsubp st(1)
fxch st(1)
fsubr st(2), st(0)
fld dword [ecx + 4]
faddp st(1)
fstp dword [edi + 4]
add edi, 0xffffffe0
fld dword [ebx + 0x30]
fmul st(1)
fld dword [ebx + 0x34]
fmul st(3)
faddp st(1)
fstp dword [ecx]
fld dword [ebx + 0x30]
fmulp st(2)
fld dword [ebx + 0x34]
fmulp st(1)
fsubp st(1)
add ecx, 0xffffffe0
add ebx, 0x40
cmp ecx, eax
jae 0x40f276
fstp dword [ecx + 0x24]
mov ebx, dword [esp + 0x10]
add edx, 0xfffffff9
test edx, edx
jle 0x40f59b
mov dword [esp + 0x2c], edx
mov dword [esp + 0x20], esi
mov dword [esp + 0x1c], eax
mov dword [esp + 0x18], ebp
mov dword [esp + 0x10], ebx
mov ecx, 1
mov esi, 1
shl esi, cl
test esi, esi
jle 0x40f579
mov edx, dword [esp + 0x18]
mov dword [esp + 0x30], esi
xor ebx, ebx
sar edx, cl
mov dword [esp + 0xc], ecx
mov ebp, 4
shl ebp, cl
mov dword [esp + 0x24], ebp
mov edi, edx
shr edi, 1
xor eax, eax
mov dword [esp + 0x28], edi
mov edi, dword [esp + 0x20]
mov ebp, dword [esp + 0x1c]
mov ecx, dword [esp + 0x28]
mov dword [esp + 0x34], ebx
lea esi, [ebp + eax*4]
mov ebx, dword [esp + 0x24]
lea ebp, [esi + edx*4]
add ebp, 0xffffffe0
lea ecx, [esi + ecx*4]
add ecx, 0xffffffe0
jmp 0x40f42c
fstp dword [ecx + 0x24]
fld dword [ebp + 0x18]
fld dword [ebp + 0x18]
fld dword [ecx + 0x18]
fadd st(2), st(0)
fsubp st(1)
fld dword [ebp + 0x1c]
fld dword [ecx + 0x1c]
fxch st(3)
fstp dword [ebp + 0x18]
fsubr st(2), st(0)
fld dword [ecx + 0x1c]
faddp st(1)
fstp dword [ebp + 0x1c]
fld dword [edi]
fmul st(1)
fld dword [edi + 4]
fmul st(3)
faddp st(1)
fld dword [ecx + 0x14]
fxch st(1)
fstp dword [ecx + 0x18]
fld dword [edi]
fmulp st(3)
fld dword [edi + 4]
fmulp st(2)
fxch st(1)
fsubp st(2)
fld dword [ecx + 0x10]
fxch st(2)
fstp dword [ecx + 0x1c]
fld dword [ebp + 0x10]
fld dword [ebp + 0x10]
fxch st(1)
fadd st(3)
fld dword [ebp + 0x14]
fxch st(1)
fstp dword [ebp + 0x10]
fxch st(3)
fsubp st(1)
fxch st(1)
fsubr st(2)
fld dword [ecx + 0x14]
faddp st(3)
fxch st(2)
fstp dword [ebp + 0x14]
lea edi, [edi + ebx*4]
fld dword [edi]
fmul st(1)
fld dword [edi + 4]
fmul st(3)
faddp st(1)
fld dword [ecx + 0xc]
fxch st(1)
fstp dword [ecx + 0x10]
fld dword [edi]
fmulp st(3)
fld dword [edi + 4]
fmulp st(2)
fxch st(1)
fsubp st(2)
fld dword [ecx + 8]
fxch st(2)
fstp dword [ecx + 0x14]
lea edi, [edi + ebx*4]
fld dword [ebp + 8]
fld dword [ebp + 8]
fxch st(1)
fadd st(3)
fld dword [ebp + 0xc]
fxch st(1)
fstp dword [ebp + 8]
fxch st(3)
fsubp st(1)
fxch st(1)
fsubr st(2)
fld dword [ecx + 0xc]
faddp st(3)
fxch st(2)
fstp dword [ebp + 0xc]
fld dword [edi]
fmul st(1)
fld dword [edi + 4]
fmul st(3)
faddp st(1)
fstp dword [ecx + 8]
fld dword [edi]
fmulp st(2)
fld dword [edi + 4]
fmulp st(1)
fsubp st(1)
fld dword [ecx + 4]
fxch st(1)
fstp dword [ecx + 0xc]
lea edi, [edi + ebx*4]
fld dword [ecx]
fld dword [ebp]
fld dword [ebp]
fxch st(1)
fadd st(2)
fld dword [ebp + 4]
fxch st(1)
fstp dword [ebp]
fxch st(2)
fsubp st(1)
fxch st(1)
fsubr st(2), st(0)
fld dword [ecx + 4]
faddp st(1)
fstp dword [ebp + 4]
add ebp, 0xffffffe0
fld dword [edi]
fmul st(1)
fld dword [edi + 4]
fmul st(3)
faddp st(1)
fstp dword [ecx]
fld dword [edi]
fmulp st(2)
fld dword [edi + 4]
fmulp st(1)
fsubp st(1)
lea edi, [edi + ebx*4]
add ecx, 0xffffffe0
cmp ecx, esi
jae 0x40f429
fstp dword [ecx + 0x24]
mov ebx, dword [esp + 0x34]
mov ecx, dword [esp + 0x30]
add eax, edx
add ebx, 1
cmp ebx, ecx
jl 0x40f403
mov ecx, dword [esp + 0xc]
mov eax, dword [esp + 0x2c]
add ecx, 1
add eax, 0xffffffff
mov dword [esp + 0x2c], eax
test eax, eax
jg 0x40f3cf
mov eax, dword [esp + 0x1c]
mov ebp, dword [esp + 0x18]
mov ebx, dword [esp + 0x10]
test ebp, ebp
jle 0x40fcac
fld dword [0x4391c0]
fld dword [0x4391c4]
lea edx, [eax + ebp*4]
fstp st(0)
fstp st(0)
fld dword [0x4391c8]
fstp st(0)
jmp 0x40f5c3
fstp dword [eax - 0xc]
fld dword [eax + 0x78]
fld dword [eax + 0x78]
fld dword [eax + 0x38]
fadd st(2), st(0)
fld dword [eax + 0x7c]
fld dword [eax + 0x3c]
fld dword [eax + 0x74]
fld dword [eax + 0x6c]
fld dword [eax + 0x2c]
fxch st(7)
fstp dword [esp + 0x20]
fxch st(4)
fsubp st(5)
fld dword [eax + 0x70]
fxch st(5)
fstp dword [esp + 0xc]
fld dword [eax + 0x7c]
fxch st(2)
fadd st(3), st(0)
fxch st(3)
fstp dword [esp + 0x24]
fxch st(2)
fsubp st(1)
fld dword [eax + 0x34]
fxch st(1)
fstp dword [esp + 0x1c]
fld dword [eax + 0x70]
fld dword [eax + 0x74]
fxch st(2)
fadd st(3), st(0)
fld dword [eax + 0x30]
fxch st(4)
fstp dword [esp + 0x2c]
fxch st(1)
fsub st(3)
fxch st(1)
fsubp st(2)
fxch st(2)
faddp st(4)
fld dword [0x4391c0]
fxch st(4)
fstp dword [esp + 0x28]
fld dword [0x4391c0]
fmul st(2)
fld dword [0x4391c4]
fmul st(3), st(0)
fld dword [0x4391c4]
fmul st(3)
fxch st(3)
fmul st(6)
fxch st(3)
fsubp st(2)
fld dword [eax + 0x28]
fxch st(2)
fstp dword [esp + 0x30]
fxch st(2)
faddp st(3)
fld dword [eax + 0x68]
fxch st(3)
fstp dword [esp + 0x34]
fld dword [eax + 0x68]
fld dword [eax + 0x6c]
fxch st(2)
fadd st(4), st(0)
fxch st(4)
fstp dword [esp + 0x38]
fsubrp st(3)
fsub st(5)
fxch st(5)
faddp st(3)
fld dword [0x4391c8]
fld dword [eax + 0x24]
fxch st(4)
fstp dword [esp + 0x3c]
fld st(2)
fxch st(3)
fadd st(6)
fmul st(1)
fld dword [eax + 0x64]
fxch st(1)
fstp dword [esp + 0x44]
fxch st(6)
fsubp st(3)
fmulp st(2)
fld dword [eax + 0x60]
fxch st(2)
fstp dword [esp + 0x40]
fld dword [eax + 0x60]
fld dword [eax + 0x64]
fxch st(4)
fadd st(6), st(0)
fld dword [eax + 0x20]
fxch st(7)
fstp dword [esp + 0x4c]
fxch st(1)
fsub st(6)
fxch st(1)
fsubp st(4)
fxch st(5)
faddp st(2)
fld dword [eax + 0x5c]
fld dword [eax + 0x54]
fxch st(3)
fstp dword [esp + 0x48]
fld dword [0x4391c4]
fmul st(6)
fxch st(5)
fmul st(6), st(0)
fld dword [0x4391c0]
fmul st(5)
fxch st(3)
fmul st(5), st(0)
fxch st(3)
fsubp st(6)
fld dword [eax + 0x58]
fxch st(6)
fstp dword [esp + 0x50]
fxch st(4)
faddp st(6)
fld dword [eax + 0x18]
fld dword [eax + 0x1c]
fxch st(7)
fstp dword [esp + 0x54]
fld dword [eax + 0x58]
fxch st(1)
fadd st(6), st(0)
fxch st(6)
fstp dword [esp + 0x60]
fsubrp st(5)
fld dword [eax + 0x10]
fxch st(5)
fstp dword [esp + 0x58]
fld dword [eax + 0x1c]
fld dword [eax + 0x10]
fxch st(1)
fsub st(2)
fstp dword [esp + 0x5c]
fxch st(6)
faddp st(1)
fld dword [eax + 0x50]
fxch st(1)
fstp dword [esp + 0x64]
fsub st(5), st(0)
faddp st(4)
fld dword [eax + 0x14]
fxch st(4)
fstp dword [esp + 0x68]
fld dword [eax + 0x14]
fld dword [0x4391c4]
fmul st(6)
fxch st(4)
fmul st(6), st(0)
fxch st(1)
fsub st(3)
fxch st(5)
faddp st(3)
fld dword [eax + 0xc]
fxch st(3)
fstp dword [esp + 0x6c]
fld dword [0x4391c0]
fmul st(5)
fxch st(2)
fmul st(5), st(0)
fxch st(2)
faddp st(4)
fld dword [eax + 8]
fld dword [eax + 0x4c]
fxch st(5)
fstp dword [esp + 0x70]
fxch st(6)
fsubp st(5)
fld dword [eax + 0x48]
fxch st(5)
fstp dword [esp + 0x74]
fld dword [eax + 8]
fld dword [eax + 0xc]
fxch st(1)
fsub st(6)
fxch st(7)
faddp st(6)
fxch st(5)
fstp dword [esp + 0x78]
fxch st(3)
fsub st(4), st(0)
faddp st(2)
fld dword [eax + 4]
fld dword [0x4391c8]
fxch st(3)
fstp dword [esp + 0x7c]
fld st(5)
fadd st(5)
fmul st(3)
fld dword [eax + 0x44]
fxch st(1)
fstp dword [esp + 0x80]
fxch st(6)
fsubp st(5)
fxch st(2)
fmulp st(4)
fld dword [eax + 0x40]
fxch st(4)
fstp dword [esp + 0x84]
fld dword [eax + 4]
fsub st(5)
fxch st(2)
faddp st(5)
fld dword [eax]
fxch st(5)
fstp dword [esp + 0x8c]
fld dword [eax]
fsub st(4)
fxch st(5)
faddp st(4)
fld dword [esp + 0x34]
fxch st(4)
fstp dword [esp + 0x88]
fld dword [0x4391c0]
fmul st(5)
fxch st(1)
fmul st(5), st(0)
fmul st(2)
fxch st(3)
fmulp st(2)
faddp st(2)
fsubrp st(3)
fld st(0)
fld st(3)
fld dword [esp + 0x54]
fsub st(1), st(0)
faddp st(5)
fld dword [esp + 0x50]
fld dword [0x4391c8]
fxch st(6)
fstp dword [esp + 0x54]
fsub st(2), st(0)
faddp st(3)
fld dword [esp + 0x40]
fld dword [esp + 0x80]
fxch st(4)
fstp dword [esp + 0x50]
fld st(1)
fxch st(2)
fsub st(3)
fmul st(6)
fstp dword [esp + 0x94]
fxch st(2)
faddp st(1)
fmul st(4)
fld dword [esp + 0x84]
fld dword [esp + 0x44]
fxch st(2)
fstp dword [esp + 0x90]
fld dword [esp + 0x84]
fld dword [esp + 0x40]
fxch st(4)
fadd st(5)
fstp dword [esp + 0x40]
fsub st(2)
fxch st(4)
fsubp st(3)
fxch st(2)
fstp dword [esp + 0x98]
faddp st(1)
fld dword [esp + 0x30]
fld dword [esp + 0x70]
fxch st(2)
fstp dword [esp + 0x44]
fld dword [esp + 0x30]
fld dword [esp + 0x34]
fxch st(2)
fadd st(3)
fld dword [esp + 0x74]
fxch st(1)
fstp dword [esp + 0x30]
fxch st(3)
fsubp st(1)
fxch st(1)
fsub st(2)
fxch st(2)
faddp st(4)
fld dword [esp + 0xc]
fld dword [esp + 0x58]
fxch st(5)
fstp dword [esp + 0x34]
fld st(1)
fxch st(2)
fadd st(3)
fmul st(6)
fld dword [esp + 0x1c]
fxch st(1)
fstp dword [esp + 0x84]
fxch st(3)
fsubp st(2)
fxch st(5)
fmulp st(1)
fld dword [esp + 0xc]
fld dword [esp + 0x1c]
fxch st(3)
fadd st(5)
fld dword [esp + 0x5c]
fxch st(1)
fstp dword [esp + 0x1c]
fsub st(1), st(0)
fxch st(5)
fsubp st(3)
fxch st(4)
faddp st(5)
fld dword [esp + 0x90]
fld dword [esp + 0x94]
fld dword [esp + 0x98]
fxch st(7)
fstp dword [esp + 0xc]
fld st(5)
fxch st(5)
fsub st(6), st(0)
faddp st(5)
fld st(2)
fxch st(2)
fsub st(3), st(0)
fxch st(3)
fstp dword [esp + 0x80]
fxch st(2)
faddp st(1)
fld st(3)
fxch st(1)
fsub st(4), st(0)
fld dword [esp + 0x84]
fxch st(5)
fstp dword [eax + 0x10]
faddp st(1)
fstp dword [eax + 0x18]
fld dword [esp + 0x84]
fld st(2)
fxch st(2)
fadd st(4), st(0)
fsubp st(1)
fxch st(1)
fsub st(5)
fxch st(5)
faddp st(2)
fld st(0)
fadd st(4)
fld dword [esp + 0x54]
fld dword [esp + 0x44]
fxch st(2)
fstp dword [eax]
fxch st(2)
fsubp st(5)
fld dword [esp + 0x80]
fxch st(5)
fstp dword [eax + 8]
fld st(5)
fxch st(5)
fsub st(6), st(0)
fxch st(6)
fstp dword [eax + 4]
fxch st(5)
faddp st(4)
fxch st(3)
fstp dword [eax + 0xc]
fld st(1)
fadd st(1)
fstp dword [eax + 0x1c]
fsubrp st(1)
fld dword [esp + 0x40]
fld dword [esp + 0x30]
fxch st(2)
fstp dword [eax + 0x14]
fld dword [esp + 0x30]
fld dword [esp + 0xc]
fld dword [esp + 0xc]
fxch st(1)
fsub st(3)
fxch st(3)
faddp st(1)
fld dword [esp + 0x50]
fadd st(2), st(0)
fsubp st(4)
fxch st(3)
fstp dword [esp + 0x30]
fld st(2)
fxch st(1)
fsub st(3), st(0)
fld dword [esp + 0x34]
fxch st(4)
fstp dword [eax + 0x30]
faddp st(1)
fld dword [esp + 0x1c]
fxch st(1)
fstp dword [eax + 0x38]
fld dword [esp + 0x34]
fld dword [esp + 0x1c]
fxch st(4)
fadd st(5)
fxch st(5)
fsubp st(1)
fxch st(3)
fsub st(5)
fxch st(5)
faddp st(1)
fld st(2)
fadd st(2)
fld dword [esp + 0x2c]
fxch st(1)
fstp dword [eax + 0x20]
fxch st(3)
fsubp st(2)
fld dword [esp + 0x30]
fxch st(2)
fstp dword [eax + 0x28]
fld st(4)
fxch st(2)
fsub st(5), st(0)
fxch st(5)
fstp dword [eax + 0x24]
fxch st(4)
faddp st(1)
fld dword [0x4391c8]
fxch st(1)
fstp dword [eax + 0x2c]
fld st(2)
fadd st(4)
fld dword [esp + 0x4c]
fxch st(1)
fstp dword [eax + 0x3c]
fxch st(3)
fsubp st(4)
fld dword [esp + 0x88]
fld dword [esp + 0x48]
fxch st(5)
fstp dword [eax + 0x34]
fld dword [esp + 0x88]
fsub st(5)
fxch st(1)
faddp st(5)
fld dword [esp + 0x8c]
fxch st(5)
fstp dword [esp + 0x48]
fld dword [esp + 0x8c]
fsub st(4)
fxch st(5)
faddp st(4)
fld dword [esp + 0x38]
fld dword [esp + 0x78]
fxch st(5)
fstp dword [esp + 0x4c]
fld st(5)
fxch st(2)
fsub st(6), st(0)
fxch st(3)
fmul st(6), st(0)
fxch st(6)
fstp dword [esp + 0x94]
fxch st(2)
faddp st(1)
fmul st(4)
fld dword [esp + 0x7c]
fld dword [esp + 0x3c]
fxch st(2)
fstp dword [esp + 0x98]
fld dword [esp + 0x7c]
fld dword [esp + 0x38]
fxch st(4)
fadd st(6)
fstp dword [esp + 0x38]
fsub st(2)
fxch st(5)
fsubp st(3)
fld dword [esp + 0x68]
fxch st(3)
fstp dword [esp + 0x90]
faddp st(1)
fld dword [esp + 0x28]
fxch st(1)
fstp dword [esp + 0x3c]
fld dword [esp + 0x28]
fld dword [esp + 0x2c]
fxch st(2)
fadd st(3)
fld dword [esp + 0x6c]
fxch st(1)
fstp dword [esp + 0x28]
fxch st(3)
fsubp st(1)
fxch st(1)
fsub st(2)
fxch st(2)
faddp st(3)
fld dword [esp + 0x20]
fld dword [esp + 0x64]
fxch st(4)
fstp dword [esp + 0x2c]
fld st(1)
fxch st(2)
fadd st(3)
fmul st(6)
fld dword [esp + 0x24]
fxch st(1)
fstp dword [esp + 0x8c]
fxch st(3)
fsubp st(2)
fxch st(5)
fmulp st(1)
fld dword [esp + 0x20]
fld dword [esp + 0x24]
fxch st(3)
fadd st(4)
fld dword [esp + 0x60]
fxch st(1)
fstp dword [esp + 0x24]
fsub st(1), st(0)
fxch st(4)
fsubp st(3)
fxch st(3)
faddp st(5)
fld dword [esp + 0x8c]
fxch st(5)
fstp dword [esp + 0x20]
fld st(2)
fxch st(3)
fsub st(4)
fld st(1)
fxch st(5)
faddp st(4)
fld st(2)
fld dword [esp + 0x98]
fadd st(6), st(0)
fsubp st(3)
fxch st(2)
fstp dword [esp + 0x88]
fld st(3)
fxch st(4)
fsub st(5)
fstp dword [eax + 0x50]
fxch st(4)
faddp st(3)
fld dword [esp + 0x94]
fld dword [esp + 0x90]
fxch st(4)
fstp dword [eax + 0x58]
fld dword [esp + 0x8c]
fxch st(2)
fsub st(4)
fxch st(1)
fadd st(6), st(0)
fsubp st(2)
fxch st(3)
faddp st(2)
fld st(0)
fadd st(4)
fld dword [esp + 0x20]
fld dword [esp + 0x24]
fxch st(2)
fstp dword [eax + 0x40]
fxch st(2)
fsubp st(5)
fld dword [esp + 0x88]
fxch st(5)
fstp dword [eax + 0x48]
fld st(3)
fxch st(4)
fsub st(5)
fstp dword [eax + 0x44]
fxch st(4)
faddp st(3)
fld dword [esp + 0x4c]
fxch st(3)
fstp dword [eax + 0x4c]
fld st(4)
fld dword [esp + 0x20]
fxch st(1)
fadd st(3)
fstp dword [eax + 0x5c]
fxch st(5)
fsubp st(2)
fld dword [esp + 0x38]
fld dword [esp + 0x3c]
fxch st(3)
fstp dword [eax + 0x54]
fadd st(5), st(0)
fsubp st(1)
fld dword [esp + 0x28]
fld dword [esp + 0x28]
fld dword [esp + 0x48]
fsub st(2), st(0)
fxch st(2)
fstp dword [esp + 0x28]
faddp st(1)
fld st(5)
fxch st(1)
fsub st(6), st(0)
fxch st(6)
fstp dword [eax + 0x70]
faddp st(5)
fld dword [esp + 0x2c]
fxch st(5)
fstp dword [eax + 0x78]
fld dword [esp + 0x2c]
fld dword [esp + 0x24]
fxch st(4)
fadd st(6), st(0)
fsubp st(1)
fxch st(2)
fsub st(3), st(0)
faddp st(4)
fld st(1)
fadd st(1)
fstp dword [eax + 0x60]
fsubrp st(1)
fld dword [esp + 0x28]
fxch st(1)
fstp dword [eax + 0x68]
fld st(1)
fxch st(1)
fsub st(2), st(0)
fxch st(2)
fstp dword [eax + 0x64]
faddp st(1)
fstp dword [eax + 0x6c]
fld st(1)
fadd st(1)
fstp dword [eax + 0x7c]
fsubrp st(1)
add eax, 0x80
cmp eax, edx
jb 0x40f5c0
fstp dword [eax - 0xc]
fld dword [0x4391cc]
mov eax, dword [esp + 8]
mov esi, dword [ebx + 0x30]
mov ecx, dword [ebx + 0x28]
mov edi, dword [ebx + 8]
mov dword [esp + 0x14], eax
mov edx, esi
mov dword [esp + 0x18], ebp
mov dword [esp + 0x10], ebx
shr edx, 1
lea edx, [eax + edx*4]
mov ebx, eax
mov eax, edx
lea esi, [edi + esi*4]
fstp st(0)
fld dword [esi + 4]
fld dword [esi + 4]
fld dword [esi]
mov ebp, dword [ecx]
fld dword [edx + ebp*4 + 4]
fld dword [edx + ebp*4 + 4]
fld dword [edx + ebp*4]
mov edi, dword [ecx + 4]
fld dword [edx + edi*4 + 4]
fld dword [edx + edi*4]
fxch st(2)
fst dword [esp + 0x98]
fxch st(2)
fst dword [esp + 0x94]
fxch st(1)
fsub st(3), st(0)
fxch st(3)
fmul st(6), st(0)
fmul st(5)
fxch st(3)
faddp st(4)
faddp st(1)
fmul st(3), st(0)
fmulp st(5)
fxch st(2)
faddp st(3)
fxch st(1)
fsubp st(3)
add eax, 0xfffffff0
fld dword [0x4391cc]
fmul st(1), st(0)
fld dword [esp + 0x98]
fsub dword [esp + 0x94]
fmulp st(1)
fld st(2)
fadd st(2)
fstp dword [ebx]
fxch st(2)
fsubp st(1)
fstp dword [eax + 8]
fld st(1)
fxch st(1)
fsub st(2), st(0)
faddp st(1)
fstp dword [ebx + 4]
fstp dword [eax + 0xc]
fld dword [esi + 0xc]
fld dword [esi + 8]
fld dword [esi + 8]
mov ebp, dword [ecx + 8]
fld dword [edx + ebp*4 + 4]
fld dword [edx + ebp*4 + 4]
fld dword [edx + ebp*4]
mov edi, dword [ecx + 0xc]
fld dword [edx + edi*4 + 4]
fld dword [edx + edi*4]
fxch st(2)
fst dword [esp + 0x98]
fxch st(2)
fst dword [esp + 0x94]
fxch st(1)
fsub st(3), st(0)
faddp st(4)
faddp st(1)
fmul st(3), st(0)
fmul st(5)
fxch st(1)
fmul st(5), st(0)
fmulp st(4)
fxch st(2)
faddp st(4)
fxch st(2)
fsubp st(1)
add esi, 0x10
fld dword [0x4391cc]
fmul st(2), st(0)
add ecx, 0x10
fld dword [esp + 0x98]
fsub dword [esp + 0x94]
fmulp st(1)
fld st(3)
fadd st(3)
fstp dword [ebx + 8]
fxch st(3)
fsubp st(2)
fxch st(1)
fstp dword [eax]
fld st(0)
fxch st(1)
fsub st(2)
fxch st(2)
faddp st(1)
fstp dword [ebx + 0xc]
fstp dword [eax + 4]
add ebx, 0x10
cmp ebx, eax
jb 0x40fcdb
mov ebp, dword [esp + 0x18]
mov ebx, dword [esp + 0x10]
mov eax, dword [esp]
mov ecx, dword [esp + 4]
mov edx, dword [ebx + 8]
lea edx, [edx + ebp*4]
lea eax, [eax + ebp*4]
test ecx, ecx
jle 0x40fe53
mov ecx, dword [esp]
mov ebp, dword [esp + 4]
mov esi, ecx
lea ecx, [ecx + ebp*4]
mov ebp, dword [esp + 8]
fld dword [ebp]
fmul dword [edx]
add eax, 0xfffffffc
fld dword [ebp + 4]
fmul dword [edx + 4]
faddp st(1)
fmul dword [ebx + 0x2c]
fstp dword [esi]
add esi, 4
fld dword [ebp]
fmul dword [edx + 4]
fld dword [ebp + 4]
fmul dword [edx]
fsubp st(1)
fmul dword [ebx + 0x2c]
add ebp, 8
fstp dword [eax]
add edx, 8
cmp esi, ecx
jb 0x40fe1f
add esp, 0x9c
pop ebx
pop ebp
pop esi
pop edi
ret
xor ecx, ecx
jmp 0x40f114