Function at 0x424bd0
Capabilities:
Resolve function by parsing pe exports

Disassembly:
push ebp
mov ebp, esp
and esp, 0xfffffff0
sub esp, 0x74
fld dword [0x4b33dc]
mov eax, dword [ecx + 0x44]
push ebx
fst dword [esp + 0x38]
add eax, eax
fst dword [esp + 0x3c]
push esi
fst dword [esp + 0x44]
add eax, eax
fstp dword [esp + 0x48]
push edi
mov edi, dword [ecx + 0x40]
xor edx, edx
test eax, eax
mov dword [esp + 0x2c], ecx
mov dword [esp + 0x1c], edi
mov dword [esp + 0x28], eax
jle 0x424e8b
mov eax, dword [ebp + 8]
fld dword [eax]
lea esi, [edx + 3]
fstp dword [esp + 0x18]
lea ebx, [edi + 0x18]
fld dword [eax + 4]
fstp dword [esp + 0x24]
fld dword [eax + 8]
fstp dword [esp + 0x20]
fld dword [esp + 0x18]
fld dword [esp + 0x24]
jmp 0x424c3d
mov edi, dword [esp + 0x1c]
fld dword [esp + 0x20]
mov dword [esp + 0x18], 8
fld st(2)
fmul dword [edi]
fstp dword [esp + 0x60]
fld dword [ebx - 0x14]
fmul st(3)
fstp dword [esp + 0x64]
fld dword [ebx - 0x10]
fmul st(3)
fstp dword [esp + 0x68]
fld dword [ebx - 0xc]
fmul st(3)
fstp dword [esp + 0x6c]
fld dword [ebx - 8]
fmul st(2)
fstp dword [esp + 0x50]
fld dword [ebx - 4]
fmul st(2)
fstp dword [esp + 0x54]
fld st(1)
fmul dword [ebx]
fstp dword [esp + 0x58]
fld dword [ebx + 4]
fmul st(2)
fstp dword [esp + 0x5c]
fld dword [esp + 0x50]
fadd dword [esp + 0x60]
fstp dword [esp + 0x30]
fld dword [esp + 0x54]
fadd dword [esp + 0x64]
fstp dword [esp + 0x34]
fld dword [esp + 0x58]
fadd dword [esp + 0x68]
fstp dword [esp + 0x38]
fld dword [esp + 0x5c]
fadd dword [esp + 0x6c]
fstp dword [esp + 0x3c]
fld dword [ebx + 8]
fmul st(1)
fstp dword [esp + 0x70]
fld dword [ebx + 0xc]
fmul st(1)
fstp dword [esp + 0x74]
fld dword [ebx + 0x10]
fmul st(1)
fstp dword [esp + 0x78]
fmul dword [ebx + 0x14]
fstp dword [esp + 0x7c]
fld dword [esp + 0x70]
fadd dword [esp + 0x30]
fstp dword [esp + 0x30]
fld dword [esp + 0x74]
fadd dword [esp + 0x34]
fstp dword [esp + 0x34]
fld dword [esp + 0x78]
fadd dword [esp + 0x38]
fstp dword [esp + 0x38]
fld dword [esp + 0x7c]
fadd dword [esp + 0x3c]
fstp dword [esp + 0x3c]
fld dword [esp + 0x40]
fld dword [esp + 0x30]
fcom st(1)
fnstsw ax
fstp st(1)
test ah, 0x41
je 0x424d2c
mov dword [esp + 0x18], 0
fld dword [esp + 0x44]
fld dword [esp + 0x34]
fcom st(1)
fnstsw ax
fstp st(1)
test ah, 0x41
jne 0x424d46
mov ecx, 4
jmp 0x424d48
xor ecx, ecx
fld dword [esp + 0x48]
fld dword [esp + 0x38]
fcom st(1)
fnstsw ax
fstp st(1)
test ah, 0x41
jne 0x424d62
mov edi, 2
jmp 0x424d64
xor edi, edi
fld dword [esp + 0x4c]
fld dword [esp + 0x3c]
fcom st(1)
fnstsw ax
fstp st(1)
test ah, 0x41
jne 0x424d7e
mov eax, 1
jmp 0x424d80
xor eax, eax
or eax, edi
or eax, ecx
or eax, dword [esp + 0x18]
je 0x424e63
cmp eax, 0xb
ja case.0x424d93.3
jmp dword [eax*4 + 0x424ec8]
fstp st(0)
lea edx, [esi - 3]
fstp st(0)
jmp 0x424dbd
fstp st(0)
lea edx, [esi - 2]
fstp st(0)
fstp st(1)
jmp 0x424dbf
fstp st(0)
lea edx, [esi - 1]
fstp st(2)
jmp 0x424dbd
fstp st(1)
fstp st(2)
mov edx, esi
fstp st(0)
fstp dword [esp + 0x18]
fld dword [esp + 0x18]
fst dword [esp + 0x40]
fst dword [esp + 0x44]
fst dword [esp + 0x48]
fstp dword [esp + 0x4c]
jmp 0x424e6b
fxch st(3)
fcom st(2)
fnstsw ax
test ah, 0x41
jne 0x424e26
fstp st(2)
fxch st(1)
fxch st(2)
fxch st(1)
fcom st(2)
fnstsw ax
test ah, 5
jp 0x424e12
fstp st(0)
fcom st(1)
fnstsw ax
test ah, 5
jp 0x424e0c
lea edx, [esi - 3]
jmp 0x424dbd
fstp st(2)
jmp 0x424def
fstp st(1)
mov edx, esi
jmp 0x424dbf
fstp st(2)
fcom st(1)
fnstsw ax
test ah, 5
jp 0x424e0c
lea edx, [esi - 1]
jmp 0x424dbd
fstp st(3)
jmp 0x424e28
fstp st(0)
fcom st(1)
fnstsw ax
test ah, 5
jp 0x424e4a
fstp st(0)
fcom st(1)
fnstsw ax
test ah, 0x41
jne 0x424dbb
fstp st(1)
lea edx, [esi - 2]
jmp 0x424dbf
fstp st(1)
fcom st(1)
fnstsw ax
test ah, 0x41
jne 0x424dbb
fstp st(1)
lea edx, [esi - 1]
jmp 0x424dbf
fstp st(0)
fstp st(0)
fstp st(1)
fstp st(0)
add dword [esp + 0x1c], 0x30
add esi, 4
lea eax, [esi - 3]
add ebx, 0x30
cmp eax, dword [esp + 0x28]
jl 0x424c39
mov ecx, dword [esp + 0x2c]
fstp st(1)
fstp st(0)
mov esi, dword [ebp + 0xc]
mov eax, edx
shr eax, 2
lea eax, [eax + eax*2]
shl eax, 4
add eax, dword [ecx + 0x40]
mov ecx, edx
and ecx, 3
fld dword [eax + ecx*4]
or edx, 0x3f000000
fstp dword [esi]
pop edi
fld dword [eax + ecx*4 + 0x10]
fstp dword [esi + 4]
fld dword [eax + ecx*4 + 0x20]
mov dword [esi + 0xc], edx
fstp dword [esi + 8]
pop esi
pop ebx
mov esp, ebp
pop ebp
ret 8