Function at 0xd62700
Capabilities:
Resolve function by parsing pe exports

Disassembly:
push ebp
push edi
push esi
push ebx
mov ebx, eax
sub esp, 0x74
cmp ebx, 6
mov dword [esp + 0x14], edx
mov eax, ecx
jle 0xd62832
mov ecx, edx
mov edx, dword [esp + 0x88]
lea esi, [eax + edx*4 - 0x20]
sar edx, 1
lea edx, [eax + edx*4 - 0x20]
fld dword [esi + 0x18]
fld dword [edx + 0x18]
fld st(1)
fsub st(1)
fld dword [esi + 0x1c]
fld dword [edx + 0x1c]
fsubr st(1)
fxch st(3)
faddp st(4)
fxch st(3)
fstp dword [esi + 0x18]
fxch st(2)
fadd dword [edx + 0x1c]
fstp dword [esi + 0x1c]
fld dword [ecx + 4]
fmul st(1)
fld dword [ecx]
fmul st(3)
faddp st(1)
fstp dword [edx + 0x18]
fmul dword [ecx]
fxch st(1)
fmul dword [ecx + 4]
fsubp st(1)
fstp dword [edx + 0x1c]
fld dword [esi + 0x10]
fld dword [edx + 0x10]
fld st(1)
fsub st(1)
fld dword [esi + 0x14]
fld dword [edx + 0x14]
fsubr st(1)
fxch st(3)
faddp st(4)
fxch st(3)
fstp dword [esi + 0x10]
fxch st(2)
fadd dword [edx + 0x14]
fstp dword [esi + 0x14]
fld dword [ecx + 0x14]
fmul st(1)
fld dword [ecx + 0x10]
fmul st(3)
faddp st(1)
fstp dword [edx + 0x10]
fmul dword [ecx + 0x10]
fxch st(1)
fmul dword [ecx + 0x14]
fsubp st(1)
fstp dword [edx + 0x14]
fld dword [esi + 8]
fld dword [edx + 8]
fld st(1)
fsub st(1)
fld dword [esi + 0xc]
fld dword [edx + 0xc]
fsubr st(1)
fxch st(3)
faddp st(4)
fxch st(3)
fstp dword [esi + 8]
fxch st(2)
fadd dword [edx + 0xc]
fstp dword [esi + 0xc]
fld dword [ecx + 0x24]
fmul st(1)
fld dword [ecx + 0x20]
fmul st(3)
faddp st(1)
fstp dword [edx + 8]
fmul dword [ecx + 0x20]
fxch st(1)
fmul dword [ecx + 0x24]
fsubp st(1)
fstp dword [edx + 0xc]
fld dword [esi]
fld dword [edx]
fld st(1)
fsub st(1)
fld dword [esi + 4]
fld dword [edx + 4]
fsubr st(1)
fxch st(3)
faddp st(4)
fxch st(3)
fstp dword [esi]
fxch st(2)
fadd dword [edx + 4]
fstp dword [esi + 4]
sub esi, 0x20
fld dword [ecx + 0x34]
fmul st(1)
fld dword [ecx + 0x30]
fmul st(3)
faddp st(1)
fstp dword [edx]
fmul dword [ecx + 0x30]
fxch st(1)
fmul dword [ecx + 0x34]
add ecx, 0x40
fsubp st(1)
fstp dword [edx + 4]
sub edx, 0x20
cmp eax, edx
jbe 0xd6272b
cmp ebx, 7
jle 0xd629f9
sub ebx, 6
mov dword [esp + 0x28], ebx
mov dword [esp + 0x18], 1
mov dword [esp + 0x2c], eax
nop
movzx ecx, byte [esp + 0x18]
mov eax, 1
shl eax, cl
test eax, eax
mov dword [esp + 4], eax
jle 0xd629e2
mov eax, dword [esp + 0x88]
mov edi, dword [esp + 0x2c]
mov dword [esp], 0
sar eax, cl
lea edx, [eax*4 - 0x20]
mov dword [esp + 0xc], edx
mov edx, eax
sar edx, 1
lea edx, [edx*4 - 0x20]
mov dword [esp + 0x10], edx
mov edx, 4
shl edx, cl
lea ebx, [edx*4]
shl eax, 2
lea esi, [ebx + edx*8]
mov dword [esp + 8], eax
lea ebp, [esi + ebx]
mov ecx, dword [esp + 0xc]
mov eax, dword [esp + 0x10]
mov edx, dword [esp + 0x14]
add ecx, edi
add eax, edi
fld dword [ecx + 0x18]
fld dword [eax + 0x18]
fld st(1)
fsub st(1)
fld dword [ecx + 0x1c]
fld dword [eax + 0x1c]
fsubr st(1)
fxch st(3)
faddp st(4)
fxch st(3)
fstp dword [ecx + 0x18]
fxch st(2)
fadd dword [eax + 0x1c]
fstp dword [ecx + 0x1c]
fld dword [edx + 4]
fmul st(1)
fld dword [edx]
fmul st(3)
faddp st(1)
fstp dword [eax + 0x18]
fmul dword [edx]
fxch st(1)
fmul dword [edx + 4]
fsubp st(1)
fstp dword [eax + 0x1c]
fld dword [ecx + 0x10]
fld dword [eax + 0x10]
fld st(1)
fsub st(1)
fld dword [ecx + 0x14]
fld dword [eax + 0x14]
fsubr st(1)
fxch st(3)
faddp st(4)
fxch st(3)
fstp dword [ecx + 0x10]
fxch st(2)
fadd dword [eax + 0x14]
fstp dword [ecx + 0x14]
fld dword [edx + ebx + 4]
fmul st(1)
fld dword [edx + ebx]
fmul st(3)
faddp st(1)
fstp dword [eax + 0x10]
fmul dword [edx + ebx]
fxch st(1)
fmul dword [edx + ebx + 4]
fsubp st(1)
fstp dword [eax + 0x14]
fld dword [ecx + 8]
fld dword [eax + 8]
fld st(1)
fsub st(1)
fld dword [ecx + 0xc]
fld dword [eax + 0xc]
fsubr st(1)
fxch st(3)
faddp st(4)
fxch st(3)
fstp dword [ecx + 8]
fxch st(2)
fadd dword [eax + 0xc]
fstp dword [ecx + 0xc]
fld dword [edx + ebx*2 + 4]
fmul st(1)
fld dword [edx + ebx*2]
fmul st(3)
faddp st(1)
fstp dword [eax + 8]
fmul dword [edx + ebx*2]
fxch st(1)
fmul dword [edx + ebx*2 + 4]
fsubp st(1)
fstp dword [eax + 0xc]
fld dword [ecx]
fld dword [eax]
fld st(1)
fsub st(1)
fld dword [ecx + 4]
fld dword [eax + 4]
fsubr st(1)
fxch st(3)
faddp st(4)
fxch st(3)
fstp dword [ecx]
fxch st(2)
fadd dword [eax + 4]
fstp dword [ecx + 4]
sub ecx, 0x20
fld dword [edx + esi + 4]
fmul st(1)
fld dword [edx + esi]
fmul st(3)
faddp st(1)
fstp dword [eax]
fmul dword [edx + esi]
fxch st(1)
fmul dword [edx + esi + 4]
add edx, ebp
fsubp st(1)
fstp dword [eax + 4]
sub eax, 0x20
cmp edi, eax
jbe 0xd628c1
add dword [esp], 1
mov eax, dword [esp + 4]
add edi, dword [esp + 8]
cmp dword [esp], eax
jne 0xd628b1
add dword [esp + 0x18], 1
mov edx, dword [esp + 0x28]
cmp dword [esp + 0x18], edx
jne 0xd62850
mov eax, dword [esp + 0x2c]
mov edx, dword [esp + 0x88]
test edx, edx
jle 0xd62f76
mov ecx, dword [esp + 0x88]
xor edx, edx
fld dword [eax + edx*4 + 0x78]
fld dword [eax + edx*4 + 0x38]
fld st(1)
fsub st(1)
fstp dword [esp + 0x28]
fld dword [eax + edx*4 + 0x7c]
fld dword [eax + edx*4 + 0x3c]
fld st(1)
fsub st(1)
fstp dword [esp + 0x2c]
fxch st(3)
faddp st(2)
fxch st(1)
fstp dword [esp + 0x48]
faddp st(1)
fstp dword [esp + 0x4c]
fld dword [eax + edx*4 + 0x70]
fld dword [eax + edx*4 + 0x30]
fld st(1)
fsub st(1)
fld dword [eax + edx*4 + 0x74]
fld dword [eax + edx*4 + 0x34]
fld st(1)
fsub st(1)
fxch st(5)
faddp st(4)
fxch st(3)
fstp dword [esp + 0x40]
faddp st(2)
fxch st(1)
fstp dword [esp + 0x44]
fld dword [0x13ef950]
fmul st(1)
fld dword [0x13ef954]
fld st(3)
fmul st(1)
fsubp st(2)
fxch st(1)
fstp dword [esp + 0xc]
fmul st(1), st(0)
fxch st(2)
fmul dword [0x13ef950]
faddp st(1)
fstp dword [esp + 0x10]
fld dword [eax + edx*4 + 0x68]
fld dword [eax + edx*4 + 0x28]
fld st(1)
fsub st(1)
fld dword [eax + edx*4 + 0x6c]
fld dword [eax + edx*4 + 0x2c]
fld st(1)
fsub st(1)
fxch st(5)
faddp st(4)
fxch st(3)
fstp dword [esp + 0x38]
faddp st(2)
fxch st(1)
fstp dword [esp + 0x3c]
fld st(0)
fsub st(2)
fld dword [0x13ef958]
fmul st(1), st(0)
fxch st(1)
fstp dword [esp + 4]
fxch st(1)
faddp st(2)
fmul st(1), st(0)
fxch st(1)
fstp dword [esp + 8]
fld dword [eax + edx*4 + 0x60]
fld dword [eax + edx*4 + 0x20]
fld st(1)
fsub st(1)
fld dword [eax + edx*4 + 0x64]
fld dword [eax + edx*4 + 0x24]
fld st(1)
fsub st(1)
fxch st(5)
faddp st(4)
fxch st(3)
fstp dword [esp + 0x30]
faddp st(2)
fxch st(1)
fstp dword [esp + 0x34]
fld st(0)
fmul st(4)
fld dword [0x13ef950]
fmul st(3)
fsubp st(1)
fxch st(2)
fmul st(4)
fxch st(1)
fmul dword [0x13ef950]
faddp st(1)
fstp dword [esp]
fld dword [eax + edx*4 + 0x58]
fld dword [eax + edx*4 + 0x18]
fld st(1)
fsub st(1)
fstp dword [esp + 0x54]
fld dword [eax + edx*4 + 0x1c]
fld dword [eax + edx*4 + 0x5c]
fld st(1)
fsub st(1)
fstp dword [esp + 0x58]
fxch st(3)
faddp st(2)
fxch st(1)
fstp dword [esp + 0x5c]
faddp st(1)
fstp dword [esp + 0x60]
fld dword [eax + edx*4 + 0x10]
fld dword [eax + edx*4 + 0x50]
fld st(1)
fsub st(1)
fld dword [eax + edx*4 + 0x14]
fld dword [eax + edx*4 + 0x54]
fsubr st(1)
fxch st(4)
faddp st(3)
fxch st(2)
fstp dword [esp + 0x64]
fxch st(1)
fadd dword [eax + edx*4 + 0x54]
fstp dword [esp + 0x14]
fld dword [0x13ef950]
fmul st(2)
fld st(1)
fmul st(6)
faddp st(1)
fxch st(2)
fmul st(5)
fxch st(1)
fmul dword [0x13ef950]
fsubp st(1)
fstp dword [esp + 0x24]
fld dword [eax + edx*4 + 8]
fld dword [eax + edx*4 + 0x48]
fld st(1)
fsub st(1)
fld dword [eax + edx*4 + 0xc]
fsub dword [eax + edx*4 + 0x4c]
fxch st(3)
faddp st(2)
fxch st(1)
fstp dword [esp + 0x68]
fld dword [eax + edx*4 + 0xc]
fadd dword [eax + edx*4 + 0x4c]
fstp dword [esp + 0x18]
fld st(0)
fadd st(2)
fmul st(5)
fxch st(1)
fsubp st(2)
fxch st(1)
fmul st(4)
fld dword [eax + edx*4 + 0x40]
fld dword [eax + edx*4]
fsub st(1)
fstp dword [esp + 0x20]
fld dword [eax + edx*4 + 4]
fsub dword [eax + edx*4 + 0x44]
fst dword [esp + 0x6c]
fxch st(1)
fadd dword [eax + edx*4]
fstp dword [esp + 0x70]
fld dword [eax + edx*4 + 4]
fadd dword [eax + edx*4 + 0x44]
fstp dword [esp + 0x1c]
fmul st(6)
fld dword [0x13ef950]
fmul dword [esp + 0x20]
faddp st(1)
fld dword [0x13ef950]
fmul dword [esp + 0x6c]
fxch st(7)
fmul dword [esp + 0x20]
fsubp st(7)
fld dword [esp]
fsubr st(7)
fstp dword [esp + 0x6c]
fld st(0)
fsub st(5)
fst dword [esp + 0x20]
fxch st(5)
faddp st(1)
fstp dword [esp + 0x50]
fxch st(5)
fadd dword [esp]
fstp dword [esp]
fld dword [esp + 0x6c]
faddp st(3)
fxch st(2)
fmul st(3)
fld dword [esp + 0x6c]
fsub dword [esp + 0x20]
fmul st(4)
fld dword [esp + 8]
fsubr st(6)
fld dword [esp + 4]
fsub st(5)
fstp dword [esp + 0x20]
fxch st(4)
fadd dword [esp + 4]
fstp dword [esp + 4]
fxch st(5)
fadd dword [esp + 8]
fstp dword [esp + 8]
fld dword [esp + 0xc]
fsub st(2)
fld dword [esp + 0x10]
fsub dword [esp + 0x24]
fxch st(3)
fadd dword [esp + 0xc]
fstp dword [esp + 0xc]
fld dword [esp + 0x10]
fadd dword [esp + 0x24]
fstp dword [esp + 0x10]
fld st(0)
fsub st(3)
fmul st(5)
fxch st(1)
faddp st(3)
fxch st(2)
fmul st(4)
fld dword [esp + 0x28]
fsub dword [esp + 0x58]
fld dword [esp + 0x2c]
fsub dword [esp + 0x54]
fstp dword [esp + 0x24]
fld dword [esp + 0x28]
fadd dword [esp + 0x58]
fstp dword [esp + 0x28]
fld dword [esp + 0x2c]
fadd dword [esp + 0x54]
fstp dword [esp + 0x2c]
fld st(4)
fadd st(1)
fxch st(5)
fsubp st(1)
fld st(2)
fadd st(4)
fxch st(4)
fsubrp st(3)
fld st(4)
fadd st(4)
fstp dword [eax + edx*4 + 0x18]
fxch st(4)
fsubrp st(3)
fxch st(2)
fstp dword [eax + edx*4 + 0x10]
fld st(1)
fsub st(5)
fld dword [esp + 0x24]
fsub dword [esp + 0x20]
fld st(4)
fadd st(2)
fstp dword [eax + edx*4]
fxch st(4)
fsubrp st(1)
fstp dword [eax + edx*4 + 8]
fxch st(4)
faddp st(1)
fld dword [esp + 0x20]
fadd dword [esp + 0x24]
fld st(4)
fadd st(3)
fstp dword [eax + edx*4 + 0xc]
fxch st(4)
fsubp st(2)
fxch st(1)
fstp dword [eax + edx*4 + 4]
fld st(0)
fadd st(3)
fstp dword [eax + edx*4 + 0x1c]
fsubp st(2)
fxch st(1)
fstp dword [eax + edx*4 + 0x14]
fld dword [esp + 4]
fadd dword [esp + 0x28]
fld dword [esp + 0x28]
fsub dword [esp + 4]
fld dword [esp + 0x50]
fadd dword [esp + 0xc]
fld dword [esp + 0xc]
fsub dword [esp + 0x50]
fld st(3)
fadd st(2)
fstp dword [eax + edx*4 + 0x38]
fxch st(3)
fsubrp st(1)
fstp dword [eax + edx*4 + 0x30]
fld dword [esp + 0x10]
fsub dword [esp]
fld dword [esp + 0x2c]
fsub dword [esp + 8]
fld st(2)
fadd st(2)
fstp dword [eax + edx*4 + 0x20]
fxch st(1)
fsubp st(2)
fxch st(1)
fstp dword [eax + edx*4 + 0x28]
fld dword [esp]
fadd dword [esp + 0x10]
fld dword [esp + 8]
fadd dword [esp + 0x2c]
fld st(3)
fadd st(3)
fstp dword [eax + edx*4 + 0x2c]
fxch st(3)
fsubp st(2)
fxch st(1)
fstp dword [eax + edx*4 + 0x24]
fld st(0)
fadd st(2)
fstp dword [eax + edx*4 + 0x3c]
fsubp st(1)
fstp dword [eax + edx*4 + 0x34]
fld dword [esp + 0x1c]
fsub dword [esp + 0x34]
fld dword [esp + 0x70]
fsub dword [esp + 0x30]
fld dword [esp + 0x30]
fadd dword [esp + 0x70]
fstp dword [esp + 0x30]
fld dword [esp + 0x34]
fadd dword [esp + 0x1c]
fstp dword [esp + 0x34]
fld st(1)
fadd st(1)
fmul st(3)
fxch st(2)
fsubrp st(1)
fmul st(2)
fld dword [esp + 0x18]
fsub dword [esp + 0x3c]
fld dword [esp + 0x38]
fsub dword [esp + 0x68]
fstp dword [esp]
fld dword [esp + 0x38]
fadd dword [esp + 0x68]
fstp dword [esp + 0x38]
fld dword [esp + 0x3c]
fadd dword [esp + 0x18]
fstp dword [esp + 0x3c]
fld dword [esp + 0x40]
fsub dword [esp + 0x64]
fld dword [esp + 0x44]
fsub dword [esp + 0x14]
fld dword [esp + 0x40]
fadd dword [esp + 0x64]
fstp dword [esp + 0x40]
fld dword [esp + 0x44]
fadd dword [esp + 0x14]
fstp dword [esp + 0x44]
fld st(1)
fsub st(1)
fmul st(6)
fxch st(1)
faddp st(2)
fxch st(1)
fmulp st(5)
fld dword [esp + 0x48]
fsub dword [esp + 0x5c]
fld dword [esp + 0x4c]
fsub dword [esp + 0x60]
fld dword [esp + 0x48]
fadd dword [esp + 0x5c]
fstp dword [esp + 0x48]
fld dword [esp + 0x4c]
fadd dword [esp + 0x60]
fstp dword [esp + 0x4c]
fld st(3)
fadd st(2)
fxch st(4)
fsubp st(2)
fld st(5)
fadd st(3)
fxch st(6)
fsubp st(3)
fld st(3)
fadd st(6)
fstp dword [eax + edx*4 + 0x58]
fxch st(5)
fsubp st(3)
fxch st(2)
fstp dword [eax + edx*4 + 0x50]
fld st(4)
fsub st(3)
fld dword [esp]
fsubr st(5)
fld st(3)
fadd st(2)
fstp dword [eax + edx*4 + 0x40]
fxch st(3)
fsubrp st(1)
fstp dword [eax + edx*4 + 0x48]
fxch st(4)
faddp st(2)
fxch st(2)
fadd dword [esp]
fld st(3)
fadd st(3)
fstp dword [eax + edx*4 + 0x4c]
fxch st(3)
fsubp st(2)
fxch st(1)
fstp dword [eax + edx*4 + 0x44]
fld st(0)
fadd st(2)
fstp dword [eax + edx*4 + 0x5c]
fsubp st(1)
fstp dword [eax + edx*4 + 0x54]
fld dword [esp + 0x38]
fadd dword [esp + 0x48]
fld dword [esp + 0x48]
fsub dword [esp + 0x38]
fld dword [esp + 0x30]
fadd dword [esp + 0x40]
fld dword [esp + 0x40]
fsub dword [esp + 0x30]
fld st(3)
fadd st(2)
fstp dword [eax + edx*4 + 0x78]
fxch st(3)
fsubrp st(1)
fstp dword [eax + edx*4 + 0x70]
fld dword [esp + 0x44]
fsub dword [esp + 0x34]
fld dword [esp + 0x4c]
fsub dword [esp + 0x3c]
fld st(2)
fadd st(2)
fstp dword [eax + edx*4 + 0x60]
fxch st(1)
fsubp st(2)
fxch st(1)
fstp dword [eax + edx*4 + 0x68]
fld dword [esp + 0x34]
fadd dword [esp + 0x44]
fld dword [esp + 0x3c]
fadd dword [esp + 0x4c]
fld st(3)
fadd st(3)
fstp dword [eax + edx*4 + 0x6c]
fxch st(3)
fsubp st(2)
fxch st(1)
fstp dword [eax + edx*4 + 0x64]
fld st(0)
fadd st(2)
fstp dword [eax + edx*4 + 0x7c]
fsubp st(1)
fstp dword [eax + edx*4 + 0x74]
add edx, 0x20
cmp ecx, edx
jg 0xd62a11
add esp, 0x74
pop ebx
pop esi
pop edi
pop ebp
ret