Function at 0x68b3a0
Capabilities:
Resolve function by parsing pe exports

Disassembly:
sub esp, 0x70
xor eax, eax
cmp dword [ecx + 0x30], eax
mov dword [esp + 0x1c], eax
jle 0x68b9e4
push ebx
push ebp
push esi
mov dword [esp + 0x24], eax
push edi
lea ebx, [ebx]
mov eax, dword [ecx + 0x28]
add eax, dword [esp + 0x28]
mov ebx, dword [ecx + 0x1c]
mov esi, dword [eax + 0x70]
fld dword [eax + 0x78]
mov edx, dword [eax + 0x94]
fstp dword [esp + 0x18]
fld dword [eax + 0x80]
mov edi, dword [eax + 0x74]
fstp dword [esp + 0x1c]
mov dword [esp + 0x24], edx
fld dword [eax + 0x7c]
lea esi, [esi + esi*2]
fstp dword [esp + 0x30]
add esi, esi
fld dword [eax + 0x84]
add esi, esi
mov edx, dword [esi + ebx]
fstp dword [esp + 0x20]
mov dword [esp + 0x40], edx
mov edx, dword [esi + ebx + 4]
mov dword [esp + 0x44], edx
lea edi, [edi + edi*2]
add edi, edi
add edi, edi
mov edx, ebx
mov ebp, dword [edi + edx]
fld dword [edx + esi + 8]
mov edx, dword [edi + edx + 4]
fstp dword [esp + 0x10]
fld dword [edi + ebx + 8]
mov dword [esp + 0x4c], edx
mov edx, dword [eax + 0x48]
fstp dword [esp + 0x14]
mov dword [esp + 0x78], edx
fld dword [esp + 0x78]
fld qword [0x6d89a0]
mov edx, dword [eax + 0x4c]
fmul st(1)
mov dword [esp + 0x48], ebp
mov ebp, dword [esp + 0x24]
mov dword [esp + 0x7c], edx
fstp dword [esp + 0x74]
xor edx, edx
cmp ebp, 4
fld dword [esp + 0x18]
fld dword [esp + 0x30]
fld dword [esp + 0x7c]
jl 0x68b873
add ebp, 0xfffffffc
shr ebp, 2
inc ebp
mov dword [esp + 0x30], ebp
add ebp, ebp
add ebp, ebp
mov dword [esp + 0x34], ebp
mov ebp, dword [esp + 0x30]
lea edx, [eax + 0x54]
fld dword [edx - 0x40]
fstp dword [esp + 0x18]
fld st(0)
fld dword [esp + 0x18]
fld st(0)
fmulp st(2)
fxch st(1)
fstp dword [esp + 0x58]
fmul dword [esp + 0x74]
fstp dword [esp + 0x5c]
fld dword [edx - 0x44]
fstp dword [esp + 0x18]
fld st(3)
fld dword [esp + 0x18]
fld st(0)
fmulp st(2)
fxch st(1)
fstp dword [esp + 0x50]
fmul st(1)
fstp dword [esp + 0x54]
fld dword [esp + 0x50]
fadd dword [esp + 0x58]
fstp dword [esp + 0x38]
fld dword [esp + 0x54]
fadd dword [esp + 0x5c]
fstp dword [esp + 0x3c]
fld dword [esp + 0x10]
fld dword [edx - 0x54]
fmul dword [esp + 0x3c]
fld dword [edx - 0x50]
fmul dword [esp + 0x38]
fsubp st(1)
fstp dword [esp + 0x30]
fld dword [esp + 0x30]
fmul dword [esp + 0x1c]
fsubp st(1)
fstp dword [esp + 0x10]
fld dword [esp + 0x38]
fld st(0)
fmul st(4)
fstp dword [esp + 0x60]
fld dword [esp + 0x3c]
fld st(0)
fmul st(5)
fstp dword [esp + 0x64]
fld dword [esp + 0x40]
fsub dword [esp + 0x60]
fstp dword [esp + 0x40]
fld dword [esp + 0x44]
fsub dword [esp + 0x64]
fstp dword [esp + 0x44]
fld dword [edx - 0x4c]
fmul st(1)
fld dword [edx - 0x48]
fmulp st(3)
fsubrp st(2)
fxch st(1)
fstp dword [esp + 0x30]
fld dword [esp + 0x30]
fmul dword [esp + 0x20]
fadd dword [esp + 0x14]
fstp dword [esp + 0x14]
fld dword [esp + 0x38]
fmul st(3)
fstp dword [esp + 0x68]
fmul st(2)
fstp dword [esp + 0x6c]
fld dword [esp + 0x68]
fadd dword [esp + 0x48]
fstp dword [esp + 0x48]
fld dword [esp + 0x4c]
fadd dword [esp + 0x6c]
fstp dword [esp + 0x4c]
fld dword [edx - 0x1c]
fstp dword [esp + 0x18]
fld st(0)
fld dword [esp + 0x18]
fld st(0)
fmulp st(2)
fxch st(1)
fstp dword [esp + 0x58]
fmul dword [esp + 0x74]
fstp dword [esp + 0x5c]
fld dword [edx - 0x20]
fstp dword [esp + 0x18]
fld st(3)
fld dword [esp + 0x18]
fld st(0)
fmulp st(2)
fxch st(1)
fstp dword [esp + 0x50]
fmul st(1)
fstp dword [esp + 0x54]
fld dword [esp + 0x50]
fadd dword [esp + 0x58]
fstp dword [esp + 0x38]
fld dword [esp + 0x54]
fadd dword [esp + 0x5c]
fstp dword [esp + 0x3c]
fld dword [esp + 0x10]
fld dword [edx - 0x30]
fmul dword [esp + 0x3c]
fld dword [edx - 0x2c]
fmul dword [esp + 0x38]
fsubp st(1)
fstp dword [esp + 0x30]
fld dword [esp + 0x30]
fmul dword [esp + 0x1c]
fsubp st(1)
fstp dword [esp + 0x10]
fld dword [esp + 0x38]
fld st(0)
fmul st(4)
fstp dword [esp + 0x60]
fld dword [esp + 0x3c]
fld st(0)
fmul st(5)
fstp dword [esp + 0x64]
fld dword [esp + 0x40]
fsub dword [esp + 0x60]
fstp dword [esp + 0x40]
fld dword [esp + 0x44]
fsub dword [esp + 0x64]
fstp dword [esp + 0x44]
fld dword [edx - 0x28]
fmul st(1)
fld dword [edx - 0x24]
fmulp st(3)
fsubrp st(2)
fxch st(1)
fstp dword [esp + 0x30]
fld dword [esp + 0x30]
fmul dword [esp + 0x20]
fadd dword [esp + 0x14]
fstp dword [esp + 0x14]
fld dword [esp + 0x38]
fmul st(3)
fstp dword [esp + 0x68]
fmul st(2)
fstp dword [esp + 0x6c]
fld dword [esp + 0x68]
fadd dword [esp + 0x48]
fstp dword [esp + 0x48]
fld dword [esp + 0x4c]
fadd dword [esp + 0x6c]
fstp dword [esp + 0x4c]
fld dword [edx + 8]
fstp dword [esp + 0x18]
fld st(0)
fld dword [esp + 0x18]
fld st(0)
fmulp st(2)
fxch st(1)
fstp dword [esp + 0x58]
fmul dword [esp + 0x74]
fstp dword [esp + 0x5c]
fld dword [edx + 4]
fstp dword [esp + 0x18]
fld st(3)
fld dword [esp + 0x18]
fld st(0)
fmulp st(2)
fxch st(1)
fstp dword [esp + 0x50]
fmul st(1)
fstp dword [esp + 0x54]
fld dword [esp + 0x50]
fadd dword [esp + 0x58]
fstp dword [esp + 0x38]
fld dword [esp + 0x54]
fadd dword [esp + 0x5c]
fstp dword [esp + 0x3c]
fld dword [esp + 0x10]
fld dword [edx - 0xc]
fmul dword [esp + 0x3c]
fld dword [edx - 8]
fmul dword [esp + 0x38]
fsubp st(1)
fstp dword [esp + 0x30]
fld dword [esp + 0x30]
fmul dword [esp + 0x1c]
fsubp st(1)
fstp dword [esp + 0x10]
fld dword [esp + 0x38]
fld st(0)
fmul st(4)
fstp dword [esp + 0x60]
fld dword [esp + 0x3c]
fld st(0)
fmul st(5)
fstp dword [esp + 0x64]
fld dword [esp + 0x40]
fsub dword [esp + 0x60]
fstp dword [esp + 0x40]
fld dword [esp + 0x44]
fsub dword [esp + 0x64]
fstp dword [esp + 0x44]
fld dword [edx - 4]
fmul st(1)
fld dword [edx]
fmulp st(3)
fsubrp st(2)
fxch st(1)
fstp dword [esp + 0x30]
fld dword [esp + 0x30]
fmul dword [esp + 0x20]
fadd dword [esp + 0x14]
fstp dword [esp + 0x14]
fld dword [esp + 0x38]
fmul st(3)
fstp dword [esp + 0x68]
fmul st(2)
fstp dword [esp + 0x6c]
fld dword [esp + 0x68]
fadd dword [esp + 0x48]
fstp dword [esp + 0x48]
fld dword [esp + 0x4c]
fadd dword [esp + 0x6c]
fstp dword [esp + 0x4c]
fld dword [edx + 0x2c]
fstp dword [esp + 0x18]
fld st(0)
fld dword [esp + 0x18]
fld st(0)
fmulp st(2)
fxch st(1)
fstp dword [esp + 0x58]
fmul dword [esp + 0x74]
fstp dword [esp + 0x5c]
fld dword [edx + 0x28]
fstp dword [esp + 0x18]
fld st(3)
fld dword [esp + 0x18]
fld st(0)
fmulp st(2)
fxch st(1)
fstp dword [esp + 0x50]
fmul st(1)
fstp dword [esp + 0x54]
fld dword [esp + 0x50]
fadd dword [esp + 0x58]
fstp dword [esp + 0x38]
fld dword [esp + 0x54]
fadd dword [esp + 0x5c]
add edx, 0x90
sub ebp, 1
fstp dword [esp + 0x3c]
fld dword [esp + 0x10]
fld dword [edx - 0x78]
fmul dword [esp + 0x3c]
fld dword [edx - 0x74]
fmul dword [esp + 0x38]
fsubp st(1)
fstp dword [esp + 0x30]
fld dword [esp + 0x30]
fmul dword [esp + 0x1c]
fsubp st(1)
fstp dword [esp + 0x10]
fld dword [esp + 0x38]
fld st(0)
fmul st(4)
fstp dword [esp + 0x60]
fld dword [esp + 0x3c]
fld st(0)
fmul st(5)
fstp dword [esp + 0x64]
fld dword [esp + 0x40]
fsub dword [esp + 0x60]
fstp dword [esp + 0x40]
fld dword [esp + 0x44]
fsub dword [esp + 0x64]
fstp dword [esp + 0x44]
fld dword [edx - 0x70]
fmul st(1)
fld dword [edx - 0x6c]
fmulp st(3)
fsubrp st(2)
fxch st(1)
fstp dword [esp + 0x30]
fld dword [esp + 0x30]
fmul dword [esp + 0x20]
fadd dword [esp + 0x14]
fstp dword [esp + 0x14]
fld dword [esp + 0x38]
fmul st(3)
fstp dword [esp + 0x68]
fmul st(2)
fstp dword [esp + 0x6c]
fld dword [esp + 0x68]
fadd dword [esp + 0x48]
fstp dword [esp + 0x48]
fld dword [esp + 0x4c]
fadd dword [esp + 0x6c]
fstp dword [esp + 0x4c]
jne 0x68b48d
mov edx, dword [esp + 0x34]
mov ebp, dword [esp + 0x24]
cmp edx, ebp
jge 0x68b987
lea ebp, [edx + edx*8]
lea eax, [eax + ebp*4 + 0x14]
mov ebp, dword [esp + 0x24]
sub ebp, edx
fld dword [eax]
add eax, 0x24
sub ebp, 1
fstp dword [esp + 0x18]
fld st(0)
fld dword [esp + 0x18]
fld st(0)
fmulp st(2)
fxch st(1)
fstp dword [esp + 0x58]
fmul dword [esp + 0x74]
fstp dword [esp + 0x5c]
fld dword [eax - 0x28]
fstp dword [esp + 0x18]
fld st(3)
fld dword [esp + 0x18]
fld st(0)
fmulp st(2)
fxch st(1)
fstp dword [esp + 0x50]
fmul st(1)
fstp dword [esp + 0x54]
fld dword [esp + 0x50]
fadd dword [esp + 0x58]
fstp dword [esp + 0x38]
fld dword [esp + 0x54]
fadd dword [esp + 0x5c]
fstp dword [esp + 0x3c]
fld dword [esp + 0x10]
fld dword [eax - 0x38]
fmul dword [esp + 0x3c]
fld dword [eax - 0x34]
fmul dword [esp + 0x38]
fsubp st(1)
fstp dword [esp + 0x34]
fld dword [esp + 0x34]
fmul dword [esp + 0x1c]
fsubp st(1)
fstp dword [esp + 0x10]
fld dword [esp + 0x38]
fld st(0)
fmul st(4)
fstp dword [esp + 0x60]
fld dword [esp + 0x3c]
fld st(0)
fmul st(5)
fstp dword [esp + 0x64]
fld dword [esp + 0x40]
fsub dword [esp + 0x60]
fstp dword [esp + 0x40]
fld dword [esp + 0x44]
fsub dword [esp + 0x64]
fstp dword [esp + 0x44]
fld dword [eax - 0x30]
fmul st(1)
fld dword [eax - 0x2c]
fmulp st(3)
fsubrp st(2)
fxch st(1)
fstp dword [esp + 0x34]
fld dword [esp + 0x34]
fmul dword [esp + 0x20]
fadd dword [esp + 0x14]
fstp dword [esp + 0x14]
fld dword [esp + 0x38]
fmul st(3)
fstp dword [esp + 0x68]
fmul st(2)
fstp dword [esp + 0x6c]
fld dword [esp + 0x68]
fadd dword [esp + 0x48]
fstp dword [esp + 0x48]
fld dword [esp + 0x4c]
fadd dword [esp + 0x6c]
fstp dword [esp + 0x4c]
jne 0x68b888
mov eax, dword [esp + 0x40]
fstp st(2)
mov edx, dword [esp + 0x44]
fstp st(0)
add dword [esp + 0x28], 0x9c
fstp st(0)
mov dword [esi + ebx], eax
fstp st(0)
fld dword [esp + 0x10]
mov dword [esi + ebx + 4], edx
mov eax, dword [ecx + 0x1c]
mov edx, dword [esp + 0x48]
fstp dword [eax + esi + 8]
mov eax, dword [ecx + 0x1c]
fld dword [esp + 0x14]
mov dword [eax + edi], edx
mov edx, dword [esp + 0x4c]
mov dword [eax + edi + 4], edx
mov eax, dword [ecx + 0x1c]
fstp dword [eax + edi + 8]
mov eax, dword [esp + 0x2c]
inc eax
cmp eax, dword [ecx + 0x30]
mov dword [esp + 0x2c], eax
jl 0x68b3c0
pop edi
pop esi
pop ebp
pop ebx
add esp, 0x70
ret