Function at 0x67c530
Capabilities:
Resolve function by parsing pe exports

Disassembly:
sub esp, 0xa0
mov eax, dword [esp + 0xa4]
fld dword [ecx + 0xb4]
fmul dword [eax + 4]
xor eax, eax
cmp dword [ecx + 0x98], eax
mov dword [esp + 0x94], ecx
fstp dword [esp + 0x4c]
mov dword [esp + 0x14], eax
jle 0x67c8eb
fld qword [0x779678]
push ebx
push ebp
push esi
mov dword [esp + 0x14], eax
push edi
mov eax, dword [ecx + 0xa0]
add eax, dword [esp + 0x18]
test byte [eax + 0xc], 0x10
je 0x67c8cb
mov edi, dword [eax + 4]
mov edx, dword [eax]
mov ebx, dword [eax + 8]
lea esi, [edx*8]
mov edx, dword [ecx + 0x38]
add edi, edi
add edi, edi
add edi, edi
fld dword [edi + edx]
add ebx, ebx
fadd dword [edx + esi]
add ebx, ebx
add ebx, ebx
lea ecx, [ebx + edx + 4]
fstp dword [esp + 0x4c]
mov dword [esp + 0x40], ecx
fld dword [edi + edx + 4]
fadd dword [edx + esi + 4]
fstp dword [esp + 0x50]
fld dword [ebx + edx]
fadd dword [esp + 0x4c]
fstp dword [esp + 0x94]
fld dword [esp + 0x50]
fadd dword [ecx]
fstp dword [esp + 0x98]
fld dword [esp + 0x94]
fmul st(1)
fstp dword [esp + 0x28]
fmul dword [esp + 0x98]
fstp dword [esp + 0x2c]
fld dword [eax + 0x1c]
fmul dword [edi + edx + 4]
fld dword [edi + edx]
fmul dword [eax + 0x20]
fsubp st(1)
fstp dword [esp + 0x10]
fld dword [esp + 0x10]
fld dword [eax + 0x14]
fmul dword [edx + esi + 4]
fld dword [edx + esi]
fmul dword [eax + 0x18]
fsubp st(1)
fstp dword [esp + 0x10]
fadd dword [esp + 0x10]
fld dword [eax + 0x24]
fmul dword [ecx]
fld dword [ebx + edx]
fmul dword [eax + 0x28]
fsubp st(1)
fstp dword [esp + 0x10]
fadd dword [esp + 0x10]
fstp dword [esp + 0x1c]
fld dword [eax + 0x20]
fmul dword [edi + edx + 4]
fld dword [edi + edx]
fmul dword [eax + 0x1c]
faddp st(1)
fstp dword [esp + 0x10]
fld dword [esp + 0x10]
fld dword [edx + esi]
fmul dword [eax + 0x14]
fld dword [eax + 0x18]
fmul dword [edx + esi + 4]
faddp st(1)
fstp dword [esp + 0x10]
fadd dword [esp + 0x10]
fld dword [eax + 0x28]
fmul dword [ecx]
fld dword [ebx + edx]
fmul dword [eax + 0x24]
faddp st(1)
fstp dword [esp + 0x10]
fadd dword [esp + 0x10]
fstp dword [esp + 0x20]
fld dword [esp + 0x20]
fld st(0)
fld dword [esp + 0x1c]
fld st(0)
fmul st(0), st(0)
fld st(2)
fmulp st(3)
faddp st(2)
mov ebp, 0x5f3759df
fxch st(1)
fstp dword [esp + 0x10]
fld dword [esp + 0x10]
fst dword [esp + 0x78]
fmul qword [0x6d8950]
mov ecx, dword [esp + 0x78]
sar ecx, 1
sub ebp, ecx
fstp dword [esp + 0x14]
mov dword [esp + 0x10], ebp
fld dword [esp + 0x14]
mov ecx, dword [esp + 0xa4]
fld dword [esp + 0x10]
mov ebp, dword [ecx + 0x40]
fld st(0)
add ebp, esi
fmulp st(2)
fld st(0)
fmulp st(2)
fld qword [0x763bb0]
fsubrp st(2)
fmulp st(1)
fstp dword [esp + 0x14]
fld dword [esp + 0x14]
fld st(0)
fmulp st(2)
fxch st(1)
fstp dword [esp + 0x1c]
fmulp st(1)
fstp dword [esp + 0x20]
fld dword [eax + 0x10]
fmul dword [esp + 0x5c]
fstp dword [esp + 0x14]
fld dword [edx + esi]
fld dword [esp + 0x28]
fld st(0)
fsubp st(2)
fxch st(1)
fstp dword [esp + 0x68]
fld dword [edx + esi + 4]
fld dword [esp + 0x2c]
fld st(0)
fsubp st(2)
fxch st(1)
fstp dword [esp + 0x6c]
fld dword [eax + 0x14]
fld dword [esp + 0x20]
fld st(0)
fmulp st(2)
fld dword [eax + 0x18]
fld dword [esp + 0x1c]
fld st(0)
fmulp st(2)
fxch st(3)
fsubrp st(1)
fstp dword [esp + 0x84]
fld dword [eax + 0x18]
fmul st(1)
fld dword [eax + 0x14]
fmul st(3)
faddp st(1)
fstp dword [esp + 0x88]
fld dword [esp + 0x84]
fsub dword [esp + 0x68]
fstp dword [esp + 0x30]
fld dword [esp + 0x88]
fsub dword [esp + 0x6c]
fstp dword [esp + 0x34]
fld dword [esp + 0x30]
fld dword [esp + 0x14]
fld st(0)
fmulp st(2)
fxch st(1)
fstp dword [esp + 0x38]
fld dword [esp + 0x34]
fmul st(1)
fstp dword [esp + 0x3c]
fld dword [ebp]
fadd dword [esp + 0x38]
fstp dword [ebp]
fld dword [ebp + 4]
fadd dword [esp + 0x3c]
fstp dword [ebp + 4]
mov esi, dword [ecx + 0x40]
fld dword [edi + edx]
add esi, edi
fsub st(5)
fstp dword [esp + 0x54]
fld dword [edi + edx + 4]
fsub st(4)
fstp dword [esp + 0x58]
fld dword [eax + 0x1c]
fmul st(2)
fld dword [eax + 0x20]
fmul st(4)
fsubp st(1)
fstp dword [esp + 0x44]
fld dword [eax + 0x20]
fmul st(2)
fld dword [eax + 0x1c]
fmul st(4)
faddp st(1)
fstp dword [esp + 0x48]
fld dword [esp + 0x44]
fsub dword [esp + 0x54]
fstp dword [esp + 0x60]
fld dword [esp + 0x48]
fsub dword [esp + 0x58]
fstp dword [esp + 0x64]
fld dword [esp + 0x60]
fmul st(1)
fstp dword [esp + 0x70]
fld dword [esp + 0x64]
fmul st(1)
fstp dword [esp + 0x74]
fld dword [esi]
fadd dword [esp + 0x70]
fstp dword [esi]
fld dword [esp + 0x74]
fadd dword [esi + 4]
fstp dword [esi + 4]
fld dword [ebx + edx]
mov edx, dword [esp + 0x40]
fsubrp st(5)
fxch st(4)
fstp dword [esp + 0x8c]
fld dword [edx]
fsubrp st(3)
fxch st(2)
fstp dword [esp + 0x90]
fld dword [eax + 0x24]
fmul st(2)
fld dword [eax + 0x28]
fmul st(2)
fsubp st(1)
fstp dword [esp + 0x7c]
fld dword [eax + 0x28]
fmulp st(2)
fmul dword [eax + 0x24]
mov eax, dword [ecx + 0x40]
add eax, ebx
faddp st(1)
fstp dword [esp + 0x80]
fld dword [esp + 0x7c]
fsub dword [esp + 0x8c]
fstp dword [esp + 0x9c]
fld dword [esp + 0x80]
fsub dword [esp + 0x90]
fstp dword [esp + 0xa0]
fld dword [esp + 0x9c]
fmul st(1)
fstp dword [esp + 0xa8]
fmul dword [esp + 0xa0]
fstp dword [esp + 0xac]
fld dword [eax]
fadd dword [esp + 0xa8]
fstp dword [eax]
fld dword [eax + 4]
fadd dword [esp + 0xac]
fstp dword [eax + 4]
fld qword [0x779678]
mov eax, dword [esp + 0x24]
add dword [esp + 0x18], 0x3c
inc eax
cmp eax, dword [ecx + 0x98]
mov dword [esp + 0x24], eax
jl 0x67c571
pop edi
fstp st(0)
pop esi
pop ebp
pop ebx
add esp, 0xa0
ret 4