Function at 0x4edde0
Capabilities:
Resolve function by parsing pe exports

Disassembly:
sub esp, 0x8c
push ebx
push ebp
mov ebp, dword [esp + 0xa8]
push esi
push edi
mov ecx, 8
mov eax, dword [ebp + 0x14]
lea edi, [esp + 0x7c]
mov dword [esp + 0x10], eax
mov eax, dword [esp + 0xa4]
mov esi, eax
rep movsd dword es:[edi], dword [esi]
mov ecx, dword [esp + 0xa8]
mov ebx, dword [eax + ecx*4 + 0x10]
mov edi, dword [eax + ecx*4]
mov eax, ebx
sub eax, edi
cmp eax, 1
jle 0x4edff0
xor edx, edx
mov dword [esp + 0x6c], edx
mov dword [esp + 0x70], edx
mov dword [esp + 0x74], edx
mov dword [esp + 0x78], edx
jmp 0x4ede42
mov ecx, dword [esp + 0xa8]
sar eax, 1
add eax, edi
lea edx, [esp + 0x7c]
mov esi, eax
mov eax, dword [0x8193d8]
mov dword [esp + ecx*4 + 0x8c], esi
lea ecx, [esp + 0x14]
push ecx
push edx
mov edx, dword [esp + 0xa8]
lea ecx, [esp + 0x74]
push eax
push ecx
push edx
mov byte [esp + 0x40], 0
mov dword [esp + 0x28], 0
mov dword [esp + 0x2c], 0
mov dword [esp + 0x30], 0
mov dword [esp + 0x34], 0
mov dword [esp + 0x38], 0
mov dword [esp + 0x3c], 0
call fcn.004edae0
fld dword [ebp]
fsub dword [esp + 0x28]
add esp, 0x14
fstp dword [esp + 0x40]
fld dword [ebp + 4]
fsub dword [esp + 0x18]
fstp dword [esp + 0x44]
fld dword [ebp + 8]
fsub dword [esp + 0x1c]
fstp dword [esp + 0x48]
fld dword [ebp + 0xc]
fsub dword [esp + 0x20]
fstp dword [esp + 0x4c]
fld dword [ebp + 0x10]
fsub dword [esp + 0x24]
fstp dword [esp + 0x50]
fld dword [ebp + 0x14]
fsub dword [esp + 0x28]
fld dword [esp + 0x40]
fcomp dword [0x5303b8]
fnstsw ax
and eax, 0x4100
jne 0x4edfb7
fld dword [esp + 0x14]
fcomp dword [0x5303b8]
fnstsw ax
and eax, 0x4100
jne 0x4edfb7
fld dword [0x5303b4]
fdiv dword [esp + 0x14]
fld dword [0x5303b4]
fdiv dword [esp + 0x40]
fld dword [esp + 0x18]
fmul st(2)
fld dword [esp + 0x1c]
fmul st(3)
fld dword [esp + 0x20]
fmul st(4)
fstp dword [esp + 0x38]
fld dword [esp + 0x24]
fmul st(4)
fstp dword [esp + 0x3c]
fld dword [esp + 0x44]
fmul st(3)
fld dword [esp + 0x48]
fmul st(4)
fstp dword [esp + 0x60]
fld dword [esp + 0x4c]
fmul st(4)
fstp dword [esp + 0x64]
fld dword [esp + 0x50]
fmul st(4)
fstp dword [esp + 0x68]
fxch st(2)
fsub st(2)
fstp dword [esp + 0x30]
fstp st(1)
fsub dword [esp + 0x60]
fld dword [esp + 0x38]
fsub dword [esp + 0x64]
fld dword [esp + 0x3c]
fsub dword [esp + 0x68]
fld st(0)
fmul st(1)
fld st(2)
fmul st(3)
faddp st(1)
fld st(3)
fmul st(4)
faddp st(1)
fld dword [esp + 0x30]
fmul dword [esp + 0x30]
faddp st(1)
fxch st(4)
fadd st(5)
fdivp st(4)
fxch st(3)
fsubp st(5)
fstp st(2)
fstp st(1)
fstp st(0)
fstp st(0)
fld dword [esp + 0x14]
fcomp dword [0x5303b8]
fnstsw ax
test ah, 0x44
jp 0x4edfce
fstp st(0)
mov edi, esi
jmp 0x4edfe3
fld dword [esp + 0x40]
fcomp dword [0x5303b8]
fnstsw ax
test ah, 0x44
jp 0x4edfff
fstp st(0)
mov ebx, esi
mov eax, ebx
sub eax, edi
cmp eax, 1
jg 0x4ede3b
fld dword [esp + 0x10]
pop edi
pop esi
pop ebp
pop ebx
add esp, 0x8c
ret
fld dword [esp + 0x28]
fadd st(1)
fcom dword [esp + 0x10]
fnstsw ax
test ah, 5
jp 0x4ee02e
mov eax, dword [esp + 0xa8]
mov edx, dword [esp + 0xac]
fstp dword [esp + 0x10]
mov ecx, dword [esp + eax*4 + 0x8c]
mov dword [edx + eax*4], ecx
jmp 0x4ee030
fstp st(0)
fld dword [esp + 0x28]
fcompp
fnstsw ax
test ah, 5
jp 0x4edfe1
mov edi, esi
jmp 0x4edfe3