Function at 0x483970
Capabilities:
Resolve function by parsing pe exports

Disassembly:
push ebp
mov ebp, esp
and esp, 0xfffffff0
sub esp, 0x144
fldz
push ebx
push esi
push edi
mov edi, dword [ebp + 0x14]
movzx ebx, word [edi + 2]
mov eax, ebx
shl eax, 6
lea edx, [ebx + ebx*2]
shl edx, 4
lea ecx, [eax + edi + 0x14]
lea eax, [edx + edi + 0x10]
mov edx, ebx
shl edx, 4
sub edx, ebx
test ebx, ebx
lea esi, [edi + edx*4 + 0x14]
mov dword [esp + 0xb8], ebx
mov dword [esp + 0xb0], ecx
fst dword [esi - 4]
mov dword [esp + 0xbc], eax
mov dword [esp + 0x4c], esi
jle 0x483e6a
sub ecx, esi
mov dword [esp + 0x1c], eax
lea edx, [edi + 0x28]
mov dword [esp + 0xb4], ecx
mov dword [esp + 0x18], ebx
jmp 0x4839e7
mov ecx, dword [esp + 0xb4]
mov eax, dword [ecx + esi]
fld dword [edi + 8]
fstp dword [esp + 0x14]
mov ebx, dword [ebp + 0x10]
fld dword [eax + ebx + 0x10]
add eax, ebx
fsub dword [eax + 0x40]
mov ecx, dword [ecx + esi + 4]
add ecx, ebx
fstp dword [esp + 0x140]
fld dword [eax + 0x14]
fsub dword [eax + 0x44]
fstp dword [esp + 0x144]
fld dword [eax + 0x18]
fsub dword [eax + 0x48]
fstp dword [esp + 0x148]
fld dword [eax + 0x20]
fsub dword [eax + 0x50]
fstp dword [esp + 0x100]
fld dword [eax + 0x24]
fsub dword [eax + 0x54]
fstp dword [esp + 0x104]
fld dword [eax + 0x28]
fsub dword [eax + 0x58]
fstp dword [esp + 0x108]
fld dword [ecx + 0x10]
fsub dword [ecx + 0x40]
fstp dword [esp + 0x120]
fld dword [ecx + 0x14]
fsub dword [ecx + 0x44]
fstp dword [esp + 0x124]
fld dword [ecx + 0x18]
fsub dword [ecx + 0x48]
fstp dword [esp + 0x128]
fld dword [ecx + 0x20]
fsub dword [ecx + 0x50]
fstp dword [esp + 0x130]
fld dword [ecx + 0x24]
fsub dword [ecx + 0x54]
fstp dword [esp + 0x134]
fld dword [ecx + 0x28]
fsub dword [ecx + 0x58]
fstp dword [esp + 0x138]
fld dword [esp + 0x140]
fsub dword [esp + 0x120]
fstp dword [esp + 0x30]
fld dword [esp + 0x144]
fsub dword [esp + 0x124]
fstp dword [esp + 0x34]
fld dword [esp + 0x148]
fsub dword [esp + 0x128]
fstp dword [esp + 0x38]
fld dword [esp + 0x100]
fmul dword [edx - 8]
fstp dword [esp + 0x20]
fld dword [esp + 0x104]
fmul dword [edx - 4]
fstp dword [esp + 0x24]
fld dword [esp + 0x108]
fmul dword [edx]
fstp dword [esp + 0x28]
fld dword [esp + 0x130]
fmul dword [edx + 8]
fstp dword [esp + 0x110]
fld dword [esp + 0x134]
fmul dword [edx + 0xc]
fstp dword [esp + 0x114]
fld dword [esp + 0x138]
fmul dword [edx + 0x10]
fstp dword [esp + 0x118]
fld dword [esp + 0x30]
fmul dword [edx - 0x18]
fstp dword [esp + 0x30]
fld dword [esp + 0x34]
fmul dword [edx - 0x14]
fstp dword [esp + 0x34]
fld dword [esp + 0x38]
fmul dword [edx - 0x10]
fstp dword [esp + 0x38]
fld dword [esp + 0x110]
fadd dword [esp + 0x20]
fstp dword [esp + 0x20]
mov ebx, dword [eax + 0x40]
fld dword [esp + 0x114]
mov dword [esp + 0xf0], ebx
fadd dword [esp + 0x24]
mov ebx, dword [eax + 0x44]
mov dword [esp + 0xf4], ebx
mov ebx, dword [eax + 0x48]
fstp dword [esp + 0x24]
mov dword [esp + 0xf8], ebx
fld dword [esp + 0x118]
mov ebx, dword [eax + 0x4c]
fadd dword [esp + 0x28]
mov dword [esp + 0xfc], ebx
mov ebx, dword [eax + 0x50]
mov dword [esp + 0xe0], ebx
fstp dword [esp + 0x28]
mov ebx, dword [eax + 0x54]
fld dword [esp + 0x20]
mov dword [esp + 0xe4], ebx
fadd dword [esp + 0x30]
mov ebx, dword [eax + 0x58]
mov eax, dword [eax + 0x5c]
mov dword [esp + 0xec], eax
fstp dword [esp + 0xa0]
mov eax, dword [ecx + 0x40]
fld dword [esp + 0x24]
mov dword [esp + 0xc0], eax
fadd dword [esp + 0x34]
mov eax, dword [ecx + 0x44]
mov dword [esp + 0xc4], eax
mov eax, dword [ecx + 0x48]
fstp dword [esp + 0xa4]
mov dword [esp + 0xc8], eax
fld dword [esp + 0x28]
mov eax, dword [ecx + 0x4c]
fadd dword [esp + 0x38]
mov dword [esp + 0xe8], ebx
mov dword [esp + 0xcc], eax
mov eax, dword [ecx + 0x50]
fstp dword [esp + 0xa8]
mov dword [esp + 0xd0], eax
fld dword [esp + 0xf0]
mov eax, dword [ecx + 0x54]
fsub dword [esp + 0xc0]
mov dword [esp + 0xd4], eax
mov eax, dword [ecx + 0x58]
mov ecx, dword [ecx + 0x5c]
fstp dword [esp + 0x60]
mov dword [esp + 0xd8], eax
fld dword [esp + 0xf4]
mov dword [esp + 0xdc], ecx
fsub dword [esp + 0xc4]
fstp dword [esp + 0x64]
fld dword [esp + 0xf8]
fsub dword [esp + 0xc8]
fstp dword [esp + 0x68]
fld dword [esp + 0xe0]
fmul dword [edx - 8]
fstp dword [esp + 0x80]
fld dword [esp + 0xe4]
fmul dword [edx - 4]
fstp dword [esp + 0x84]
fld dword [esp + 0xe8]
fmul dword [edx]
fstp dword [esp + 0x88]
fld dword [esp + 0xd0]
fmul dword [edx + 8]
fstp dword [esp + 0x90]
fld dword [esp + 0xd4]
fmul dword [edx + 0xc]
fstp dword [esp + 0x94]
fld dword [esp + 0xd8]
fmul dword [edx + 0x10]
fstp dword [esp + 0x98]
fld dword [esp + 0x60]
fmul dword [edx - 0x18]
fstp dword [esp + 0x60]
fld dword [esp + 0x64]
fmul dword [edx - 0x14]
fstp dword [esp + 0x64]
fld dword [esp + 0x68]
mov eax, dword [ebp + 8]
fmul dword [edx - 0x10]
add edx, 0x30
add esi, 4
fstp dword [esp + 0x68]
fld dword [esp + 0x90]
fadd dword [esp + 0x80]
fstp dword [esp + 0x80]
fld dword [esp + 0x94]
fadd dword [esp + 0x84]
fstp dword [esp + 0x84]
fld dword [esp + 0x98]
fadd dword [esp + 0x88]
fstp dword [esp + 0x88]
fld dword [esp + 0x80]
fadd dword [esp + 0x60]
fstp dword [esp + 0x50]
fld dword [esp + 0x84]
fadd dword [esp + 0x64]
fstp dword [esp + 0x54]
fld dword [esp + 0x88]
fadd dword [esp + 0x68]
fstp dword [esp + 0x58]
fld dword [eax + 0x40]
mov eax, dword [esp + 0x1c]
fld dword [esp + 0x14]
add eax, 0xc
sub dword [esp + 0x18], 1
fld st(0)
fmulp st(2)
mov dword [esp + 0x1c], eax
fxch st(1)
fstp dword [esp + 0x14]
fld dword [esp + 0x50]
fld dword [esp + 0x14]
fld st(0)
fmulp st(2)
fxch st(1)
fstp dword [esp + 0x50]
fld dword [esp + 0x54]
fmul st(1)
fstp dword [esp + 0x54]
fmul dword [esp + 0x58]
fstp dword [esp + 0x58]
fld dword [edi + 0xc]
fstp dword [esp + 0x14]
fld dword [esp + 0x14]
fld st(0)
fmul dword [esp + 0xa0]
fstp dword [esp + 0xa0]
fld dword [esp + 0xa4]
fmul st(1)
fstp dword [esp + 0xa4]
fmul dword [esp + 0xa8]
fstp dword [esp + 0xa8]
fld dword [esp + 0x50]
fadd dword [esp + 0xa0]
fstp dword [esp + 0x70]
fld dword [esp + 0x54]
fadd dword [esp + 0xa4]
fstp dword [esp + 0x74]
fld dword [esp + 0x58]
fadd dword [esp + 0xa8]
fstp dword [esp + 0x78]
fmul dword [edx - 0x3c]
fld dword [esp + 0x74]
fadd dword [esp + 0x70]
fadd dword [esp + 0x78]
fstp dword [esp + 0x14]
fsub dword [esp + 0x14]
fstp dword [esp + 0x14]
fld dword [esp + 0x14]
fld dword [esi - 8]
fmul dword [eax - 0xc]
fsubp st(1)
fdiv dword [eax - 8]
fstp dword [esi - 4]
jne 0x4839e0
mov ebx, dword [esp + 0xb8]
mov eax, dword [esp + 0xbc]
mov ecx, dword [esp + 0xb0]
add ebx, 0xffffffff
fstp dword [esp + 0x18]
js 0x48403b
fld dword [esp + 0x18]
lea edx, [ebx + ebx*2]
lea eax, [eax + edx*4 + 8]
lea edx, [ebx + ebx*2]
mov dword [esp + 0x1c], eax
mov eax, dword [esp + 0x4c]
shl edx, 4
lea edx, [edx + edi + 0x28]
mov edi, dword [ebp + 0x18]
sub eax, ecx
lea esi, [ecx + ebx*4]
mov dword [esp + 0x4c], eax
sub edi, ecx
jmp 0x483ea8
mov eax, dword [esp + 0x4c]
fld dword [eax + esi]
mov eax, dword [esp + 0x1c]
fld dword [eax]
mov eax, dword [esi]
fmulp st(2)
add eax, dword [ebp + 0x10]
mov ecx, dword [esi + 4]
add ecx, dword [ebp + 0x10]
fsubrp st(1)
fstp dword [esp + 0x18]
fld dword [eax + 0x30]
fld dword [esp + 0x18]
fld st(0)
fmulp st(2)
fxch st(1)
fstp dword [esp + 0x30]
fld dword [eax + 0x34]
fmul st(1)
fstp dword [esp + 0x34]
fld dword [eax + 0x38]
fmul st(1)
fstp dword [esp + 0x38]
fld dword [eax + 0x3c]
fmul st(1)
fstp dword [esp + 0x3c]
fld dword [ecx + 0x30]
fmul st(1)
fstp dword [esp + 0x20]
fld dword [ecx + 0x34]
fmul st(1)
fstp dword [esp + 0x24]
fld dword [ecx + 0x38]
fmul st(1)
fstp dword [esp + 0x28]
fld dword [ecx + 0x3c]
fmul st(1)
fstp dword [esp + 0x2c]
fld dword [esp + 0x3c]
fld st(0)
fmul dword [edx - 0x18]
fstp dword [esp + 0x70]
fld st(0)
fmul dword [edx - 0x14]
fstp dword [esp + 0x74]
fmul dword [edx - 0x10]
fstp dword [esp + 0x78]
fld dword [esp + 0x2c]
fld st(0)
fmul dword [edx - 0x18]
fstp dword [esp + 0x90]
fld st(0)
fmul dword [edx - 0x14]
fstp dword [esp + 0x94]
fmul dword [edx - 0x10]
fstp dword [esp + 0x98]
fld dword [eax + 0x10]
fadd dword [esp + 0x70]
fstp dword [eax + 0x10]
fld dword [eax + 0x14]
fadd dword [esp + 0x74]
fstp dword [eax + 0x14]
fld dword [esp + 0x78]
fadd dword [eax + 0x18]
fstp dword [eax + 0x18]
fld dword [ecx + 0x10]
fsub dword [esp + 0x90]
fstp dword [ecx + 0x10]
fld dword [ecx + 0x14]
fsub dword [esp + 0x94]
fstp dword [ecx + 0x14]
fld dword [ecx + 0x18]
fsub dword [esp + 0x98]
fstp dword [ecx + 0x18]
fld dword [edx - 8]
fmul dword [esp + 0x30]
fstp dword [esp + 0x30]
fld dword [edx - 4]
fmul dword [esp + 0x34]
fstp dword [esp + 0x34]
fld dword [esp + 0x38]
fmul dword [edx]
fstp dword [esp + 0x38]
sub dword [esp + 0x1c], 0xc
fld dword [edx + 8]
sub ebx, 1
fmul dword [esp + 0x20]
sub esi, 4
sub edx, 0x30
test ebx, ebx
fstp dword [esp + 0x20]
fld dword [edx + 0x3c]
fmul dword [esp + 0x24]
fstp dword [esp + 0x24]
fld dword [edx + 0x40]
fmul dword [esp + 0x28]
fstp dword [esp + 0x28]
fld dword [eax + 0x20]
fadd dword [esp + 0x30]
fstp dword [eax + 0x20]
fld dword [esp + 0x34]
fadd dword [eax + 0x24]
fstp dword [eax + 0x24]
fld dword [eax + 0x28]
fadd dword [esp + 0x38]
fstp dword [eax + 0x28]
fld dword [ecx + 0x20]
fadd dword [esp + 0x20]
fstp dword [ecx + 0x20]
fld dword [ecx + 0x24]
fadd dword [esp + 0x24]
fstp dword [ecx + 0x24]
fld dword [esp + 0x28]
fadd dword [ecx + 0x28]
fstp dword [ecx + 0x28]
fld st(0)
fadd dword [edi + esi + 4]
fstp dword [edi + esi + 4]
jge 0x483ea4
fstp st(0)
pop edi
pop esi
pop ebx
mov esp, ebp
pop ebp
ret