Ultra Low Power Electronics and Design Ultra Low Power Design: Device and Logic Design Approaches On Chip Optical Interconnect for Low Power Nanotechnologies for Low Power Static Leakage Reduction through Simulteneous VTT TOX and State Assignment Energy Efficient Shared Memory Architectures for Multi Processor Systems On Chip Tuning Caches to Applications for Low Energy Embedded Systems Reducing Energy Consumption in Chip Multiprocessors Using Workload Variations Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia Processing Source Level Models for Software Power Optimization Transmittance Scaling for Reducing Power Dissipation of a Backlit TFT LCD Power Aware Network Swapping for Wireless Palmtop PCS Energy Efficient Network On Chip Design System Level Power Modeling and Simulation of High End Industrial Network On Chip Energy Aware Adaptations for End to End Videostreaming to Mobile Handheld Devices. Power consumption is a key limitation in many high speed and high data rate electronic systems today ranging from mobile telecom to portable and desktop computing systems especially when moving to nanometer technologies. Ultra Low Power Electronics and Design offers to the reader the unique opportunity of accessing in an easy and integrated fashion a mix of tutorial material and advanced research results contributed by leading scientists from academia and industry covering the most hot and up to date issues in the field of the design of ultra low power devices systems and applications.