VLSI SoC : new technology enabler : 27th IFIP WG 10.5 IEEE International Conference on Very Large Scale Integration VLSI SoC 2019 Cusco Peru October 6 9 2019 : revised and extended selected papers Software Based Self Test for Delay Faults On Test Generation for Microprocessors for Extended Class of Functional Faults Robust FinFET Schmitt Trigger Designs for Low Power Applications An Improved Technique for Logic Gate Susceptibility Evaluation of Single Event Transient Faults Process Variability Impact on the SET Response of FinFET Multi level Design Efficient Soft Error Vulnerability Analysis Using Non Intrusive Fault Injection Techniques A Statistical Wafer Scale Error and Redundancy Analysis Simulator Hardware enabled Secure Firmware Updates in Embedded Systems Reliability Enhanced Digital Low Dropout Regulator with Improved Transient Performance Security Aspects of Real time MPSoCs: The Flaws and Opportunities of Preemptive NoCs Offset Compensation Systems for Multi Gbit s Optical Receivers Accelerating Inference on Binary Neural Networks with Digital RRAM Processing Semi and Fully Random Access LUTs for Smooth Functions A Predictive Process Design Kit for Three Independent Gate Field Effect Transistors Exploiting Heterogeneous Mobile Architectures through a Unified Runtime Framework. This book contains extended and revised versions of the best papers presented at the 27th IFIP WG 10.5 IEEE International Conference on Very Large Scale Integration VLSI SoC 2019 held in Cusco Peru in October 2019. The 15 full papers included in this volume were carefully reviewed and selected from the 28 papers (out of 82 submissions) presented at the conference. The papers discuss the latest academic and industrial results and developments as well as future trends in the field of System on Chip (SoC) design considering the challenges of nano scale state of the art and emerging manufacturing technologies. In particular they address cutting edge research fields like heterogeneous neuromorphic and brain inspired biologically inspired approximate computing systems