jiebi/CodeConvo huggingface dataset:
Code change:
pass if WITH_CUDA: <del> if platform.system() == 'Darwin': cuda_path = '/Developer/NVIDIA/CUDA-7.5' cuda_include_path = cuda_path + '/include' cuda_lib_path = cuda_path + '/lib' else: cuda_path = '/usr/local/cuda' cuda_include_path = cuda_path + '/include' cuda_lib_path = cuda_path + '/lib64' </del> <ins> cuda_lib_dirs = ['lib64', 'lib'] cuda_include_path = os.path.join(CUDA_HOME, 'include') for lib_dir in cuda_lib_dirs: cuda_lib_path = os.path.join(CUDA_HOME, lib_dir) if os.path.exists(cuda_lib_path): break </ins> include_dirs.append(cuda_include_path) extra_link_args.append('-L' + cuda_lib_path) extra_link_args.append('-Wl,-rpath,' + cuda_lib_path) extra_compile_args += ['-DWITH_CUDA'] <ins> extra_compile_args += ['-DCUDA_LIB_PATH=' + cuda_lib_path] </ins> main_libraries += ['THC'] main_sources += [ "torch/csrc/cuda/Module.cpp",

Related discussion:
text: right now if is not in LDLIBRARYPATH, though it was found at compile-time, these lines will fail: Avoid this, by idk doing something... I think i have a few good ideas.
We need to add /usr/local/cuda/lib64 (or that's mac dir) to the rpath of _C
the problem i dont think is to add it to rpath, it's because we
Right. We could try with the default cuda installation path if it's not found from LDLIBRARYPATH.
Actually, do we really want to use the compile path? We should try to detect it at runtime, right? Or are we going to ship CUDA libs in our binaries?
we first load using runtime paths, and if it fails, fallback to path known at compile time.
I fear this is going to get brittle, especially if you are shipping CUDA libs. e.g. a user swaps HW and picks up a new driver and/or toolkit. As says, I'm pretty sure you want to use the runtime paths. Similarly, CUDA 7.5 won't run on Pascal and we have a cudnn built for 7.5 that will not do the right thing on CUDA 8, so those need to go together. If a user installs the CUDA bits via deb/rpm the right things are supposed to happen. If you push bits, we need to figure out how to make sure things line up. But this is perhaps a much larger packaging conversation.
Yeah, I've implemented it to first try loading it without any path and then try and . I'll push the commit tomorrow.
Code change:
loss(x, y) = sum_ij(max(0, 1 - (x[y[j]] - x[i]))) / x.size(0) where `i == 0` to `x.size(0)`, `j == 0` to `y.size(0)`, <del> `y[j] != 0`, and `i != y[j]` for all `i` and `j`. </del> <ins> `y[j] >= 0`, and `i != y[j]` for all `i` and `j`. </ins> `y` and `x` must have the same size.

Related discussion:
text: The SDPA tutorial is failing for in Google Colab when run with "CPU" only as the h/w accelerator. The tutorial has a note "If you don’t have a GPU and are running on CPU then the context manager will have no effect and all three runs should return similar timings." however things fail when run on CPU only. Code: Error: Collecting environment information. PyTorch version: 2.1.0+cu118 Is debug build: False CUDA used to build PyTorch: 11.8 ROCM used to build PyTorch: N/A OS: Ubuntu 22.04.2 LTS (x8664) GCC version: (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0 Clang version: 14.0.0-1ubuntu1.1 CMake version: version 3.27.7 Libc version: glibc-2.35 Python version: 3.10.12 (main, Jun 11 2023, 05:26:28) [GCC 11.4.0] (64-bit runtime) Python platform: Linux-5.15.120+-x8664-with-glibc2.35 Is CUDA available: False CUDA runtime version: 11.8.89 CUDAMODULELOADING set to: N/A GPU models and configuration: Could not collect Nvidia driver version: Could not collect cuDNN version: Probably one of the following: /usr/lib/x8664-linux- /usr/lib/x8664-linux- /usr/lib/x8664-linux- /usr/lib/x8664-linux- /usr/lib/x8664-linux- /usr/lib/x8664-linux- /usr/lib/x8664-linux- HIP runtime version: N/A MIOpen runtime version: N/A Is XNNPACK available: True CPU: Architecture: x8664 CPU op-mode(s): 32-bit, 64-bit Address sizes: 46 bits physical, 48 bits virtual Byte Order: Little Endian CPU(s): 2 On-line CPU(s) list: 0,1 Vendor ID: GenuineIntel Model name: Intel(R) Xeon(R) CPU @ 2.
Code change:
loss(x, y) = sum_ij(max(0, 1 - (x[y[j]] - x[i]))) / x.size(0) where `i == 0` to `x.size(0)`, `j == 0` to `y.size(0)`, <del> `y[j] != 0`, and `i != y[j]` for all `i` and `j`. </del> <ins> `y[j] >= 0`, and `i != y[j]` for all `i` and `j`. </ins> `y` and `x` must have the same size.

Related discussion:
text: 20GHz CPU family: 6 Model: 79 Thread(s) per core: 2 Core(s) per socket: 1 Socket(s): 1 Stepping: 0 BogoMIPS: 4399.99 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ss ht syscall nx pdpe1gb rdtscp lm constanttsc repgood nopl xtopology nonstoptsc cpuid tscknownfreq pni pclmulqdq ssse3 fma cx16 pcid sse41 sse42 x2apic movbe popcnt aes xsave avx f16c rdrand hypervisor lahflm abm 3dnowprefetch invpcidsingle ssbd ibrs ibpb stibp fsgsbase tscadjust bmi1 hle avx2 smep bmi2 erms invpcid rtm rdseed adx smap xsaveopt arat mdclear archcapabilities Hypervisor vendor: KVM Virtualization type: full L1d cache: 32 KiB (1 instance) L1i cache: 32 KiB (1 instance) L2 cache: 256 KiB (1 instance) L3 cache: 55 MiB (1 instance) NUMA node(s): 1 NUMA node0 CPU(s): 0,1 Vulnerability Itlb multihit: Not affected Vulnerability L1tf: Mitigation; PTE Inversion Vulnerability Mds: Vulnerable; SMT Host state unknown Vulnerability Meltdown: Vulnerable Vulnerability Mmio stale data: Vulnerable Vulnerability Retbleed: Vulnerable Vulnerability Spec store bypass: Vulnerable Vulnerability Spectre v1: Vulnerable: __user pointer sanitization and usercopy barriers only; no swapgs barriers Vulnerability Spectre v2: Vulnerable, IBPB: disabled, STIBP: disabled, PBRSB-eIBRS: Not affected Vulnerability Srbds: Not affected Vulnerability Tsx async abort: Vulnerable Versions of relevant libraries: [pip3] numpy==1.23.5 [pip3] torch==2.1.0+cu118 [pip3] torchaudio==2.1.
Code change:
loss(x, y) = sum_ij(max(0, 1 - (x[y[j]] - x[i]))) / x.size(0) where `i == 0` to `x.size(0)`, `j == 0` to `y.size(0)`, <del> `y[j] != 0`, and `i != y[j]` for all `i` and `j`. </del> <ins> `y[j] >= 0`, and `i != y[j]` for all `i` and `j`. </ins> `y` and `x` must have the same size.

Related discussion:
text: 0+cu118 [pip3] torchdata==0.7.0 [pip3] torchsummary==1.5.1 [pip3] torchtext==0.16.0 [pip3] torchvision==0.16.0+cu118 [pip3] triton==2.1.0 [conda] Could not collect cc: cc
This operator has not been implemented for . We will push a PR to update the tutorial.
Code change:
Alternatively, go to: https://pytorch.org/binaries to install a PyTorch version that has been compiled with your version of the CUDA driver.""".format(str(torch._C._cuda_getDriverVersion()))) <ins> def _lazy_init(): global _initialized, _cudart if _initialized: return _check_driver() </ins> assert torch._C._cuda_init() <del> _initialized = True if platform.system() == 'Darwin': _cudart = ctypes.cdll.LoadLibrary('libcudart.dylib') else: _cudart = ctypes.cdll.LoadLibrary('libcudart.so') </del> <ins> _cudart = _load_cudart() </ins> _cudart.cudaGetErrorName.restype = ctypes.c_char_p _cudart.cudaGetErrorString.restype = ctypes.c_char_p <ins> _initialized = True </ins> def cudart():

Related discussion:
text: right now if is not in LDLIBRARYPATH, though it was found at compile-time, these lines will fail: Avoid this, by idk doing something... I think i have a few good ideas.
We need to add /usr/local/cuda/lib64 (or that's mac dir) to the rpath of _C
the problem i dont think is to add it to rpath, it's because we
Right. We could try with the default cuda installation path if it's not found from LDLIBRARYPATH.
Actually, do we really want to use the compile path? We should try to detect it at runtime, right? Or are we going to ship CUDA libs in our binaries?
we first load using runtime paths, and if it fails, fallback to path known at compile time.
I fear this is going to get brittle, especially if you are shipping CUDA libs. e.g. a user swaps HW and picks up a new driver and/or toolkit. As says, I'm pretty sure you want to use the runtime paths. Similarly, CUDA 7.5 won't run on Pascal and we have a cudnn built for 7.5 that will not do the right thing on CUDA 8, so those need to go together. If a user installs the CUDA bits via deb/rpm the right things are supposed to happen. If you push bits, we need to figure out how to make sure things line up. But this is perhaps a much larger packaging conversation.
Yeah, I've implemented it to first try loading it without any path and then try and . I'll push the commit tomorrow.
Code change:
{"_cuda_sleep", (PyCFunction)THCPModule_cudaSleep, METH_O, NULL}, {"_cuda_lock_mutex",   (PyCFunction)THCPModule_cudaLockMutex,   METH_NOARGS,  NULL}, {"_cuda_unlock_mutex", (PyCFunction)THCPModule_cudaUnlockMutex, METH_NOARGS,  NULL}, <ins> #ifdef WITH_NCCL </ins> {"_nccl_reduce", (PyCFunction)THCPModule_nccl_reduce, METH_VARARGS, NULL}, {"_nccl_all_reduce", (PyCFunction)THCPModule_nccl_all_reduce, METH_VARARGS, NULL}, {"_nccl_broadcast", (PyCFunction)THCPModule_nccl_broadcast, METH_VARARGS, NULL}, {"_nccl_all_gather", (PyCFunction)THCPModule_nccl_all_gather, METH_VARARGS, NULL}, {"_nccl_reduce_scatter", (PyCFunction)THCPModule_nccl_reduce_scatter, METH_VARARGS, NULL}, <ins> #endif </ins> {NULL} };

Related discussion:
text: OSX 10.13, CUDA 9.0, cudnn 7, Got these errors: When compiling here:
Code change:
"future releases."); return NULL; } <ins> // XXX: this won't work for negative strides storage_size += strides_data[i] * (sizes_data[i] - 1); </ins> } <ins> THStoragePtr storage = THStorage_(newWithDataAndAllocator)( (real*)PyArray_DATA(array), storage_size, &THNumpyArrayAllocator, new NumpyArrayAllocator(numpy_array)); </ins> THTensor *result = THTensor_(newWithStorage)(storage, 0, sizes, strides); return result; } else { <ins> THStoragePtr storage = THStorage_(new)(); </ins> THTensor *result = THTensor_(newWithStorage)(storage, 0, NULL, NULL); return result; }

Related discussion:
text: I followed the guide The command was working just fine until a couple days ago, but now it returns I manually checked and there is no cu100/[...] What should I do? I have CUDA 10.0 I would like to use pytorch...
You could try as a temporary workground. cc
This is most likely related to this: I've re-uploaded the stable html to re-include the cu100 binaries, and submitted a PR to make sure this doesn't happen again
Code change:
"future releases."); return NULL; } <ins> // XXX: this won't work for negative strides storage_size += strides_data[i] * (sizes_data[i] - 1); </ins> } <ins> THStoragePtr storage = THStorage_(newWithDataAndAllocator)( (real*)PyArray_DATA(array), storage_size, &THNumpyArrayAllocator, new NumpyArrayAllocator(numpy_array)); </ins> THTensor *result = THTensor_(newWithStorage)(storage, 0, sizes, strides); return result; } else { <ins> THStoragePtr storage = THStorage_(new)(); </ins> THTensor *result = THTensor_(newWithStorage)(storage, 0, NULL, NULL); return result; }

Related discussion:
text: Repro: Strides seem to be copied correctly, and the first row is also ok. All other rows are garbage.
Code change:
int_classes = int <ins> if PY2: FileNotFoundError = IOError else: FileNotFoundError = FileNotFoundError </ins> def with_metaclass(meta, *bases): """Create a base class with a metaclass.""" # This requires a bit of explanation: the basic idea is to make a dummy

Related discussion:
text: Traceback (most recent call last): File "", line 322, in &lt;moduleroislabel = fasterRCNN(imdata, iminfo, gtboxes, numboxes) File "/usr/local/lib/python2.7/dist-", line 491, in call result = self.forward(input, kwargs) File "/home/faster-", line 50, in forward rois, rpnlosscls, rpnlossbbox = self.RCNNrpn(basefeat, iminfo, gtboxes, numboxes) File "/usr/local/lib/python2.7/dist-", line 491, in call result = self.forward(input, kwargs) File "/home/faster-", line 87, in forward rpndata = self.RPNanchortarget((, gtboxes, iminfo, numboxes)) File "/usr/local/lib/python2.7/dist-", line 491, in call result = self.forward(input, kwargs) File "/home/faster-", line 157, in forward positiveweights = 1.0 / numexamples File "/usr/local/lib/python2.7/dist-", line 320, in rdiv return self.reciprocal() other RuntimeError: reciprocal is not implemented for type Exception NameError: "global name 'FileNotFoundError' is not defined" in &lt;bound method of object at 0x7fb842e6e3d0ignored This error is coming while implementing pytorch faster-rcnn repository. Any solutions please??
can you use the issue template, we need more information to help you.
Using Pytorch 0.3.0 solves the problem.
are you using python 2? AFAIK FileNotFoundError only exists in python 3, so this should be fixed Also, this error is hiding the real bug in the code, which seems to be the following: Did you mean to take the reciprocal of a LongTensor?
does the shutdown workers FileNotFoundError happen on python 2.7 as well?
I haven't tested on py2. But I believe it should be an with errno.
Yup I am using Python 2. To overcome this error of FileNotFoundError I have downgraded Pytorch from 0.4.0 version to 0.3.0. Use Pytorch 0.3.0 with Python 2, it will work fine.
alternatively, upgrading to Python 3 will fix the issue (and Python 3 is nicer than Python 2).
Code change:
int_classes = int <ins> if PY2: FileNotFoundError = IOError else: FileNotFoundError = FileNotFoundError </ins> def with_metaclass(meta, *bases): """Create a base class with a metaclass.""" # This requires a bit of explanation: the basic idea is to make a dummy

Related discussion:
text: We'll fix this though.
For a quick fix you can make python2 compatible by defining FileNotFoundError somewhere
This error still exist in pytorch 0.4
Yes it is fixed after 0.4
I am still getting it...
did you build pytorch from source? It was fixed after 0.4 is released, so it will be in the next pytorch release.
I updated it via
Can anyone help me with my problem?
I was also working with faster r-cnn and got the error. Downgrading to 0.3.0 solved FileNotFoundError but will produce another error: self.ratiolistbatch[leftidx:(rightidx+1)] = ((np.float64)) # trainset ratio list ,each batch is same number TypeError: 'module' object is not callable Where this error is related to in the above error message. Upgrading can solve this error but will produce the previous one. How do you cope with the second error?
Code change:
dims = THCudaLongTensor_nDimension(state, indices); THArgCheck(dims <= MAX_CUTORCH_DIMS, 4, CUTORCH_DIM_WARNING); <del> ptrdiff_t numIndices = THCudaLongTensor_nElement(state, indices); int srcDims = THCTensor_(nDimension)(state, dst); cudaStream_t stream = THCState_getCurrentStream(state); THArgCheck(THCudaLongTensor_nDimension(state, indices) == 1, 3, "expecting vector of indices"); THArgCheck(dim < srcDims, 4, "Indexing dim is out of bounds"); THArgCheck(srcDims > 0, 2, "Source tensor is empty"); int indContig = THCudaLongTensor_isContiguous(state, indices); </del> // The `src` is partitioned into two parts: // -the size of each slice we are indexing, which is the // total size of the tensor ignoring dimension `dim`; // -the number of indices we are choosing, which is the total size // of the tensor `indices`. <ins> ptrdiff_t sliceSize = THCTensor_(getSliceSize)(state, dst, dim, indices, nullptr); </ins> ptrdiff_t dstTotalSize = THCTensor_(nElement)(state, dst); int64_t dstFillDimSize = THCTensor_(size)(state, dst, dim); <del> ptrdiff_t sliceSize = dstTotalSize / dstFillDimSize; </del> <ins> ptrdiff_t numIndices = THCudaLongTensor_nElement(state, indices); cudaStream_t stream = THCState_getCurrentStream(state); int indContig = THCudaLongTensor_isContiguous(state, indices); </ins> int mpc = THCState_getCurrentDeviceProperties(state)->multiProcessorCount;

Related discussion:
text: A = (5, 4) B = (0, 9).view(3, 3) C = (0, 15).view(3, 5) idxs = torch.LongTensor([0, 2, 4]) A.indexadd(0, idxs, B) # RuntimeError: inconsistent tensor size, expected r [4], t [4] and src [3] to have the same number of elements, but got 4, 4 and 3 elements respectively at (...)/aten/src/TH/generic/THTensorMath.c:1008 A.indexadd(0, idxs, C) # RuntimeError: inconsistent tensor size, expected r [4], t [4] and src [5] to have the same number of elements, but got 4, 4 and 5 elements respectively at (...)/aten/src/TH/generic/THTensorMath.c:1008 So far so good. But if we use CUDA... A = (5, 4).cuda() B = (0, 9).view(3, 3).cuda() C = (0, 15).view(3, 5).cuda() idxs = torch.LongTensor([0, 2, 4]).cuda() A.indexadd(0, idxs, B) print(A) # 0 1 2 0 # 0 0 0 0 # 3 4 5 0 # 0 0 0 0 # 6 7 8 0 # [ of size 5x4 (GPU 0)] OK, this looks wrong... A.zero() A.indexadd(0, idxs, C) print(A) # 0 1 2 3 # 4 0 0 0 # 5 6 7 8 # 9 0 0 0 # 10 11 12 13 # [ of size 5x4 (GPU 0)] Now this looks definitely wrong. Increase C's dimension to something like (3, 500), and it overwrites other tensors or triggers asserts. Same thing happens with indexcopy_.
I'll take it if no one's looking at it yet.
Code change:
for test in tests: _test(*test) <ins> @unittest.skip("Not implemented yet") </ins> def test_align_tensors(self): def reference_fn(*tensors): longest_names = tensors[0].names

Related discussion:
text: only supports fully named inputs; all input dimensions must have a name. When passing it an unnamed input, it errors out with the following message: It should really say "Found unnamed dim at index 0 of Tensor[None, None]".
fixed in
Code change:
class InstanceNorm1d(_InstanceNorm): <del> r"""Applies Instance Normalization over a 2d or 3d input that is seen as a mini-batch. </del> <ins> r"""Applies Instance Normalization over a 3d input that is seen as a mini-batch. </ins> .. math::

Related discussion:
text: Ref , the input only supports format. This is not consistent with which supports also .
it doesn't make much sense to support instance norm for because it is usually normalizing over dimension.
Okay, so the documentation should be updated?
Code change:
// TODO: gradOutput shape check // Resize and initialize result tensor. THCTensor_(resizeAs)(state, gradInput, input); <del> THCTensor_(newContiguous)(state, gradInput); </del> THCTensor_(zero)(state, gradInput); int batchSize;

Related discussion:
text: Hello I have a training loop running without any errors or warnings on GPUs using Pytorch 2.0.1. When I try to modify my learning loop to run on TPUs I get the error Pytorch XLA developers solved the problem. But after the problem is solved I get the warning below. /home/mfatih/env38/lib/python3.8/site- UserWarning: aten::reshape: an autograd kernel was not registered to the Autograd key(s) but we are trying to backprop through it. This may lead to silently incorrect behavior. This behavior is deprecated and will be removed in a future version of PyTorch. If your operator is differentiable, please ensure you have registered an autograd kernel to the correct Autograd key (e.g. DispatchKey::Autograd, DispatchKey::CompositeImplicitAutograd). If your operator is not differentiable, or to squash this warning and use the previous behavior, please register torch::CppFunction::makeFallthrough() to DispatchKey::Autograd. (Triggered internally at ) Variable.executionengine.runbackward( # Calls into the C++ engine to run the backward pass Pytorch XLA developers told me that the warning is related to Pytorch, not Pytorch-XLA. Is this warning an indication of the wrong backward computations? You can regenerate the error using the public . Please change the working directory on in the config file. Run the for debugging. After a successful short train and val cycle we get the warning. The warning occurs in operations placed in the functions in during backward pass. Here is my environment PyTorch version: 2.2.0.dev20231213+cpu Is debug build: False CUDA used to build PyTorch: None ROCM used to build PyTorch: N/A OS: Ubuntu 20.04.4 LTS (x8664) GCC version: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0 Clang version: Could not collect CMake version: version 3.26.0 Libc version: glibc-2.31 Python version: 3.8.10 (default, Nov 22 2023, 10:22:35) [GCC 9.4.0] (64-bit runtime) Python platform: Linux-5.13.
Code change:
// TODO: gradOutput shape check // Resize and initialize result tensor. THCTensor_(resizeAs)(state, gradInput, input); <del> THCTensor_(newContiguous)(state, gradInput); </del> THCTensor_(zero)(state, gradInput); int batchSize;

Related discussion:
text: 0-1027-gcp-x8664-with-glibc2.29 Is CUDA available: False CUDA runtime version: No CUDA CUDAMODULELOADING set to: N/A GPU models and configuration: No CUDA Nvidia driver version: No CUDA cuDNN version: No CUDA HIP runtime version: N/A MIOpen runtime version: N/A Is XNNPACK available: True CPU: Architecture: x8664 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian Address sizes: 46 bits physical, 48 bits virtual CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 2 Core(s) per socket: 24 Socket(s): 2 NUMA node(s): 2 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) CPU @ 2.00GHz Stepping: 3 CPU MHz: 2000.186 BogoMIPS: 4000.37 Hypervisor vendor: KVM Virtualization type: full L1d cache: 1.5 MiB L1i cache: 1.5 MiB L2 cache: 48 MiB L3 cache: 77 MiB NUMA node0 CPU(s): 0-23,48-71 NUMA node1 CPU(s): 24-47,72-95 Vulnerability Itlb multihit: Not affected Vulnerability L1tf: Mitigation; PTE Inversion Vulnerability Mds: Mitigation; Clear CPU buffers; SMT Host state unknown Vulnerability Meltdown: Mitigation; PTI Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl and seccomp Vulnerability Spectre v1: Mitigation; usercopy/swapgs barriers and _user pointer sanitization Vulnerability Spectre v2: Mitigation; Retpolines, IBPB conditional, IBRSFW, STIBP conditional, RSB filling Vulnerability Srbds: Not affected Vulnerability Tsx async abort: Mitigation; Clear CPU buffers;
Code change:
// TODO: gradOutput shape check // Resize and initialize result tensor. THCTensor_(resizeAs)(state, gradInput, input); <del> THCTensor_(newContiguous)(state, gradInput); </del> THCTensor_(zero)(state, gradInput); int batchSize;

Related discussion:
text: SMT Host state unknown Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ss ht syscall nx pdpe1gb rdtscp lm constanttsc repgood nopl xtopology nonstoptsc cpuid tscknownfreq pni pclmulqdq ssse3 fma cx16 pcid sse41 sse42 x2apic movbe popcnt aes xsave avx f16c rdrand hypervisor lahflm abm 3dnowprefetch invpcidsingle pti ssbd ibrs ibpb stibp fsgsbase tscadjust bmi1 hle avx2 smep bmi2 erms invpcid rtm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves arat mdclear archcapabilities Versions of relevant libraries: [pip3] numpy==1.24.1 [pip3] torch==2.2.0.dev20231213+cpu [pip3] torch-xla==2.2.0+git5577dd7 [pip3] torchaudio==2.2.0.dev20231213+cpu [pip3] torchmetrics==1.2.1 [pip3] torchsummary==1.5.1 [pip3] torchvision==0.18.0.dev20231213+cpu [conda] Could not collect cc
From the log it seems like it suggese XLA need to manually register the backward for reshape which is a bit weird. This is the first time I see this error, if you can shed some light on this issue that would be great!
Hey! this warning recently as a set of more testing to ensure custom ops are properly registered. This is expected to trigger if you register a backend kernel (XLA key) but no autograd imple (AutogradXLA) for a given op.