The present invention relates to logic circuits and, more particularly, to RS485 compatible line driver circuits for providing three level logic output signals in response to applied input logic signals. 
Line driver circuits for meeting the requirements of EIA RS485 standards are well known.  Generally, these type driver circuits are designed to provide multi-point transmission of logic data information on long bus lines in noisy environments.  These driver circuits drive multi-party transmission lines and therefore when placed in a disabled state must not load the transmission line nor be affected by the operation of other driver circuits connected therewith via the transmission line. 
As understood, RS485 compatible line drivers provide differential three state logic output signals in response to being driven by a TTL logic input signal.  In order to be RS485 compatible these line drivers must be able to switch to a high impedance output level when disabled and remain in the high impedance state for wide positive and negative common mode voltages on the output thereof. 
Line driver circuits of the type referred to typically comprise at least one output switching cell which includes a push-pull output driver stage.  Generally the push-pull output stage comprises a pair of NPN transistors the collector-emitter paths of which are series connected with the emitter of the upper transistor and the collector of the lower transistor being coupled to the output of the circuit.  The bases of the two transistors are differentially driven such that one of the transistors is conducting while the other is turned off.  The upper transistor will therefore source current at the output to establish a high output voltage level when turned on while the lower transistor sinks current to establish a low output voltage level when turned on.  The third level state occurs when the driver circuit is disabled and both transistors are simultaneously turned off thereby establishing a high impedance output level at the output of the driver circuit. 
In most, if not all, prior art line driver circuits the upper transistor is supplied base drive current from a large geometry lateral PNP driver transistor.  A large PNP driver transistor is required in order to supply sufficient drive current to the upper transistor so that the latter can source sufficient current to drive the load.  However, this large geometry PNP drive transistor gives rise to the problem addessed by the present invention. 
The size of the PNP drive transistor prevents the device from rapidly turning off when, for example, a disable signal is applied thereto.  This prevents the upper transistor from rapidly turning which produces an undesirable time delay when the circuit is switched from the high output voltage level to the high impedance output state. 
Thus, a need exists for decreasing the propagation delay of the line driver circuit established during switching from the high output voltage level to a high impedance output state.