This disclosure relates generally to data decoding, and more particularly to iterative decoders for data encoded with a low-density parity check (LDPC) encoder. 
An LDPC code is an error correcting code that is used in the transmission of information through a noisy communications channel, with or without memory.  A variety of LDPC decoding techniques may be used to recover and correct the information received from the channel, most of which are iterative in nature. 
In the case of a memoryless channel, an LDPC decoder directly receives log-likelihood-ratio (LLR) information, a bit reliability metric representative of the encoded data received from the channel, for use in the decoding operation.  In the case of a channel with memory, a soft-in soft-out (SISO) channel detector, such as a soft output Viterbi algorithm (SOVA) detector, may be used in conjunction with the LDPC decoder.  The decoding operation alternates between use of the SISO channel detector and the LDPC decoder in order to decode the data.  In particular, LLR information is passed from the SISO channel detector to the LDPC decoder for use in the next LDPC decoding iteration and vice versa, in an iterative process that may be repeated, as desired, in order to improve data reliability. 
Error correcting codes may be decoded using an iterative message passing process implemented by an iterative decoder.  For example, a min-sum or sum-product decoding algorithm may be used to decode an LDPC code. 
The iterative message passing algorithm used by the iterative decoder may occasionally fail to converge or may converge to an incorrect state, leading to bit-errors or sector-errors that generally degrade application performance.  Such errors occur when the iterative message passing algorithm incorrectly converges to an errant vector (sometimes known as a near-codeword error) and/or when the algorithms fails to converge to any stable decoding state. 
Certain deeply biased near-codewords may not be corrected by known error decoding algorithms.  According to conventional methods, a look-up table can be maintained that lists the known error patterns associated with certain near codewords. 
A table storing information related to previously known near-codewords may be utilized to correct newly detected near-codewords.  However, an additional level of protection is required to decode the near-codewords that are not listed in such look-up tables.  When such a deeply biased unknown near-codeword is encountered, conventional iterative decoders that currently iterate up to some predetermined number of iterations or until a correct codeword is detected, may not be able to successfully resolve such a deeply biased near codeword. 
Some conventional non-binary iterative decoders perform LLR biasing to condition an LDPC decoder for efficient LDPC decoding.  However, every time an LLR biasing iteration fails, current methods require LLR values for all of the LDPC symbols to be calculated and set in LDPC decoder for every single LLR biasing iteration.  Calculating the LLR sign is very computationally intensive and performing such a calculation every time an LLR biasing iteration is performed consumes a lot of power and execution time.  Consequently, such an iterative decoding process has a low throughput and a high power consumption.  Such high power consumption makes current non-binary iterative decoders poor candidates for use in low power applications such as NAND flash controllers. 
Therefore, it would be desirable to provide low power LDPC decoders that can detect and correct near-codewords with a reduced execution time. 
The background description provided herein is for the purpose of generally presenting the context of the disclosure.  Work of the inventors hereof, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.