Repository: pwndbg/pwndbg

Issue:
Support to display all the registers
Currently, we only display part of registers in some architectures such as PowerPC.
This is the registers will be displayed:
https://github.com/pwndbg/pwndbg/blob/88723a8c0a88369fa2dd267d1fb5c63464db55cb/pwndbg/commands/context.py#L145-L148
Some registers such as `regs.misc` aren't included here:
https://github.com/pwndbg/pwndbg/blob/88723a8c0a88369fa2dd267d1fb5c63464db55cb/pwndbg/regs.py#L182-L187
And I even can't find `r1` in RegisterSet.

Hope we can add an option to display all the registers. (`r0`~`r31` and some other registers)



Discussion:
Hey, that seems reasonable to add. Would you mind sending a PR for that?
I don't understand why should we do it in the current way, and I think the patch will involve many changes, which may change the original purposes of some code, so it's better to change it by yourself :smile:
So the reason we don't show the misc registers is that they are things that you wouldn't want spamming the context. 
In the case of amd64, the misc registers are things such as the segment registers or smaller pieces of registers such as ax. Printing those out in the context every time would unnecessary as they seldom change or are relevant.

I think a good solution would be to add another configuration parameter ("show-misc-regs")or something like that. For info on how to do that, see https://github.com/pwndbg/pwndbg/blob/88723a8c0a88369fa2dd267d1fb5c63464db55cb/pwndbg/commands/context.py#L138 and how that is used in get_regs.

In terms of not having r1 in the register set, it should probably just be added to the misc registers (I've never used PowerPC, just speculating).

@bet4it does that make sense? Would you be willing to try to implement that? 
One problem is that registers of PowerPC are separated into different parts, so even if I can make some changes to display all the registers, they are displayed in a weird sequence rather than `r0`~`r31`
@bet4it what order are they displayed in? It seems like you could just do:
```
misc    = ('cr','lr', 'r0', 'r1', 'r2'), 
```
and prepend misc to gpr when displaying.
I guess that the register which is set in `retaddr` should be exclusive and can't be also set in `misc`.
And this statement implies this:
https://github.com/pwndbg/pwndbg/blob/88723a8c0a88369fa2dd267d1fb5c63464db55cb/pwndbg/regs.py#L93
And we shouldn't display registers in `misc` by default because:
https://github.com/pwndbg/pwndbg/blob/88723a8c0a88369fa2dd267d1fb5c63464db55cb/pwndbg/regs.py#L145-L152
Even if we solve all the problems, the sequence `('cr','lr', 'r0', 'r1', 'r2')` is also not appropriate. `'r0','r1','r2'` should be displayed at first and `'cr','lr'` should be displayed at the end.
So just to be clear, I was suggesting you create an optional setting that displays misc registers when enabled, not to display them by default.

It should be fine to have registers in both misc and retaddr. 
Powerpc currently already does it here (see 'lr'). Maybe if we displayed the misc registers in addition you might see the registers print twice, but that shouldn't be too hard of a fix. 
https://github.com/pwndbg/pwndbg/blob/88723a8c0a88369fa2dd267d1fb5c63464db55cb/pwndbg/regs.py#L182-L185

I don't really understand your use case. 
Why is it so important for cr and lr to be displayed at the end and all the registers in order? Also would displaying the registers in this order be a useful change for reversing all PowerPC binaries or just the one(s) you are currently looking at?
Display of registers like `r0, r1, r2` shouldn't be optional. They should always be displayed.

Certainly, any sequence of registers is OK. We can simply append `r0, r1, r2` at the end of all the registers, or we can even use sequence like `r7, r3, r5, r9...` while the sequence of gpr doesn't have special means. Nobody dare to complain it.
But I think it's better to display registers in the sequence of what they are when we display them with `info registers` in GDB.
> Display of registers like r0, r1, r2 shouldn't be optional

I think adding some twiddly bits is fine.  We can always keep the current behavior as the default.
> I think adding some twiddly bits is fine. We can always keep the current behavior as the default.

If I enable this bit when I work with PowerPC, and when I switch back to x86 I must bear all the registers like `'ax','ah','al'` are displayed?
Or should we add separate configs for each architecture?

And why such basic registers should be disabled by default?

Resolving patch:
diff --git a/pwndbg/regs.py b/pwndbg/regs.py
--- a/pwndbg/regs.py
+++ b/pwndbg/regs.py
@@ -170,13 +170,12 @@ def __iter__(self):
 # r13     Small data area pointer register (points to TLS)
 # r14-r30 Registers used for local variables
 # r31     Used for local variables or "environment pointers"
-powerpc = RegisterSet(  retaddr = ('lr','r0'),
+powerpc = RegisterSet(  retaddr = ('lr',),
                         flags   = {'msr':{},'xer':{}},
-                        gpr     = ('r3', 'r4', 'r5', 'r6', 'r7', 'r8', 'r9',
+                        gpr     = ('r0', 'r1', 'r2', 'r3', 'r4', 'r5', 'r6', 'r7', 'r8', 'r9',
                                    'r10', 'r11', 'r12', 'r13', 'r14', 'r15', 'r16', 'r17', 'r18', 'r19',
                                    'r20', 'r21', 'r22', 'r23', 'r24', 'r25', 'r26', 'r27', 'r28', 'r29',
-                                   'r30', 'r31'),
-                        misc    = ('cr','lr','r2'),
+                                   'r30', 'r31', 'cr', 'ctr'),
                         args    = ('r3', 'r4', 'r5', 'r6', 'r7', 'r8', 'r9', 'r10'),
                         retval  = 'r3')
 


Test patch: