Repository: Qiskit/qiskit

Issue:
QuantumCircuit.draw triggers warning with default arguments for single bits
### Environment

- **Qiskit Terra version**: main @ 6927a8d
- **Python version**: any
- **Operating system**: any


### What is happening?

The text circuit visualiser raises a warning when using its default arguments if called on a circuit that has an opaque (to the drawer) instruction that operates on a single clbit out of a register.

### How can we reproduce the issue?

```python
import qiskit

inner = qiskit.QuantumCircuit(1, 1)
inner.measure(0, 0)
qc = qiskit.QuantumCircuit(2, 2)
qc.append(inner, [0], [0])
qc.draw()
```
gives
```text
/Users/jake/code/qiskit/terra/qiskit/visualization/text.py:717: RuntimeWarning: The parameter "cregbundle" was disabled, since an instruction needs to refer to individual classical wires
  return "\n".join(self.lines()).encode(self.encoding).decode(self.encoding)

     ┌─────────────┐
q_0: ┤0            ├
     │             │
q_1: ┤  circuit-85 ├
     │             │
c_0: ╡0            ╞
     └─────────────┘
c_1: ═══════════════
```

### What should happen?

No warning for using the defaults with a regular circuit.

### Any suggestions?

The drawer sets `cregbundle=True` by default, but really it wants to infer the best value in this case.  We probably want three-level logic, so the default is set to `None`.  This can still default to `True` at a suitable point of the drawer, but should cause no warnings to be emitted if it is inferred to be `False` instead.


Discussion:

Resolving patch:
diff --git a/qiskit/circuit/quantumcircuit.py b/qiskit/circuit/quantumcircuit.py
--- a/qiskit/circuit/quantumcircuit.py
+++ b/qiskit/circuit/quantumcircuit.py
@@ -1834,7 +1834,7 @@ def draw(
         # safely forward-referenced.
         ax: Optional[typing.Any] = None,
         initial_state: bool = False,
-        cregbundle: bool = True,
+        cregbundle: bool = None,
         wire_order: list = None,
     ):
         """Draw the quantum circuit. Use the output parameter to choose the drawing format:
@@ -1916,7 +1916,7 @@ def draw(
             initial_state (bool): Optional. Adds ``|0>`` in the beginning of the wire.
                 Default is False.
             cregbundle (bool): Optional. If set True, bundle classical registers.
-                Default is True.
+                Default is True, except for when ``output`` is set to  ``"text"``.
             wire_order (list): Optional. A list of integers used to reorder the display
                 of the bits. The list must have an entry for every bit with the bits
                 in the range 0 to (num_qubits + num_clbits).
diff --git a/qiskit/visualization/circuit/circuit_visualization.py b/qiskit/visualization/circuit/circuit_visualization.py
--- a/qiskit/visualization/circuit/circuit_visualization.py
+++ b/qiskit/visualization/circuit/circuit_visualization.py
@@ -59,7 +59,7 @@ def circuit_drawer(
     fold=None,
     ax=None,
     initial_state=False,
-    cregbundle=True,
+    cregbundle=None,
     wire_order=None,
 ):
     """Draw the quantum circuit. Use the output parameter to choose the drawing format:
@@ -142,7 +142,7 @@ def circuit_drawer(
         initial_state (bool): Optional. Adds ``|0>`` in the beginning of the wire.
             Default is False.
         cregbundle (bool): Optional. If set True, bundle classical registers.
-            Default is True.
+            Default is True, except for when ``output`` is set to  ``"text"``.
         wire_order (list): Optional. A list of integers used to reorder the display
             of the bits. The list must have an entry for every bit with the bits
             in the range 0 to (num_qubits + num_clbits).
@@ -207,7 +207,7 @@ def circuit_drawer(
             "wire_order list for the index of each qubit and each clbit in the circuit."
         )
 
-    if cregbundle and (reverse_bits or wire_order is not None):
+    if circuit.clbits and cregbundle and (reverse_bits or wire_order is not None):
         cregbundle = False
         warn(
             "Cregbundle set to False since either reverse_bits or wire_order has been set.",
@@ -241,7 +241,7 @@ def circuit_drawer(
             idle_wires=idle_wires,
             with_layout=with_layout,
             initial_state=initial_state,
-            cregbundle=cregbundle,
+            cregbundle=cregbundle if cregbundle is not None else True,
             wire_order=wire_order,
         )
     elif output == "latex_source":
@@ -256,7 +256,7 @@ def circuit_drawer(
             idle_wires=idle_wires,
             with_layout=with_layout,
             initial_state=initial_state,
-            cregbundle=cregbundle,
+            cregbundle=cregbundle if cregbundle is not None else True,
             wire_order=wire_order,
         )
     elif output == "mpl":
@@ -302,7 +302,7 @@ def _text_circuit_drawer(
     with_layout=True,
     fold=None,
     initial_state=True,
-    cregbundle=False,
+    cregbundle=None,
     encoding=None,
     wire_order=None,
 ):
@@ -652,7 +652,7 @@ def _matplotlib_circuit_drawer(
         fold=fold,
         ax=ax,
         initial_state=initial_state,
-        cregbundle=cregbundle,
+        cregbundle=cregbundle if cregbundle is not None else True,
         global_phase=None,
         calibrations=None,
         qregs=None,
diff --git a/qiskit/visualization/circuit/text.py b/qiskit/visualization/circuit/text.py
--- a/qiskit/visualization/circuit/text.py
+++ b/qiskit/visualization/circuit/text.py
@@ -607,7 +607,7 @@ def __init__(
         vertical_compression="high",
         layout=None,
         initial_state=True,
-        cregbundle=False,
+        cregbundle=None,
         global_phase=None,
         encoding=None,
         qregs=None,
@@ -675,7 +675,8 @@ def __init__(
             self.layout = None
 
         self.initial_state = initial_state
-        self.cregbundle = cregbundle
+        self._cregbundle = cregbundle
+        self._default_cregbundle = False
         self.global_phase = circuit.global_phase
         self.plotbarriers = plotbarriers
         self.reverse_bits = reverse_bits
@@ -693,6 +694,13 @@ def __init__(
             else:
                 self.encoding = "utf8"
 
+    @property
+    def cregbundle(self):
+        """cregbundle, depending if it was explicitly set or not"""
+        if self._cregbundle is not None:
+            return self._cregbundle
+        return self._default_cregbundle
+
     def __str__(self):
         return self.single_string()
 
@@ -761,13 +769,14 @@ def lines(self, line_length=None):
         try:
             layers = self.build_layers()
         except TextDrawerCregBundle:
-            self.cregbundle = False
-            warn(
-                'The parameter "cregbundle" was disabled, since an instruction needs to refer to '
-                "individual classical wires",
-                RuntimeWarning,
-                2,
-            )
+            if self._cregbundle is not None:
+                self._cregbundle = False
+                warn(
+                    'The parameter "cregbundle" was disabled, since an instruction needs to refer to '
+                    "individual classical wires",
+                    RuntimeWarning,
+                    2,
+                )
             layers = self.build_layers()
 
         layer_groups = [[]]
@@ -1210,7 +1219,7 @@ def build_layers(self):
 class Layer:
     """A layer is the "column" of the circuit."""
 
-    def __init__(self, qubits, clbits, cregbundle=False, circuit=None):
+    def __init__(self, qubits, clbits, cregbundle, circuit=None):
         self.qubits = qubits
         self.clbits_raw = clbits  # list of clbits ignoring cregbundle change below
         self._circuit = circuit


Test patch:
diff --git a/test/python/visualization/test_circuit_drawer.py b/test/python/visualization/test_circuit_drawer.py
--- a/test/python/visualization/test_circuit_drawer.py
+++ b/test/python/visualization/test_circuit_drawer.py
@@ -119,3 +119,45 @@ def test_wire_order_raises(self):
 
         with self.assertWarnsRegex(RuntimeWarning, "Cregbundle set"):
             visualization.circuit_drawer(circuit, cregbundle=True, wire_order=[0, 1, 2, 5, 4, 3])
+
+    def test_reverse_bits(self):
+        """Test reverse_bits should not raise warnings when no classical qubits:
+        See: https://github.com/Qiskit/qiskit-terra/pull/8689"""
+        circuit = QuantumCircuit(3)
+        circuit.x(1)
+        expected = "\n".join(
+            [
+                "          ",
+                "q_2: ─────",
+                "     ┌───┐",
+                "q_1: ┤ X ├",
+                "     └───┘",
+                "q_0: ─────",
+                "          ",
+            ]
+        )
+        result = visualization.circuit_drawer(circuit, reverse_bits=True)
+        self.assertEqual(result.__str__(), expected)
+
+    def test_no_explict_cregbundle(self):
+        """Test no explicit cregbundle should not raise warnings about being disabled
+        See: https://github.com/Qiskit/qiskit-terra/issues/8690"""
+        inner = QuantumCircuit(1, 1, name="inner")
+        inner.measure(0, 0)
+        circuit = QuantumCircuit(2, 2)
+        circuit.append(inner, [0], [0])
+        expected = "\n".join(
+            [
+                "     ┌────────┐",
+                "q_0: ┤0       ├",
+                "     │        │",
+                "q_1: ┤  inner ├",
+                "     │        │",
+                "c_0: ╡0       ╞",
+                "     └────────┘",
+                "c_1: ══════════",
+                "               ",
+            ]
+        )
+        result = visualization.circuit_drawer(circuit)
+        self.assertEqual(result.__str__(), expected)
diff --git a/test/python/visualization/test_circuit_text_drawer.py b/test/python/visualization/test_circuit_text_drawer.py
--- a/test/python/visualization/test_circuit_text_drawer.py
+++ b/test/python/visualization/test_circuit_text_drawer.py
@@ -5076,7 +5076,7 @@ def test_registerless_one_bit(self):
         crx = ClassicalRegister(2, "crx")
         circuit = QuantumCircuit(qrx, [Qubit(), Qubit()], qry, [Clbit(), Clbit()], crx)
 
-        self.assertEqual(circuit.draw(output="text").single_string(), expected)
+        self.assertEqual(circuit.draw(output="text", cregbundle=True).single_string(), expected)
 
 
 class TestCircuitVisualizationImplementation(QiskitVisualizationTestCase):